Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 033758/0615 | |
| Pages: | 9 |
| | Recorded: | 09/17/2014 | | |
| Attorney Dkt #: | 04860.P24465US1 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
9
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2008
|
Application #:
|
11371145
|
Filing Dt:
|
03/07/2006
|
|
Title:
|
FABRICATED U-SHAPED CAPACITOR FOR A DIGITAL-TO-ANALOG CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
11371148
|
Filing Dt:
|
03/07/2006
|
|
Title:
|
FABRICATED CYLINDER CAPACITOR FOR A DIGITAL-TO-ANALOG CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11371257
|
Filing Dt:
|
03/07/2006
|
|
Title:
|
FABRICATED LAYERED CAPACITOR FOR A DIGITAL-TO-ANALOG CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
11524989
|
Filing Dt:
|
09/20/2006
|
|
Title:
|
ANALOG-TO-DIGITAL CONVERTER ARCHITECTURE USING A CAPACITOR ARRAY STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
12331369
|
Filing Dt:
|
12/09/2008
|
|
Title:
|
ANALOG-TO-DIGITAL CONVERTER (ADC) WITH REDUCED JITTER SENSITIVITY AND POWER CONSUMPTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
12338792
|
Filing Dt:
|
12/18/2008
|
|
Title:
|
ACCURATE RESISTANCE CAPACITANCE (RC) TIME CONSTANT CALIBRATION WITH METAL-OXIDE-METAL (MOM) CAPACITORS FOR PRECISION FREQUENCY RESPONSE OF INTEGRATED FILTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13214136
|
Filing Dt:
|
08/19/2011
|
|
Title:
|
SYSTEMS AND METHODS FOR ADJUSTING ULTRA-SMALL METAL-OXIDE-METAL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13297240
|
Filing Dt:
|
11/15/2011
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2013
| | | | |
|
Title:
|
DATA CONVERTER CURRENT SOURCES USING THIN-OXIDE CORE DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/2015
|
Application #:
|
13826050
|
Filing Dt:
|
03/14/2013
|
|
Title:
|
Method and Apparatus for Combined Linear, Low-Noise Buffer and Sampler for ADC
|
|
|
Assignee
|
|
|
|
|
| 1 INFINITE LOOP |
| CUPERTINO, CALIFORNIA 95014 |
|
|
Correspondence name and address
|
| |
JAMES C. SCHELLER
|
| |
1279 OAKMEAD PARKWAY
|
| |
SUNNYVALE, CA 94085
|
Search Results as of:
05/16/2024 07:12 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
