Patent Assignment Details
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| Reel/Frame: | 033772/0990 | |
| Pages: | 2 |
| | Recorded: | 09/19/2014 | | |
| Attorney Dkt #: | P647239-01 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14464545
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Filing Dt:
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08/20/2014
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Publication #:
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Pub Dt:
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12/04/2014
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Title:
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SEMICONDUCTOR DEVICE COMPRISING A GATE ELECTRODE, SOURCE/DRAIN REGIONS, FIRST SIDEWALLS, SECOND SIDEWALLS, AND THIRD SIDEWALLS, IN WHICH THE SECOND SIDEWALL CONTAINS AN ATOM CAUSING A DEFECT LEVEL DUE TO A COLLISION ION BEING IMPLANTED, AND THE FIRST AND THIRD SIDEWALLS CONTAINING NO ATOM CAUSING THE DEFECT LEVEL AND METHOD OF FORMING SAME
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Assignee
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| 1006, OAZA KADOMA, KADOMA-SHI |
| OSAKA, JAPAN 571-8501 |
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Correspondence name and address
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PANASONIC CORPORATION
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2-1-61, SHIROMI, CHUO-KU
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7F OBP PANASONIC TOWER
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OSAKA, 540-6207 JAPAN
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05/06/2024 01:56 AM
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