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Reel/Frame:034253/0106   Pages: 5
Recorded: 11/24/2014
Attorney Dkt #:95781.22680
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
03/22/2016
Application #:
14483544
Filing Dt:
09/11/2014
Publication #:
Pub Dt:
03/19/2015
Title:
OPTIMIZED METHOD FOR FABRICATING PATTERNS OF III-V SEMICONDUCTOR MATERIAL ON A SEMICONDUCTOR SUBSTRATE
Assignors
1
Exec Dt:
10/16/2014
2
Exec Dt:
10/16/2014
Assignees
1
BÂTIMENT « LE PONANT D »
25, RUE LEBLANC
PARIS, FRANCE 75015
2
3, RUE MICHEL ANGE
PARIS, FRANCE 75016
Correspondence name and address
BAKER AND HOSTETLER LLP
1050 CONNECTICUT AVENUE
SUITE 1100
WASHINGTON, DC 20036

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