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Total properties:
23
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Patent #:
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Issue Dt:
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05/28/2013
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Application #:
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13131602
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Filing Dt:
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05/26/2011
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Publication #:
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Pub Dt:
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02/09/2012
| | | | |
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Title:
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METHOD FOR INTRODUCING CHANNEL STRESS AND FIELD EFFECT TRANSISTOR FABRICATED BY THE SAME
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Patent #:
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Issue Dt:
|
10/16/2012
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Application #:
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13133643
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Filing Dt:
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06/08/2011
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Publication #:
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Pub Dt:
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05/10/2012
| | | | |
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Title:
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METHOD FOR FABRICATING A TUNNELING FIELD-EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
|
11/26/2013
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Application #:
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13146005
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Filing Dt:
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07/22/2011
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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PROGRAMMING METHOD FOR PROGRAMMING FLASH MEMORY ARRAY STRUCTURE
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Patent #:
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Issue Dt:
|
07/02/2013
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Application #:
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13201370
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Filing Dt:
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08/22/2011
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Publication #:
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Pub Dt:
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01/26/2012
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Title:
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ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
|
09/24/2013
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Application #:
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13201618
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Filing Dt:
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08/15/2011
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Publication #:
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Pub Dt:
|
07/26/2012
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
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|
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Patent #:
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|
Issue Dt:
|
08/20/2013
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Application #:
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13254570
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Filing Dt:
|
09/02/2011
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|
Publication #:
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Pub Dt:
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09/27/2012
| | | | |
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Title:
|
Resistive-Switching Memory and Fabrication Method Thereof
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|
|
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Patent #:
|
|
Issue Dt:
|
03/18/2014
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Application #:
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13255443
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Filing Dt:
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09/08/2011
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Publication #:
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Pub Dt:
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02/21/2013
| | | | |
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Title:
|
A STRAINED CHANNEL FIELD EFFECT TRANSISTOR AND THE METHOD FOR FABRICATING THE SAME
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
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13266791
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Filing Dt:
|
10/28/2011
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|
Publication #:
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Pub Dt:
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01/17/2013
| | | | |
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Title:
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FABRICATION METHOD FOR SURROUNDING GATE SILICON NANOWIRE TRANSISTOR WITH AIR AS SPACERS
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|
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Patent #:
|
|
Issue Dt:
|
08/13/2013
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Application #:
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13318333
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Filing Dt:
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10/31/2011
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|
Publication #:
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Pub Dt:
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07/19/2012
| | | | |
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Title:
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COMBINED-SOURCE MOS TRANSISTOR WITH COMB-SHAPED GATE, AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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|
Issue Dt:
|
09/03/2013
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Application #:
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13321120
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Filing Dt:
|
11/17/2011
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|
Publication #:
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Pub Dt:
|
05/10/2012
| | | | |
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Title:
|
FLASH MEMORY AND FABRICATION METHOD AND OPERATION METHOD FOR THE SAME
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13379752
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Filing Dt:
|
12/21/2011
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
|
Title:
|
METHOD FOR FABRICATING SEMICONDUCTOR NANO CIRCULAR RING
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
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13381633
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Filing Dt:
|
12/29/2011
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|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
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Title:
|
HIGH VOLTAGE-RESISTANT LATERAL DOUBLE-DIFFUSED TRANSISTOR BASED ON NANOWIRE DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13384215
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Filing Dt:
|
01/13/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
|
Title:
|
METHOD FOR FABRICATING SURROUNDING-GATE SILICON NANOWIRE TRANSISTOR WITH AIR SIDEWALLS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13498585
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Filing Dt:
|
03/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/25/2013
| | | | |
|
Title:
|
SHAPE FLOATING GATE FOR FLASH MEMORY DEVICE AND FABRICATING THE SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
13501241
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Filing Dt:
|
04/10/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/13/2012
| | | | |
|
Title:
|
MOS TRANSISTOR HAVING COMBINED-SOURCE STRUCTURE WITH LOW POWER CONSUMPTION AND METHOD FOR FABRICATING THE SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13501711
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Filing Dt:
|
04/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
|
Title:
|
FABRICATION METHOD OF VERTICAL SILICON NANOWIRE FIELD EFFECT TRANSISTOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2014
|
Application #:
|
13509170
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Filing Dt:
|
05/10/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2013
| | | | |
|
Title:
|
CMOS DEVICE FOR REDUCING RADIATION-INDUCED CHARGE COLLECTION AND METHOD FOR FABRICATING THE SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13513155
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Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
03/21/2013
| | | | |
|
Title:
|
MULTILEVEL RESISTIVE MEMORY HAVING LARGE STORAGE CAPACITY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2013
|
Application #:
|
13543704
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Filing Dt:
|
07/06/2012
|
|
Title:
|
METHOD FOR FABRICATING ULTRA-FINE NANOWIRE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
13580971
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Filing Dt:
|
08/24/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
GE-BASED NMOS DEVICE AND METHOD FOR FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13582034
|
Filing Dt:
|
08/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
|
Title:
|
CMOS DEVICE FOR REDUCING CHARGE SHARING EFFECT AND FABRICATION METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
13582624
|
Filing Dt:
|
09/04/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
|
Title:
|
HEAT DISSIPATION STRUCTURE OF SOI FIELD EFFECT TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13702562
|
Filing Dt:
|
12/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2013
| | | | |
|
Title:
|
INTERFACE TREATMENT METHOD FOR GERMANIUM-BASED DEVICE
|
|
