|
Total properties:
16
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
08976303
|
Filing Dt:
|
11/21/1997
|
|
Title:
|
BIOS MEMORY AND MULTIMEDIA DATA STORAGE COMBINATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2001
|
Application #:
|
09273430
|
Filing Dt:
|
03/19/1999
|
|
Title:
|
SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2001
|
Application #:
|
09409542
|
Filing Dt:
|
09/30/1999
|
|
Title:
|
METHOD AND APPARATUS FOR MEASURING SUBTHRESHOLD CURRENT IN A MEMORY ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2001
|
Application #:
|
09421762
|
Filing Dt:
|
10/19/1999
|
|
Title:
|
SEPARATE OUTPUT POWER SUPPLY TO REDUCE OUTPUT NOISE FOR A SIMULTANEOUS OPERATION FLASH MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2001
|
Application #:
|
09480868
|
Filing Dt:
|
01/10/2000
|
|
Title:
|
NONLINEAR STEPPED PROGRAMMING VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2001
|
Application #:
|
09504186
|
Filing Dt:
|
02/15/2000
|
|
Title:
|
Two-stage pipeline sensing for page mode flash memory
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2001
|
Application #:
|
09514404
|
Filing Dt:
|
02/28/2000
|
|
Title:
|
Register driven means to control programming voltages
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09654831
|
Filing Dt:
|
09/01/2000
|
|
Title:
|
ARRANGEMENT FOR PROGRAMMING SELECTED DEVICE REGISTERS DURING INITIALIZATION FROM AN EXTERNAL MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2002
|
Application #:
|
09794479
|
Filing Dt:
|
02/26/2001
|
|
Title:
|
CONFIGURE REGISTERS AND LOADS TO TAILOR A MULTI-LEVEL CELL FLASH DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09854351
|
Filing Dt:
|
05/10/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/28/2002
| | | | |
|
Title:
|
SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09859193
|
Filing Dt:
|
05/15/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/14/2002
| | | | |
|
Title:
|
SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
10885268
|
Filing Dt:
|
07/06/2004
|
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
|
Title:
|
METHOD OF IMPROVING ERASE VOLTAGE DISTRIBUTION FOR A FLASH MEMORY ARRAY HAVING DUMMY WORDLINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11037477
|
Filing Dt:
|
01/18/2005
|
|
Title:
|
METHODS AND SYSTEMS FOR HIGH WRITE PERFORMANCE IN MULTI-BIT FLASH MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11653655
|
Filing Dt:
|
01/16/2007
|
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
|
Title:
|
METHODS AND SYSTEMS FOR HIGH WRITE PERFORMANCE IN MULTI-BIT FLASH MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2009
|
Application #:
|
11767622
|
Filing Dt:
|
06/25/2007
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2008
| | | | |
|
Title:
|
COMPENSATION METHOD TO ACHIEVE UNIFORM PROGRAMMING SPEED OF FLASH MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2011
|
Application #:
|
11983041
|
Filing Dt:
|
11/05/2007
|
|
Publication #:
|
|
Pub Dt:
|
05/07/2009
| | | | |
|
Title:
|
REDUCTION OF PACKAGE HEIGHT IN A STACKED DIE CONFIGURATION
|
|
