Patent Assignment Details
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| Reel/Frame: | 035083/0207 | |
| Pages: | 6 |
| | Recorded: | 03/04/2015 | | |
| Attorney Dkt #: | 012052.0822 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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08/09/2016
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Application #:
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14600533
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Filing Dt:
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01/20/2015
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Publication #:
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Pub Dt:
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07/23/2015
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Title:
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DIGITAL PHASE-LOCKED LOOP (DPLL), METHOD OF CONTROLLING DPLL, AND ULTRA LOW POWER (ULP) TRANSCEIVER USING DPLL
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Assignees
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| 129, SAMSUNG-RO, YEONGTONG-GU, GYEONGGI-DO, 443-742 |
| SUWON-SI, KOREA, REPUBLIC OF |
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| SUNGKYUNKWAN UNIVERSITY, 2066 SEOBU-RO, JANGAN-GU, GYEONGGI-DO, 440-746 |
| SUWON-SI, KOREA, REPUBLIC OF |
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Correspondence name and address
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NSIP LAW
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P.O. BOX 65745
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WASHINGTON, DC 20035
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