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Reel/Frame:	035201/0159			Pages:	226
		Recorded:	03/13/2015
Attorney Dkt #:	3483.276
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 1788
Page 16 of 18
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Patent #:	NONE	Issue Dt:		Application #:	11702847	Filing Dt:	02/05/2007
Publication #:	US20080061359	Pub Dt:	03/13/2008
Title:	Dual charge storage node with undercut gate oxide for deep sub-micron memory cell

Patent #:	8143664	Issue Dt:	03/27/2012	Application #:	11712299	Filing Dt:	02/27/2007
Publication #:	US20070210373	Pub Dt:	09/13/2007
Title:	SEMICONDUCTOR DEVICE HAVING LOWER LEAKAGE CURRENT BETWEEN SEMICONDUCTOR SUBSTRATE AND BIT LINES

Patent #:	7561471	Issue Dt:	07/14/2009	Application #:	11724711	Filing Dt:	03/16/2007
Publication #:	US20080151644	Pub Dt:	06/26/2008
Title:	CYCLING IMPROVEMENT USING HIGHER ERASE BIAS

Patent #:	9318333	Issue Dt:	04/19/2016	Application #:	11724725	Filing Dt:	03/16/2007
Publication #:	US20080157199	Pub Dt:	07/03/2008
Title:	Dielectric extension to mitigate short channel effects

Patent #:	7553727	Issue Dt:	06/30/2009	Application #:	11724726	Filing Dt:	03/16/2007
Publication #:	US20080150006	Pub Dt:	06/26/2008
Title:	USING IMPLANTED POLY-1 TO IMPROVE CHARGING PROTECTION IN DUAL-POLY PROCESS

Patent #:	8085615	Issue Dt:	12/27/2011	Application #:	11724773	Filing Dt:	03/16/2007
Publication #:	US20080158935	Pub Dt:	07/03/2008
Title:	MULTI-STATE RESISTANCE CHANGING MEMORY WITH A WORD LINE DRIVER FOR APPLYING A SAME PROGRAM VOLTAGE TO THE WORD LINE

Patent #:	7561465	Issue Dt:	07/14/2009	Application #:	11724774	Filing Dt:	03/16/2007
Publication #:	US20080175054	Pub Dt:	07/24/2008
Title:	METHODS AND SYSTEMS FOR RECOVERING DATA IN A NONVOLATILE MEMORY ARRAY

Patent #:	7888218	Issue Dt:	02/15/2011	Application #:	11724775	Filing Dt:	03/16/2007
Publication #:	US20080153223	Pub Dt:	06/26/2008
Title:	USING THICK SPACER FOR BITLINE IMPLANT THEN REMOVE

Patent #:	7755922	Issue Dt:	07/13/2010	Application #:	11724788	Filing Dt:	03/16/2007
Publication #:	US20080175035	Pub Dt:	07/24/2008
Title:	NON-VOLATILE RESISTANCE CHANGING FOR ADVANCED MEMORY APPLICATIONS

Patent #:	NONE	Issue Dt:		Application #:	11735229	Filing Dt:	04/13/2007
Publication #:	US20080153224	Pub Dt:	06/26/2008
Title:	INTEGRATED CIRCUIT SYSTEM WITH MEMORY SYSTEM

Patent #:	NONE	Issue Dt:		Application #:	11735241	Filing Dt:	04/13/2007
Publication #:	US20080149990	Pub Dt:	06/26/2008
Title:	MEMORY SYSTEM WITH POLY METAL GATE

Patent #:	7505298	Issue Dt:	03/17/2009	Application #:	11741996	Filing Dt:	04/30/2007
Publication #:	US20080266926	Pub Dt:	10/30/2008
Title:	TRANSFER OF NON-ASSOCIATED INFORMATION ON FLASH MEMORY DEVICES

Patent #:	7776696	Issue Dt:	08/17/2010	Application #:	11741998	Filing Dt:	04/30/2007
Publication #:	US20080268630	Pub Dt:	10/30/2008
Title:	METHOD TO OBTAIN MULTIPLE GATE THICKNESSES USING IN-SITU GATE ETCH MASK APPROACH

Patent #:	7807580	Issue Dt:	10/05/2010	Application #:	11742003	Filing Dt:	04/30/2007
Publication #:	US20080268650	Pub Dt:	10/30/2008
Title:	TRIPLE POLY-SI REPLACEMENT SCHEME FOR MEMORY DEVICES

Patent #:	7672161	Issue Dt:	03/02/2010	Application #:	11742371	Filing Dt:	04/30/2007
Publication #:	US20080266945	Pub Dt:	10/30/2008
Title:	ADAPTIVE DETECTION OF THRESHOLD LEVELS IN MEMORY

Patent #:	7626869	Issue Dt:	12/01/2009	Application #:	11745327	Filing Dt:	05/07/2007
Publication #:	US20080279014	Pub Dt:	11/13/2008
Title:	MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY

Patent #:	7682905	Issue Dt:	03/23/2010	Application #:	11746122	Filing Dt:	05/09/2007
Publication #:	US20080280410	Pub Dt:	11/13/2008
Title:	SELF ALIGNED NARROW STORAGE ELEMENTS FOR ADVANCED MEMORY DEVICE

Patent #:	7713875	Issue Dt:	05/11/2010	Application #:	11748215	Filing Dt:	05/14/2007
Publication #:	US20080150007	Pub Dt:	06/26/2008
Title:	VARIABLE SALICIDE BLOCK FOR RESISTANCE EQUALIZATION IN AN ARRAY

Patent #:	8236693	Issue Dt:	08/07/2012	Application #:	11748743	Filing Dt:	05/15/2007
Publication #:	US20080286921	Pub Dt:	11/20/2008
Title:	METHODS OF FORMING SILICIDES OF DIFFERENT THICKNESSES ON DIFFERENT STRUCTURES

Patent #:	7645632	Issue Dt:	01/12/2010	Application #:	11750724	Filing Dt:	05/18/2007
Publication #:	US20070224724	Pub Dt:	09/27/2007
Title:	SELF ALIGNED MEMORY ELEMENT AND WORDLINE

Patent #:	8244562	Issue Dt:	08/14/2012	Application #:	11754877	Filing Dt:	05/29/2007
Publication #:	US20080103793	Pub Dt:	05/01/2008
Title:	SEQUENCE OF ALGORITHMS TO COMPUTE EQUILIBRIUM PRICES IN NETWORKS

Patent #:	7566628	Issue Dt:	07/28/2009	Application #:	11763510	Filing Dt:	06/15/2007
Publication #:	US20080308781	Pub Dt:	12/18/2008
Title:	PROCESS FOR MAKING A RESISTIVE MEMORY CELL WITH SEPARATELY PATTERNED ELECTRODES

Patent #:	7915907	Issue Dt:	03/29/2011	Application #:	11767620	Filing Dt:	06/25/2007
Publication #:	US20080315906	Pub Dt:	12/25/2008
Title:	FAULTY DANGLING METAL ROUTE DETECTION

Patent #:	7799612	Issue Dt:	09/21/2010	Application #:	11767623	Filing Dt:	06/25/2007
Publication #:	US20080318364	Pub Dt:	12/25/2008
Title:	PROCESS APPLYING DIE ATTACH FILM TO SINGULATED DIE

Patent #:	NONE	Issue Dt:		Application #:	11770239	Filing Dt:	06/28/2007
Publication #:	US20090001599	Pub Dt:	01/01/2009
Title:	A semiconductor device for stacking dies in a multi-die chip packing using film over wire as well as multi-die chip devices that include film over wire

Patent #:	7652919	Issue Dt:	01/26/2010	Application #:	11771961	Filing Dt:	06/29/2007
Publication #:	US20080158954	Pub Dt:	07/03/2008
Title:	MULTI-LEVEL OPERATION IN DUAL ELEMENT CELLS USING A SUPPLEMENTAL PROGRAMMING LEVEL

Patent #:	NONE	Issue Dt:		Application #:	11781551	Filing Dt:	07/23/2007
Publication #:	US20070262412	Pub Dt:	11/15/2007
Title:	DEVICE HAVING A PROTECTIVE CAP FORMED OVER AN ANTI-REFLECTIVE COATING LAYER AND OVER AN INSULATING MATERIAL

Patent #:	7804125	Issue Dt:	09/28/2010	Application #:	11782507	Filing Dt:	07/24/2007
Publication #:	US20070267686	Pub Dt:	11/22/2007
Title:	SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING

Patent #:	7970129	Issue Dt:	06/28/2011	Application #:	11788264	Filing Dt:	04/19/2007
Publication #:	US20080260145	Pub Dt:	10/23/2008
Title:	SELECTION OF A LOOKUP TABLE WITH DATA MASKED WITH A COMBINATION OF AN ADDITIVE AND MULTIPLICATIVE MASK

Patent #:	7502271	Issue Dt:	03/10/2009	Application #:	11789888	Filing Dt:	04/25/2007
Publication #:	US20070253266	Pub Dt:	11/01/2007
Title:	SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD

Patent #:	8915775	Issue Dt:	12/23/2014	Application #:	11790305	Filing Dt:	04/24/2007
Publication #:	US20080072585	Pub Dt:	03/27/2008
Title:	EXHAUST SYSTEM

Patent #:	8373148	Issue Dt:	02/12/2013	Application #:	11796073	Filing Dt:	04/26/2007
Publication #:	US20080265240	Pub Dt:	10/30/2008
Title:	MEMORY DEVICE WITH IMPROVED PERFORMANCE

Patent #:	7732276	Issue Dt:	06/08/2010	Application #:	11796582	Filing Dt:	04/26/2007
Publication #:	US20080265301	Pub Dt:	10/30/2008
Title:	SELF-ALIGNED PATTERNING METHOD BY USING NON-CONFORMAL FILM AND ETCH BACK FOR FLASH MEMORY AND OTHER SEMICONDUCTOR APPLICATIONS

Patent #:	8367537	Issue Dt:	02/05/2013	Application #:	11801823	Filing Dt:	05/10/2007
Publication #:	US20080277712	Pub Dt:	11/13/2008
Title:	FLASH MEMORY CELL WITH A FLAIR GATE

Patent #:	NONE	Issue Dt:		Application #:	11804170	Filing Dt:	05/16/2007
Publication #:	US20080285354	Pub Dt:	11/20/2008
Title:	Self reference sensing system and method

Patent #:	7554204	Issue Dt:	06/30/2009	Application #:	11820278	Filing Dt:	06/18/2007
Publication #:	US20080308947	Pub Dt:	12/18/2008
Title:	DIE OFFSET DIE TO DIE BONDING

Patent #:	7901955	Issue Dt:	03/08/2011	Application #:	11821653	Filing Dt:	06/25/2007
Publication #:	US20080318348	Pub Dt:	12/25/2008
Title:	METHOD OF CONSTRUCTING A STACKED-DIE SEMICONDUCTOR STRUCTURE

Patent #:	NONE	Issue Dt:		Application #:	11829135	Filing Dt:	07/27/2007
Publication #:	US20090029202	Pub Dt:	01/29/2009
Title:	FUEL CELL USING DEUTERIUM

Patent #:	7776688	Issue Dt:	08/17/2010	Application #:	11835538	Filing Dt:	08/08/2007
Publication #:	US20090042378	Pub Dt:	02/12/2009
Title:	USE OF A POLYMER SPACER AND SI TRENCH IN A BITLINE JUNCTION OF A FLASH MEMORY CELL TO IMPROVE TPD CHARACTERISTICS

Patent #:	8012830	Issue Dt:	09/06/2011	Application #:	11835542	Filing Dt:	08/08/2007
Publication #:	US20090039405	Pub Dt:	02/12/2009
Title:	ORO AND ORPRO WITH BIT LINE TRENCH TO SUPPRESS TRANSPORT PROGRAM DISTURB

Patent #:	NONE	Issue Dt:		Application #:	11835545	Filing Dt:	08/08/2007
Publication #:	US20080233663	Pub Dt:	09/25/2008
Title:	SINGULATED BARE DIE TESTING

Patent #:	7558123	Issue Dt:	07/07/2009	Application #:	11837949	Filing Dt:	08/13/2007
Publication #:	US20090049231	Pub Dt:	02/19/2009
Title:	EFFICIENT AND SYSTEMATIC MEASUREMENT FLOW ON DRAIN VOLTAGE FOR DIFFERENT TRIMMING IN FLASH SILICON CHARACTERIZATION

Patent #:	7558116	Issue Dt:	07/07/2009	Application #:	11837976	Filing Dt:	08/13/2007
Publication #:	US20090046511	Pub Dt:	02/19/2009
Title:	REGULATION OF BOOST-STRAP NODE RAMP RATE USING CAPACITANCE TO COUNTER PARASITIC ELEMENTS IN CHANNEL

Patent #:	7749855	Issue Dt:	07/06/2010	Application #:	11838483	Filing Dt:	08/14/2007
Publication #:	US20090045445	Pub Dt:	02/19/2009
Title:	CAPACITOR STRUCTURE USED FOR FLASH MEMORY

Patent #:	NONE	Issue Dt:		Application #:	11842655	Filing Dt:	08/21/2007
Publication #:	US20090051043	Pub Dt:	02/26/2009
Title:	DIE STACKING IN MULTI-DIE STACKS USING DIE SUPPORT MECHANISMS

Patent #:	NONE	Issue Dt:		Application #:	11844518	Filing Dt:	08/24/2007
Publication #:	US20090050471	Pub Dt:	02/26/2009
Title:	PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS WITHIN OPENINGS

Patent #:	7981745	Issue Dt:	07/19/2011	Application #:	11847507	Filing Dt:	08/30/2007
Publication #:	US20090061650	Pub Dt:	03/05/2009
Title:	SACRIFICIAL NITRIDE AND GATE REPLACEMENT

Patent #:	8455268	Issue Dt:	06/04/2013	Application #:	11848515	Filing Dt:	08/31/2007
Publication #:	US20090061631	Pub Dt:	03/05/2009
Title:	GATE REPLACEMENT WITH TOP OXIDE REGROWTH FOR THE TOP OXIDE IMPROVEMENT

Patent #:	8670557	Issue Dt:	03/11/2014	Application #:	11852644	Filing Dt:	09/10/2007
Publication #:	US20090067617	Pub Dt:	03/12/2009
Title:	CRYPTOGRAPHIC SYSTEM WITH MODULAR RANDOMIZATION OF EXPONENTIATION

Patent #:	7573103	Issue Dt:	08/11/2009	Application #:	11855704	Filing Dt:	09/14/2007
Title:	BACK-TO-BACK NPN/PNP PROTECTION DIODES

Patent #:	7630250	Issue Dt:	12/08/2009	Application #:	11872989	Filing Dt:	10/16/2007
Publication #:	US20090097312	Pub Dt:	04/16/2009
Title:	CONTROLLED RAMP RATES FOR METAL BITLINES DURING WRITE OPERATIONS FROM HIGH VOLTAGE DRIVER FOR MEMORY APPLICATIONS

Patent #:	8560756	Issue Dt:	10/15/2013	Application #:	11873810	Filing Dt:	10/17/2007
Publication #:	US20090106481	Pub Dt:	04/23/2009
Title:	HYBRID FLASH MEMORY DEVICE

Patent #:	7829936	Issue Dt:	11/09/2010	Application #:	11873822	Filing Dt:	10/17/2007
Publication #:	US20090101963	Pub Dt:	04/23/2009
Title:	SPLIT CHARGE STORAGE NODE INNER SPACER PROCESS

Patent #:	8017859	Issue Dt:	09/13/2011	Application #:	11873824	Filing Dt:	10/17/2007
Publication #:	US20090104432	Pub Dt:	04/23/2009
Title:	PHOTOVOLTAIC THIN COATING FOR COLLECTOR GENERATOR

Patent #:	8201258	Issue Dt:	06/12/2012	Application #:	11874036	Filing Dt:	10/17/2007
Publication #:	US20090106483	Pub Dt:	04/23/2009
Title:	SECURE PERSONALIZATION OF MEMORY-BASED ELECTRONIC DEVICES

Patent #:	7656705	Issue Dt:	02/02/2010	Application #:	11874076	Filing Dt:	10/17/2007
Publication #:	US20090103357	Pub Dt:	04/23/2009
Title:	FAST SINGLE PHASE PROGRAM ALGORITHM FOR QUADBIT

Patent #:	7410857	Issue Dt:	08/12/2008	Application #:	11878296	Filing Dt:	07/23/2007
Publication #:	US20070262374	Pub Dt:	11/15/2007
Title:	SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

Patent #:	8708710	Issue Dt:	04/29/2014	Application #:	11881969	Filing Dt:	07/30/2007
Publication #:	US20090033334	Pub Dt:	02/05/2009
Title:	CONTACT CONFIGURATION FOR UNDERTAKING TESTS ON CIRCUIT BOARD

Patent #:	7884630	Issue Dt:	02/08/2011	Application #:	11886139	Filing Dt:	03/13/2008
Publication #:	US20080191723	Pub Dt:	08/14/2008
Title:	IC CARRIER, IC SOCKET AND METHOD FOR TESTING IC DEVICE

Patent #:	7642637	Issue Dt:	01/05/2010	Application #:	11894828	Filing Dt:	08/22/2007
Publication #:	US20070290320	Pub Dt:	12/20/2007
Title:	CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Patent #:	8274107	Issue Dt:	09/25/2012	Application #:	11894921	Filing Dt:	08/22/2007
Publication #:	US20070290254	Pub Dt:	12/20/2007
Title:	EXPOSURE SYSTEM, SEMICONDUCTOR DEVICE, AND METHOD FOR FABRICATING THE SEMICONDUCTOR DEVICE

Patent #:	7759171	Issue Dt:	07/20/2010	Application #:	11895901	Filing Dt:	08/28/2007
Publication #:	US20090057883	Pub Dt:	03/05/2009
Title:	METHOD AND STRUCTURE OF MINIMIZING MOLD BLEEDING ON A SUBSTRATE SURFACE OF A SEMICONDUCTOR PACKAGE

Patent #:	NONE	Issue Dt:		Application #:	11899575	Filing Dt:	09/06/2007
Publication #:	US20090065842	Pub Dt:	03/12/2009
Title:	Ta-lined tungsten plugs for transistor-local hydrogen gathering

Patent #:	8946020	Issue Dt:	02/03/2015	Application #:	11899597	Filing Dt:	09/06/2007
Publication #:	US20090067213	Pub Dt:	03/12/2009
Title:	Method of forming controllably conductive oxide

Patent #:	7883963	Issue Dt:	02/08/2011	Application #:	11924169	Filing Dt:	10/25/2007
Publication #:	US20090108330	Pub Dt:	04/30/2009
Title:	SPLIT CHARGE STORAGE NODE OUTER SPACER PROCESS

Patent #:	7691751	Issue Dt:	04/06/2010	Application #:	11924823	Filing Dt:	10/26/2007
Publication #:	US20090111265	Pub Dt:	04/30/2009
Title:	SELECTIVE SILICIDE FORMATION USING RESIST ETCHBACK

Patent #:	8638931	Issue Dt:	01/28/2014	Application #:	11928372	Filing Dt:	10/30/2007
Publication #:	US20090109769	Pub Dt:	04/30/2009
Title:	SIGNAL DESCRAMBLING DETECTOR

Patent #:	8048586	Issue Dt:	11/01/2011	Application #:	11928864	Filing Dt:	10/30/2007
Publication #:	US20080118814	Pub Dt:	05/22/2008
Title:	FUEL CELL STACK STRUCTURE

Patent #:	8832408	Issue Dt:	09/09/2014	Application #:	11928865	Filing Dt:	10/30/2007
Publication #:	US20090113115	Pub Dt:	04/30/2009
Title:	NON-VOLATILE MEMORY ARRAY PARTITIONING ARCHITECTURE AND METHOD TO UTILIZE SINGLE LEVEL CELLS AND MULTI-LEVEL CELLS WITHIN THE SAME MEMORY

Patent #:	7768856	Issue Dt:	08/03/2010	Application #:	11929097	Filing Dt:	10/30/2007
Publication #:	US20090109742	Pub Dt:	04/30/2009
Title:	CONTROL OF TEMPERATURE SLOPE FOR BAND GAP REFERENCE VOLTAGE IN A MEMORY DEVICE

Patent #:	7567457	Issue Dt:	07/28/2009	Application #:	11929724	Filing Dt:	10/30/2007
Publication #:	US20090109721	Pub Dt:	04/30/2009
Title:	NONVOLATILE MEMORY ARRAY ARCHITECTURE

Patent #:	7995385	Issue Dt:	08/09/2011	Application #:	11929761	Filing Dt:	10/30/2007
Publication #:	US20090109758	Pub Dt:	04/30/2009
Title:	MEMORY ARRAY OF PAIRS OF NONVOLATILE MEMORY CELLS USING FOWLER-NORDHEIM PROGRAMMING AND ERASING

Patent #:	7453724	Issue Dt:	11/18/2008	Application #:	11931992	Filing Dt:	10/31/2007
Publication #:	US20080049516	Pub Dt:	02/28/2008
Title:	FLASH MEMORY DEVICE HAVING IMPROVED PROGRAM RATE

Patent #:	7915169	Issue Dt:	03/29/2011	Application #:	11934628	Filing Dt:	11/02/2007
Publication #:	US20090117734	Pub Dt:	05/07/2009
Title:	PROCESSES FOR FORMING ELECTRONIC DEVICES INCLUDING POLISHING METAL-CONTAINING LAYERS

Patent #:	7613042	Issue Dt:	11/03/2009	Application #:	11935049	Filing Dt:	11/05/2007
Publication #:	US20090116289	Pub Dt:	05/07/2009
Title:	DECODING SYSTEM CAPABLE OF REDUCING SECTOR SELECT AREA OVERHEAD FOR FLASH MEMORY

Patent #:	NONE	Issue Dt:		Application #:	11935544	Filing Dt:	11/06/2007
Publication #:	US20090114542	Pub Dt:	05/07/2009
Title:	PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING A CONDUCTIVE LAYER OVER A SEED LAYER

Patent #:	7808827	Issue Dt:	10/05/2010	Application #:	11935717	Filing Dt:	11/06/2007
Publication #:	US20090119447	Pub Dt:	05/07/2009
Title:	CONTROLLED BIT LINE DISCHARGE FOR CHANNEL ERASES IN NONVOLATILE MEMORY

Patent #:	7679972	Issue Dt:	03/16/2010	Application #:	11942526	Filing Dt:	11/19/2007
Publication #:	US20090129172	Pub Dt:	05/21/2009
Title:	HIGH RELIABLE AND LOW POWER STATIC RANDOM ACCESS MEMORY

Patent #:	8700830	Issue Dt:	04/15/2014	Application #:	11943544	Filing Dt:	11/20/2007
Publication #:	US20090132736	Pub Dt:	05/21/2009
Title:	MEMORY BUFFERING SYSTEM THAT IMPROVES READ/WRITE PERFORMANCE AND PROVIDES LOW LATENCY FOR MOBILE SYSTEMS

Patent #:	7979625	Issue Dt:	07/12/2011	Application #:	11945292	Filing Dt:	11/27/2007
Publication #:	US20090138626	Pub Dt:	05/28/2009
Title:	SPI BANK ADDRESSING SCHEME FOR MEMORY DENSITIES ABOVE 128MB

Patent #:	7984284	Issue Dt:	07/19/2011	Application #:	11945316	Filing Dt:	11/27/2007
Publication #:	US20090138694	Pub Dt:	05/28/2009
Title:	SPI AUTO-BOOT MODE

Patent #:	8898350	Issue Dt:	11/25/2014	Application #:	11945534	Filing Dt:	11/27/2007
Publication #:	US20090138628	Pub Dt:	05/28/2009
Title:	MULTI-BUS ARCHITECTURE FOR MASS STORAGE SYSTEM-ON-CHIP CONTROLLERS

Patent #:	7944746	Issue Dt:	05/17/2011	Application #:	11945785	Filing Dt:	11/27/2007
Publication #:	US20090135659	Pub Dt:	05/28/2009
Title:	ROOM TEMPERATURE DRIFT SUPPRESSION VIA SOFT PROGRAM AFTER ERASE

Patent #:	7842880	Issue Dt:	11/30/2010	Application #:	11947424	Filing Dt:	11/29/2007
Publication #:	US20090139572	Pub Dt:	06/04/2009
Title:	WEAVABLE FIBER PHOTOVOLTAIC COLLECTORS

Patent #:	7482217	Issue Dt:	01/27/2009	Application #:	11949637	Filing Dt:	12/03/2007
Title:	FORMING METAL-SEMICONDUCTOR FILMS HAVING DIFFERENT THICKNESSES WITHIN DIFFERENT REGIONS OF AN ELECTRONIC DEVICE

Patent #:	8239182	Issue Dt:	08/07/2012	Application #:	11950006	Filing Dt:	12/04/2007
Publication #:	US20090144045	Pub Dt:	06/04/2009
Title:	DATA TRANSMISSION SYSTEM-ON-CHIP MEMORY MODEL BASED VALIDATION

Patent #:	9157150	Issue Dt:	10/13/2015	Application #:	11950339	Filing Dt:	12/04/2007
Publication #:	US20090142473	Pub Dt:	06/04/2009
Title:	Method of operating a processing chamber used in forming electronic devices

Patent #:	7613044	Issue Dt:	11/03/2009	Application #:	11950811	Filing Dt:	12/05/2007
Publication #:	US20080130371	Pub Dt:	06/05/2008
Title:	METHOD AND APPARATUS FOR HIGH VOLTAGE OPERATION FOR A HIGH PERFORMANCE SEMICONDUCTOR MEMORY DEVICE

Patent #:	7948820	Issue Dt:	05/24/2011	Application #:	11951262	Filing Dt:	12/05/2007
Publication #:	US20090147587	Pub Dt:	06/11/2009
Title:	CIRCUIT PRE-CHARGE TO SENSE A MEMORY LINE

Patent #:	7633815	Issue Dt:	12/15/2009	Application #:	11951263	Filing Dt:	12/05/2007
Publication #:	US20090147585	Pub Dt:	06/11/2009
Title:	FLEXIBLE WORD LINE BOOSTING ACROSS VCC SUPPLY

Patent #:	7659569	Issue Dt:	02/09/2010	Application #:	11953690	Filing Dt:	12/10/2007
Publication #:	US20090146201	Pub Dt:	06/11/2009
Title:	WORK FUNCTION ENGINEERING FOR FN ERASE OF A MEMORY DEVICE WITH MULTIPLE CHARGE STORAGE ELEMENTS IN AN UNDERCUT REGION

Patent #:	7561484	Issue Dt:	07/14/2009	Application #:	11955802	Filing Dt:	12/13/2007
Publication #:	US20090154261	Pub Dt:	06/18/2009
Title:	REFERENCE-FREE SAMPLED SENSING

Patent #:	7746698	Issue Dt:	06/29/2010	Application #:	11956032	Filing Dt:	12/13/2007
Publication #:	US20090154246	Pub Dt:	06/18/2009
Title:	PROGRAMMING IN MEMORY DEVICES USING SOURCE BITLINE VOLTAGE BIAS

Patent #:	7827359	Issue Dt:	11/02/2010	Application #:	11957027	Filing Dt:	12/14/2007
Publication #:	US20090158005	Pub Dt:	06/18/2009
Title:	CLOCK ENCODED PRE-FETCH TO ACCESS MEMORY DATA IN CLUSTERING NETWORK ENVIRONMENT

Patent #:	NONE	Issue Dt:		Application #:	11957028	Filing Dt:	12/14/2007
Publication #:	US20090154215	Pub Dt:	06/18/2009
Title:	REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES

Patent #:	7558101	Issue Dt:	07/07/2009	Application #:	11957366	Filing Dt:	12/14/2007
Publication #:	US20090154260	Pub Dt:	06/18/2009
Title:	SCAN SENSING METHOD THAT IMPROVES SENSING MARGINS

Patent #:	7951675	Issue Dt:	05/31/2011	Application #:	11957737	Filing Dt:	12/17/2007
Publication #:	US20090152669	Pub Dt:	06/18/2009
Title:	SI TRENCH BETWEEN BITLINE HDP FOR BVDSS IMPROVEMENT

Patent #:	7602067	Issue Dt:	10/13/2009	Application #:	11957787	Filing Dt:	12/17/2007
Publication #:	US20090152617	Pub Dt:	06/18/2009
Title:	HETERO-STRUCTURE VARIABLE SILICON RICH NITRIDE FOR MULTIPLE LEVEL MEMORY FLASH MEMORY DEVICE

Patent #:	8003306	Issue Dt:	08/23/2011	Application #:	11958223	Filing Dt:	12/17/2007
Publication #:	US20090155726	Pub Dt:	06/18/2009
Title:	METHODS OF FORMING ELECTRONIC DEVICES BY ION IMPLANTING

100

Patent #:	8114736	Issue Dt:	02/14/2012	Application #:	11958254	Filing Dt:	12/17/2007
Publication #:	US20080150042	Pub Dt:	06/26/2008
Title:	INTEGRATED CIRCUIT SYSTEM WITH MEMORY SYSTEM

Assignor

BARCLAYS BANK PLC

Exec Dt:

03/12/2015

Assignees

SPANSION LLC

915 DEGUIGNE DRIVE

SUNNYVALE, CALIFORNIA 94088

SPANSION INC.

915 DEGUIGNE DRIVE

SUNNYVALE, CALIFORNIA 94088

SPANSION TECHNOLOGY LLC

915 DEGUIGNE DRIVE

SUNNYVALE, CALIFORNIA 94088

Correspondence name and address
	WILSON SONSINI GOODRICH & ROSATI
	650 PAGE MILL ROAD
	PALO ALTO, CA 94304

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