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Patent Assignment Details
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Reel/Frame:035240/0429   Pages: 305
Recorded: 03/21/2015
Attorney Dkt #:391000/1502
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4702
Page 1 of 48
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
1
Patent #:
7672151
Issue Dt:
03/02/2010
Application #:
07377168
Filing Dt:
07/10/1989
Title:
METHOD FOR READING NON-VOLATLILE FERROELECTRIC CAPACITOR MEMORY CELL
2
Patent #:
7924599
Issue Dt:
04/12/2011
Application #:
07443018
Filing Dt:
11/29/1989
Title:
NON-VOLATILE MEMORY CIRCUIT USING FERROELECTRIC CAPACITOR STORAGE ELEMENT
3
Patent #:
5376835
Issue Dt:
12/27/1994
Application #:
07964806
Filing Dt:
10/22/1992
Title:
POWER-ON RESET CIRCUIT
4
Patent #:
5335198
Issue Dt:
08/02/1994
Application #:
08057583
Filing Dt:
05/06/1993
Title:
FLASH EEPROM ARRAY WITH HIGH ENDURANCE
5
Patent #:
5367206
Issue Dt:
11/22/1994
Application #:
08078711
Filing Dt:
06/17/1993
Title:
OUTPUT BUFFER CIRCUIT FOR A LOW VOLTAGE EPROM Q
6
Patent #:
5357458
Issue Dt:
10/18/1994
Application #:
08083736
Filing Dt:
06/25/1993
Title:
SYSTEM FOR ALLOWING A CONTENT ADDRESSABLE MEMORY TO OPERATE WITH MULTIPLE POWER VOLTAGE LEVELS
7
Patent #:
5530818
Issue Dt:
06/25/1996
Application #:
08087460
Filing Dt:
07/08/1993
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE FOR OPTIONALLY SELECTING THE CORRESPONDENCE BETWEEN A CHIP-SELECT SIGNAL AND ADDRESS SPACE
8
Patent #:
5406517
Issue Dt:
04/11/1995
Application #:
08109881
Filing Dt:
08/23/1993
Title:
DISTRIBUTED NEGATIVE GATE POWER SUPPLY
9
Patent #:
5365484
Issue Dt:
11/15/1994
Application #:
08109887
Filing Dt:
08/23/1993
Title:
INDEPENDENT ARRAY GROUNDS FOR FLASH EEPROM ARRAY WITH PAGED ERASE ARCHITECTURE
10
Patent #:
5349558
Issue Dt:
09/20/1994
Application #:
08112033
Filing Dt:
08/26/1993
Title:
SECTOR-BASED REDUNDANCY ARCHITECTURE
11
Patent #:
5477499
Issue Dt:
12/19/1995
Application #:
08135224
Filing Dt:
10/13/1993
Title:
MEMORY ARCHITECTURE FOR A THREE VOLT FLASH EEPROM
12
Patent #:
5828601
Issue Dt:
10/27/1998
Application #:
08160582
Filing Dt:
12/01/1993
Title:
PROGRAMMED REFERENCE
13
Patent #:
5376573
Issue Dt:
12/27/1994
Application #:
08165445
Filing Dt:
12/10/1993
Title:
METHOD OF MAKING A FLASH EPROM DEVICE UTILIZING A SINGLE MASKING STEP FOR ETCHING AND IMPLANTING SOURCE REGIONS WITHIN THE EPROM CORE AND REDUNDANCY AREAS
14
Patent #:
5630099
Issue Dt:
05/13/1997
Application #:
08166124
Filing Dt:
12/10/1993
Title:
NON-VOLATILE MEMORY ARRAY CONTROLLER CAPABLE OF CONTROLLING MEMORY BANKS HAVING VARIABLE BIT WIDTHS
15
Patent #:
5438023
Issue Dt:
08/01/1995
Application #:
08212495
Filing Dt:
03/11/1994
Title:
PASSIVATION METHOD AND STRUCTURE FOR A FERROELECTRIC INTEGRATED CIRCUIT USING HARD CERAMIC MATERIALS OR THE LIKE
16
Patent #:
5530803
Issue Dt:
06/25/1996
Application #:
08227755
Filing Dt:
04/14/1994
Title:
METHOD AND APPARATUS FOR PROGRAMMING MEMORY DEVICES
17
Patent #:
5470773
Issue Dt:
11/28/1995
Application #:
08233174
Filing Dt:
04/25/1994
Title:
METHOD PROTECTING A STACKED GATE EDGE IN A SEMICONDUCTOR DEVICE FROM SELF ALIGNED SOURCE (SAS) ETCH
18
Patent #:
5434572
Issue Dt:
07/18/1995
Application #:
08255088
Filing Dt:
06/07/1994
Title:
SYSTEM AND METHOD FOR INITIATING COMMUNICATIONS BETWEEN A CONTROLLER AND A SELECTED SUBSET OF MULTIPLE TRANSPONDERS IN A COMMON RF FIELD
19
Patent #:
5955874
Issue Dt:
09/21/1999
Application #:
08265583
Filing Dt:
06/23/1994
Title:
SUPPLY VOLTAGE-INDEPENDENT REFERENCE VOLTAGE CIRCUIT
20
Patent #:
5384272
Issue Dt:
01/24/1995
Application #:
08266744
Filing Dt:
06/28/1994
Title:
METHOD FOR MANUFACTURING A NON-VOLATILE, VIRTUAL GROUND MEMORY ELEMENT
21
Patent #:
5541875
Issue Dt:
07/30/1996
Application #:
08269478
Filing Dt:
07/01/1994
Title:
HIGH ENERGY BURIED LAYER IMPLANT TO PROVIDE A LOW RESISTANCE P-WELL IN A FLASH EPROM ARRAY
22
Patent #:
5576991
Issue Dt:
11/19/1996
Application #:
08269540
Filing Dt:
07/01/1994
Title:
MULTISTEPPED THRESHOLD CONVERGENCE FOR A FLASH MEMORY ARRAY
23
Patent #:
5468981
Issue Dt:
11/21/1995
Application #:
08299868
Filing Dt:
09/01/1994
Title:
SELF-ALIGNED BURIED CHANNEL/JUNCTION STACKED GATE FLASH MEMORY CELL
24
Patent #:
5574685
Issue Dt:
11/12/1996
Application #:
08299876
Filing Dt:
09/01/1994
Title:
SELF-ALIGNED BURIED CHANNEL/JUNCTION STACKED GATE FLASH MEMORY CELL
25
Patent #:
5572459
Issue Dt:
11/05/1996
Application #:
08306686
Filing Dt:
09/16/1994
Title:
VOLTAGE REFERENCE FOR A FERROELECTRIC 1T/1C BASED MEMORY
26
Patent #:
5528171
Issue Dt:
06/18/1996
Application #:
08307466
Filing Dt:
09/19/1994
Title:
ECL-TO-COMS SIGNAL LEVEL CONVERTER
27
Patent #:
5485423
Issue Dt:
01/16/1996
Application #:
08320368
Filing Dt:
10/11/1994
Title:
METHOD FOR ELIMINATING OF CYCLING-INDUCED ELECTRON TRAPPING IN THE TUNNELING OXIDE OF 5 VOLT ONLY FLASH EEPROMS
28
Patent #:
5457336
Issue Dt:
10/10/1995
Application #:
08322811
Filing Dt:
10/13/1994
Title:
NON-VOLATILE MEMORY STRUCTURE INCLUDING PROTECTION AND STRUCTURE FOR MAINTAINING THRESHOLD STABILITY
29
Patent #:
5534731
Issue Dt:
07/09/1996
Application #:
08330871
Filing Dt:
10/28/1994
Title:
LAYERED LOW DIELECTRIC CONSTANT TECHNOLOGY
30
Patent #:
5550405
Issue Dt:
08/27/1996
Application #:
08360856
Filing Dt:
12/21/1994
Title:
NOVEL PROCESSING TECHNIQUES FOR ACHIEVING PRODUCTION-WORTHY, LOW DIELECTRIC, LOW INTERCONNECT RESISTANCE AND HIGH PERFORMANCE ICS
31
Patent #:
5481494
Issue Dt:
01/02/1996
Application #:
08362346
Filing Dt:
12/22/1994
Title:
METHOD FOR TIGHTENING VT DISTRIBUTION OF 5 VOLT-ONLY FLASH EEPROMS
32
Patent #:
5488327
Issue Dt:
01/30/1996
Application #:
08365432
Filing Dt:
12/28/1994
Title:
SUPPLY VOLTAGE GENERATOR
33
Patent #:
5656521
Issue Dt:
08/12/1997
Application #:
08371704
Filing Dt:
01/12/1995
Title:
METHOD OF ERASING UPROM TRANSISTORS
34
Patent #:
5801076
Issue Dt:
09/01/1998
Application #:
08393138
Filing Dt:
02/21/1995
Title:
METHOD OF MAKING NON-VOLATILE MEMORY DEVICE HAVING A FLOATING GATE WITH ENHANCED CHARGE RETENTION
35
Patent #:
5491657
Issue Dt:
02/13/1996
Application #:
08393636
Filing Dt:
02/24/1995
Title:
METHODS FOR BULK (OR BYTE) CHARGING AND DISCHARGING AN ARRAY OF FLASH EEPROM MEMORY CELLS
36
Patent #:
5578867
Issue Dt:
11/26/1996
Application #:
08394467
Filing Dt:
02/27/1995
Title:
PASSIVATION METHOD AND STRUCTURE USING HARD CERAMIC MATERIALS OR THE LIKE
37
Patent #:
5482881
Issue Dt:
01/09/1996
Application #:
08403460
Filing Dt:
03/14/1995
Title:
METHOD OF MAKING FLASH EEPROM MEMORY WITH REDUCED COLUMN LEAKAGE CURRENT
38
Patent #:
5617310
Issue Dt:
04/01/1997
Application #:
08405016
Filing Dt:
03/16/1995
Title:
MULTIPLE OPERATION MODE MICROCONTROLLER
39
Patent #:
5617347
Issue Dt:
04/01/1997
Application #:
08406305
Filing Dt:
03/17/1995
Title:
CACHE MEMORY SYSTEM AND METHOD THEREOF FOR STORING A STAGED MEMORY ITEM AND A CACHE TAG WITHIN A SINGLE CACHE ARRAY STRUCTURE
40
Patent #:
5594382
Issue Dt:
01/14/1997
Application #:
08407248
Filing Dt:
03/20/1995
Title:
CONSTANT VOLTAGE CIRCUIT
41
Patent #:
5592410
Issue Dt:
01/07/1997
Application #:
08420293
Filing Dt:
04/10/1995
Title:
CIRCUIT AND METHOD FOR REDUCING A COMPENSATION OF A FERROELECTRIC CAPACITOR BY MULTIPLE PULSING OF THE PLATE LINE FOLLOWING A WRITE OPERATION
42
Patent #:
5530668
Issue Dt:
06/25/1996
Application #:
08420752
Filing Dt:
04/12/1995
Title:
FERROELECTRIC MEMORY SENSING SCHEME USING BIT LINES PRECHARGED TO A LOGIC ONE VOLTAGE
43
Patent #:
5617357
Issue Dt:
04/01/1997
Application #:
08420989
Filing Dt:
04/07/1995
Title:
FLASH EEPROM MEMORY WITH IMPROVED DISCHARGE SPEED USING SUBSTRATE BIAS AND METHOD THEREFOR
44
Patent #:
5579261
Issue Dt:
11/26/1996
Application #:
08426716
Filing Dt:
04/21/1995
Title:
REDUCED COLUMN LEAKAGE DURING PROGRAMMING FOR A FLASH MEMORY ARRAY
45
Patent #:
5581502
Issue Dt:
12/03/1996
Application #:
08432623
Filing Dt:
05/02/1995
Title:
METHOD FOR READING A NON-VOLATILE MEMORY ARRAY
46
Patent #:
5534455
Issue Dt:
07/09/1996
Application #:
08433267
Filing Dt:
05/02/1995
Title:
METHOD FOR PROTECTING A STACKED GATE EDGE IN A SEMICONDUCTOR DEVICE FROM SELF ALIGNED SOURCE (SAS) ETCH
47
Patent #:
5596531
Issue Dt:
01/21/1997
Application #:
08450167
Filing Dt:
05/25/1995
Title:
METHOD FOR DECREASING THE DISCHARGE TIME OF A FLASH EPROM CELL
48
Patent #:
5671186
Issue Dt:
09/23/1997
Application #:
08457588
Filing Dt:
06/01/1995
Title:
SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINE PRECHARGER
49
Patent #:
5693566
Issue Dt:
12/02/1997
Application #:
08459957
Filing Dt:
06/02/1995
Title:
LAYERED LOW DIELECTRIC CONSTANT TECHNOLOGY
50
Patent #:
5517443
Issue Dt:
05/14/1996
Application #:
08460603
Filing Dt:
06/01/1995
Title:
METHOD AND SYSTEM FOR PROTECTING A STACKED GATE EDGE IN A SEMI- CONDUCTOR DEVICE FROM SELF ALIGNED SOURCE (SAS) ETCH IN A SEMI- CONDUCTOR DEVICE
51
Patent #:
5679608
Issue Dt:
10/21/1997
Application #:
08463448
Filing Dt:
06/05/1995
Title:
NOVEL PROCESSING TECHNIQUES FOR ACHIEVING PRODUCTION-WORTHY, LOW DIELECTRIC, LOW INTERCONNECT RESISTANCE AND HIGH PERFORMANCE IC
52
Patent #:
5708588
Issue Dt:
01/13/1998
Application #:
08464024
Filing Dt:
06/05/1995
Title:
FLASH EEPROM MEMORY WITH IMPROVED DISCHARGED SPEED USING SUBSTRATE BIAS AND METHOD THEREFOR
53
Patent #:
5889428
Issue Dt:
03/30/1999
Application #:
08468861
Filing Dt:
06/06/1995
Title:
LOW LOSS, REGULATED CHARGE PUMP WITH INTEGRATED FERROELECTRIC CAPACITORS
54
Patent #:
5680345
Issue Dt:
10/21/1997
Application #:
08469953
Filing Dt:
06/06/1995
Title:
NONVOLATILE MEMORY CELL WITH VERTICAL GATE OVERLAP AND ZERO BIRDS BEAKS
55
Patent #:
5661055
Issue Dt:
08/26/1997
Application #:
08474610
Filing Dt:
06/07/1995
Title:
METHOD OF MAKING NONVOLATILE MEMORY CELL WITH VERICAL GATE OVERLAP AND ZERO BIRDS'BEAKS
56
Patent #:
5656513
Issue Dt:
08/12/1997
Application #:
08474879
Filing Dt:
06/07/1995
Title:
NONVOLATILE MEMORY CELL FORMED USING SELF ALIGNED SOURCE IMPLANT
57
Patent #:
5579274
Issue Dt:
11/26/1996
Application #:
08483038
Filing Dt:
06/06/1995
Title:
A SENSE CIRCUIT FOR A FLASH EEPROM CELL HAVING A NEGATIVE DELTA THRESHOLD VOLTAGE
58
Patent #:
5598369
Issue Dt:
01/28/1997
Application #:
08484252
Filing Dt:
06/07/1995
Title:
FLASH EEPROM ARRAY WITH FLOATING SUBSTRATE ERASE OPERATION
59
Patent #:
5553018
Issue Dt:
09/03/1996
Application #:
08484580
Filing Dt:
06/07/1995
Title:
NONVOLATILE MEMORY CELL FORMED USING SELF ALIGNED SOURCE IMPLANT
60
Patent #:
5650964
Issue Dt:
07/22/1997
Application #:
08486192
Filing Dt:
06/07/1995
Title:
METHOD OF INHIBITING DEGRADATION OF ULTRA SHORT CHANNEL CHARGE-CARRYING DEVICES DURING DISCHARGE
61
Patent #:
5546340
Issue Dt:
08/13/1996
Application #:
08487252
Filing Dt:
06/13/1995
Title:
NON-VOLATILE MEMORY ARRAY WITH OVER-ERASE CORRECTION
62
Patent #:
5590076
Issue Dt:
12/31/1996
Application #:
08493138
Filing Dt:
06/21/1995
Title:
CHANNEL HOT-CARRIER PAGE WRITE
63
Patent #:
5679599
Issue Dt:
10/21/1997
Application #:
08493640
Filing Dt:
06/22/1995
Title:
ISOLATION USING SELF-ALIGNED TRENCH FORMATION AND CONVENTIONAL LOCOS
64
Patent #:
5552331
Issue Dt:
09/03/1996
Application #:
08500648
Filing Dt:
07/11/1995
Title:
PROCESS FOR SELF-ALIGNED SOURCE FOR HIGH DENSITY MEMORY
65
Patent #:
5561620
Issue Dt:
10/01/1996
Application #:
08508425
Filing Dt:
07/31/1995
Title:
FLASH EEPROM ARRAY WITH FLOATING SUBSTRATE ERASE OPERATION
66
Patent #:
5945705
Issue Dt:
08/31/1999
Application #:
08510118
Filing Dt:
08/01/1995
Title:
THREE-DIMENSIONAL NON-VOLATILE MEMORY
67
Patent #:
5565797
Issue Dt:
10/15/1996
Application #:
08512222
Filing Dt:
08/07/1995
Title:
CLOCK SIGNAL GENERATING DEVICE
68
Patent #:
5751507
Issue Dt:
05/12/1998
Application #:
08515433
Filing Dt:
08/15/1995
Title:
KSD PROTECTION APPARATUS HAVING FLOATING ESD BUS AND SEMICONDUCTOR STRUCTURE
69
Patent #:
5598366
Issue Dt:
01/28/1997
Application #:
08515558
Filing Dt:
08/16/1995
Title:
FERROELECTRIC NONVOLATILE RANDOM ACCESS MEMORY UTILIZING SELF-BOOTSTRAPPING PLATE LINE SEGMENT DRIVERS
70
Patent #:
5608246
Issue Dt:
03/04/1997
Application #:
08525497
Filing Dt:
09/08/1995
Title:
INTEGRATION OF HIGH VALUE CAPACITOR WITH FERROELECTRIC MEMORY
71
Patent #:
5822762
Issue Dt:
10/13/1998
Application #:
08533965
Filing Dt:
09/26/1995
Title:
INFORMATION PROCESSING DEVICE WITH DECISION CIRCUITS AND PARTITIONED ADDRESS AREAS
72
Patent #:
5608672
Issue Dt:
03/04/1997
Application #:
08534141
Filing Dt:
09/26/1995
Title:
CORRECTION METHOD LEADING TO A UNIFORM THRESHOLD VOLTAGE DISTRIBUTION FOR A FLASH EPROM
73
Patent #:
5726920
Issue Dt:
03/10/1998
Application #:
08537116
Filing Dt:
09/29/1995
Title:
WATCHDOG SYSTEM HAVING DATA DIFFERENTIATING MEANS FOR USE IN MONITORING OF SEMICONDUCTOR WAFER TESTING LINE
74
Patent #:
5635856
Issue Dt:
06/03/1997
Application #:
08538519
Filing Dt:
10/03/1995
Title:
HIGH SPEED PROGRAMMABLE MACROCELL WITH COMBINED PATH FOR STORAGE AND COMBINATORIAL MODES
75
Patent #:
5701024
Issue Dt:
12/23/1997
Application #:
08539645
Filing Dt:
10/05/1995
Title:
ELECTROSTATIC DISCHARGE (ESD) PROTECTION STRUCTURE FOR HIGH VOLTAGE PINS
76
Patent #:
5629892
Issue Dt:
05/13/1997
Application #:
08543684
Filing Dt:
10/16/1995
Title:
FLASH EEPROM MEMORY WITH SEPARATE REFERENCE ARRAY
77
Patent #:
5909624
Issue Dt:
06/01/1999
Application #:
08544470
Filing Dt:
10/18/1995
Title:
METHOD OF MAKING INTEGRATION OF HIGH VALUE CAPACITOR WITH FERRO- ELECTRIC MEMORY
78
Patent #:
5642311
Issue Dt:
06/24/1997
Application #:
08547494
Filing Dt:
10/24/1995
Title:
OVERERASE CORRECTION FOR FLASH MEMORY WHICH LIMITS OVERERASE AND PREVENTS ERASE VERIFY ERRORS
79
Patent #:
5684434
Issue Dt:
11/04/1997
Application #:
08549915
Filing Dt:
10/30/1995
Title:
ERASABLE AND PROGRAMMABLE SINGLE CHIP CLOCK GENERATOR
80
Patent #:
5638008
Issue Dt:
06/10/1997
Application #:
08550165
Filing Dt:
10/30/1995
Title:
METHOD AND APPARATUS FOR GENERATING AN ASYNCHRONOUSLY CLOCKED SIGNAL IN A SYNCHRONOUSLY CLOCKED PROGRAMMABLE DEVICE
81
Patent #:
5650966
Issue Dt:
07/22/1997
Application #:
08551422
Filing Dt:
11/01/1995
Title:
TEMPERATURE COMPENSATED REFERENCE FOR OVERERASE CORRECTION CIRCUITRY IN A FLASH MEMORY
82
Patent #:
5644531
Issue Dt:
07/01/1997
Application #:
08551705
Filing Dt:
11/01/1995
Title:
PROGRAM ALGORITHM FOR LOW VOLTAGE SINGLE POWER SUPPLY FLASH MEMORIES
83
Patent #:
5789295
Issue Dt:
08/04/1998
Application #:
08559082
Filing Dt:
11/17/1995
Title:
METHOD OF ELIMINATING OR REDUCING POLY1 OXIDATION AT STACKED GATE EDGE IN FLASH EPROM PROCESS
84
Patent #:
5708387
Issue Dt:
01/13/1998
Application #:
08560459
Filing Dt:
11/17/1995
Title:
FAST 3-STATE BOOSTER CIRCUIT
85
Patent #:
5680348
Issue Dt:
10/21/1997
Application #:
08566204
Filing Dt:
12/01/1995
Title:
POWER SUPPLY INDEPENDENT CURRENT SOURCE FOR FLASH EPROM ERASURE
86
Patent #:
5981364
Issue Dt:
11/09/1999
Application #:
08568195
Filing Dt:
12/06/1995
Title:
METHOD OF FORMING A SILICON GATE TO PRODUCE SILICON DEVICES WITH IMPROVED PERFORMANCE
87
Patent #:
5869385
Issue Dt:
02/09/1999
Application #:
08569704
Filing Dt:
12/08/1995
Title:
SELECTIVELY OXIDIZED FIELD OXIDE REGION
88
Patent #:
5898701
Issue Dt:
04/27/1999
Application #:
08576451
Filing Dt:
12/21/1995
Title:
METHOD AND APPARATUS FOR TESTING A DEVICE
89
Patent #:
5848285
Issue Dt:
12/08/1998
Application #:
08578094
Filing Dt:
12/26/1995
Title:
MACROCELL HAVING A DUAL PURPOSE INPUT REGISTER FOR USE IN A LOGIC DEVICE
90
Patent #:
5811334
Issue Dt:
09/22/1998
Application #:
08578178
Filing Dt:
12/29/1995
Title:
WAFER CLEANING PROCEDURE USEFUL IN THE MANUFACTURE OF A NON-VOLATILE MEMORY DEVICE
91
Patent #:
5739667
Issue Dt:
04/14/1998
Application #:
08578805
Filing Dt:
12/26/1995
Title:
CONTROL SYSTEM FOR CHARGING BATTERIES AND ELECTRONIC APPARATUS USING SAME
92
Patent #:
5652182
Issue Dt:
07/29/1997
Application #:
08581061
Filing Dt:
12/29/1995
Title:
DISPOSABLE POSTS FOR SELF-ALIGNED NON-ENCLOSED CONTACTS
93
Patent #:
6786998
Issue Dt:
09/07/2004
Application #:
08581347
Filing Dt:
12/29/1995
Title:
WAFER TEMPERATURE CONTROL APPARATUS AND METHOD
94
Patent #:
5776811
Issue Dt:
07/07/1998
Application #:
08582720
Filing Dt:
01/04/1996
Title:
SIMPLIFIED PROCESS FOR FABRICATING FLASH EEPROM CELLS
95
Patent #:
5682356
Issue Dt:
10/28/1997
Application #:
08584530
Filing Dt:
01/11/1996
Title:
MULTIPLE WORD WIDTH MEMORY ARRAY CLOCKING SCHEME FOR READING WORDS FROM A MEMORY ARRAY
96
Patent #:
6579777
Issue Dt:
06/17/2003
Application #:
08587417
Filing Dt:
01/16/1996
Title:
METHOD OF FORMING LOCAL OXIDATION WITH SLOPED SILICON RECESS
97
Patent #:
5814853
Issue Dt:
09/29/1998
Application #:
08589750
Filing Dt:
01/22/1996
Title:
SOURCELESS FLOATING GATE MEMORY DEVICE AND METHOD OF STORING DATA
98
Patent #:
6510487
Issue Dt:
01/21/2003
Application #:
08592868
Filing Dt:
01/24/1996
Title:
DESIGN ARCHITECTURE FOR A PARALLEL AND SERIAL PROGRAMMING INTERFACE
99
Patent #:
5606294
Issue Dt:
02/25/1997
Application #:
08593748
Filing Dt:
01/29/1996
Title:
AUTOMATIC GAIN CONTROL CIRCUIT AND METHOD
100
Patent #:
5617057
Issue Dt:
04/01/1997
Application #:
08594256
Filing Dt:
01/30/1996
Title:
PASS TRANSISTOR VOLTAGE CONTROL CIRCUIT
Assignors
1
CYPRESS SEMICONDUCTOR CORPORATION
Exec Dt:
03/12/2015
2
SPANSION LLC
Exec Dt:
03/12/2015
Assignee
1
MORGAN STANLEY SENIOR FUNDING, INC.
1585 BROADWAY
NEW YORK, NEW YORK 10036
Correspondence name and address
SKADDEN, ARPS, SLATE, MEAGHER & FLOM LLP
FOUR TIMES SQUARE
KEN KUMAYAMA, ESQ.
NEW YORK, NY 10036

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