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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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09833307
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Filing Dt:
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04/11/2001
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Publication #:
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Pub Dt:
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04/25/2002
| | | | |
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Title:
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DUAL BIT ISOLATION SCHEME FOR FLASH MEMORY DEVICES HAVING POLYSILICON FLOATING GATES
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09834219
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Filing Dt:
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04/12/2001
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Title:
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I/O CELL ARCHITECTURE FOR CPLDS
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09834419
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Filing Dt:
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04/12/2001
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Title:
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SEMICONDUCTOR DEVICE HAVING GATE EDGES PROTECTED FROM CHARGE GAIN/LOSS
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Patent #:
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Issue Dt:
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11/15/2005
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Application #:
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09836065
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Filing Dt:
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04/16/2001
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Publication #:
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Pub Dt:
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10/17/2002
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Title:
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SYSTEM AND METHOD FOR ERASE TEST OF INTEGRATED CIRCUIT DEVICE HAVING NON-HOMOGENEOUSLY SIZED SECTORS
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09842288
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Filing Dt:
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04/25/2001
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Title:
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ACCURATE VERIFY APPARATUS AND METHOD FOR NOR FLASH MEMORY CELLS IN THE PRESENCE OF HIGH COLUMN LEAKAGE
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09842966
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Filing Dt:
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04/25/2001
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Title:
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PRECISION CRYSTAL OSCILLATOR CIRCUIT USED IN MICROCONTROLLER
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09844692
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Filing Dt:
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04/27/2001
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Publication #:
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Pub Dt:
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10/31/2002
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Title:
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METHOD AND SYSTEM FOR REDUCING THINNING OF FIELD ISOLATION STRUCTURES IN A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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09844785
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Filing Dt:
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04/27/2001
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Title:
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MASTER/DUAL-SLAVE D TYPE FLIP-FLOP
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09846119
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Filing Dt:
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04/30/2001
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Title:
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METHOD OF MAKING A PLANARIZED SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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12/13/2005
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Application #:
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09846146
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Filing Dt:
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04/30/2001
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Title:
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CIRCUIT FOR CORRECTION OF DIFFERENTIAL SIGNAL PATH DELAYS IN A PLL
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09846666
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Filing Dt:
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04/30/2001
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Title:
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METHOD OF DOPING WELLS, CHANNELS, AND GATES OF DUAL GATE CMOS TECHNOLOGY WITH REDUCED NUMBER OF MASKS
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09848568
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Filing Dt:
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05/02/2001
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Title:
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FLEXIBLE INPUT STRUCTURE FOR AN EMBEDDED MEMORY
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Patent #:
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Issue Dt:
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12/14/2004
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Application #:
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09849047
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Filing Dt:
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05/04/2001
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Title:
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BURIED LAYER SUBSTRATE ISOLATION IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09849164
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Filing Dt:
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05/04/2001
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Title:
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REDUCED STATIC PHASE ERROR CMOS PLL CHARGE PUMP
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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09849214
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Filing Dt:
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05/04/2001
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Title:
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BIT INTERLEAVED DATA SERIAL INTERFACE
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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09850468
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Filing Dt:
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05/07/2001
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Title:
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USB PERIPHERAL CONTAINING ITS OWN DEVICE DRIVER
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09850484
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Filing Dt:
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05/07/2001
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Title:
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METHOD FOR FORMING SELF-ALIGNED CONTACTS USING CONSUMABLE SPACERS
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09851773
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Filing Dt:
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05/09/2001
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Title:
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THRESHOLD VOLTAGE COMPACTING FOR NON-VOLATILE SEMICONDUCTOR MEMORY DESIGNS
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09855411
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Filing Dt:
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05/15/2001
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Title:
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CURRENT STEERING REDUCED BITLINE VOLTAGE SWING, SENSE AMPLIFIER
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Patent #:
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Issue Dt:
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10/04/2005
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Application #:
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09855868
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Filing Dt:
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05/14/2001
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Title:
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PROTECTING ACCESS TO MICROCONTROLLER MEMORY BLOCKS
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Patent #:
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Issue Dt:
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09/20/2005
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Application #:
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09861026
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Filing Dt:
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05/17/2001
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Title:
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METHOD FOR INTERFACING A SYNCHRONOUS MEMORY TO AN ASYNCHRONOUS MEMORY INTERFACE AND LOGIC OF SAME
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09861031
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Filing Dt:
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05/18/2001
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Title:
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METHOD OF CHANNEL HOT ELECTRON PROGRAMMING FOR SHORT CHANNEL NOR FLASH ARRAYS
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09864051
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Filing Dt:
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05/23/2001
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Title:
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LOW OPERATING VOLTAGE CRYSTAL OSCILLATOR
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09864851
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Filing Dt:
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05/24/2001
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Publication #:
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Pub Dt:
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11/28/2002
| | | | |
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Title:
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TWO STAGE LOW VOLTAGE FERROELECTRIC BOOST CIRCUIT
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09864858
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Filing Dt:
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05/24/2001
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Title:
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CMOS BOOSTING CIRCUIT UTILIZING FERROELECTRIC CAPACITORS
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09866957
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Filing Dt:
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05/29/2001
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Publication #:
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Pub Dt:
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11/01/2001
| | | | |
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Title:
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HOT METALLIZATION PROCESS
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09867132
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Filing Dt:
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05/29/2001
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Title:
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MOS OUTPUT DRIVER, AND CIRCUIT AND METHOD OF CONTROLLING SAME
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09871172
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Filing Dt:
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05/31/2001
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Title:
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NON-VOLATILE STATIC MEMORY CELL
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09873643
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Filing Dt:
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06/04/2001
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Title:
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METHOD AND APPARATUS FOR BOOSTING BITLINES FOR LOW VCC READ
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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09873772
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Filing Dt:
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06/04/2001
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Publication #:
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Pub Dt:
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01/03/2002
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Title:
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CAPACITIVELY COUPLED FERROELECTRIC RANDOM ACCESS MEMORY CELL AND A METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09873927
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Filing Dt:
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06/04/2001
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Title:
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METHODS AND APPARATUS FOR READING A CAM CELL USING BOOSTED AND REGULATED GATE VOLTAGE
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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09875056
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Filing Dt:
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06/05/2001
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Title:
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METHOD AND SYSTEM FOR QUALIFYING AN ONO LAYER IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09875073
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Filing Dt:
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06/05/2001
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Title:
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METHOD AND SYSTEM FOR QUALIFYING AN ONO LAYER IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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02/27/2007
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09875599
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06/05/2001
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Title:
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METHOD AND APPARATUS FOR PROGRAMMING A FLASH MEMORY
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09875708
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Filing Dt:
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06/05/2001
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Title:
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METHOD AND AN APPARATUS FOR SYNTHESIZING A PROGRAMMABLE LOGIC CIRCUIT
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09876981
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06/08/2001
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Title:
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WIRED ADDRESS COMPARE CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09877657
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Filing Dt:
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06/07/2001
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Title:
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METASTABILITY RECOVERY CIRCUIT
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09877658
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Filing Dt:
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06/07/2001
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Title:
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DISCRIMINATOR CIRCUIT
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Patent #:
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Issue Dt:
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11/30/2004
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Application #:
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09877659
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Filing Dt:
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06/07/2001
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Title:
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METHOD AND APPARATUS FOR THE USE OF DISCRIMINATORS FOR PRIORITY ARBITRATION
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09877660
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Filing Dt:
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06/07/2001
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Title:
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MULTIPORT ARBITRATION USING PHASED LOCKING ARBITERS
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09877905
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Filing Dt:
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06/07/2001
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Title:
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SUBSTRATE ISOLATED TRANSISTOR
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09878433
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Filing Dt:
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06/11/2001
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Publication #:
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Pub Dt:
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05/09/2002
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Title:
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RANDOM ACCESS MEMORY HAVING A READ/WRITE ADDRESS BUS AND PROCESS FOR WRITING TO AND READING FROM THE SAME
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Issue Dt:
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09/03/2002
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Application #:
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09878434
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Filing Dt:
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06/11/2001
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Publication #:
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Pub Dt:
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11/22/2001
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Title:
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RANDOM ACCESS MEMORY HAVING INDEPENDENT READ PORT AND WRITE PORT AND PROCESS FOR WRITING TO AND READING FROM THE SAME
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Issue Dt:
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12/10/2002
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Application #:
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09878488
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Filing Dt:
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06/11/2001
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Title:
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SYSTEM FOR RECONFIGURING A PERIPHERAL DEVICE BY DOWNLOADING INFORMATION FROM A HOST AND ELECTRONICALLY SIMULATING A PHYSICAL DISCONNECTION AND RECONNECTION TO RECONFIGURE THE DEVICE
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09879738
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Filing Dt:
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06/12/2001
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Title:
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NOVEL RE-OXIDATION APPROACH TO IMPROVE PERIPHERAL GATE OXIDE INTEGRITY IN A TUNNEL NITRIDE OXIDATION PROCESS
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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09880366
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Filing Dt:
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06/13/2001
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Title:
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METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL USING A BAKING PROCESS
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09880367
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Filing Dt:
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06/13/2001
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Title:
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METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL USING A DRAIN BIAS
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09881354
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Filing Dt:
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06/14/2001
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Title:
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OUTPUT BUFFER CROSSING POINT COMPENSATION
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09882242
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Filing Dt:
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06/15/2001
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Title:
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SPECIES IMPLANTATION FOR MINIMIZING INTERFACE DEFECT DENSITY IN FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09882898
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Filing Dt:
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06/15/2001
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Title:
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BLOCK REDUNDANCY IN ULTRA LOW POWER MEMORY CIRCUITS
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09884330
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Filing Dt:
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06/19/2001
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Title:
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METHOD OF PLACING DIE TO MINIMIZE DIE-TO-DIE ROUTING COMPLEXITY ON A SUBSTRATE
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Issue Dt:
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09/24/2002
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Application #:
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09884402
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Filing Dt:
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06/19/2001
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Title:
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METHOD OF DRAIN AVALANCHE PROGRAMMING OF A NON-VOLATILE MEMORY CELL
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Issue Dt:
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09/24/2002
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Application #:
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09884409
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Filing Dt:
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06/19/2001
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Title:
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METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL USING A SUBSTRATE BIAS
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Issue Dt:
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09/10/2002
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Application #:
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09884565
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Filing Dt:
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06/19/2001
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Title:
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LOW COLUMN LEAKAGE NOR FLASH ARRAY-DOUBLE CELL IMPLEMENTATION
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Issue Dt:
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04/09/2002
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Application #:
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09884583
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Filing Dt:
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06/19/2001
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Title:
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Ceiling test mode to characterize the threshold voltage distribution of over programmed memory cells
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Issue Dt:
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10/15/2002
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Application #:
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09885490
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Filing Dt:
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06/20/2001
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Title:
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METHOD OF MANUFACTURING SPACER ETCH MASK FOR SILICON-OXIDE-NITRIDE-OXIDE-SILICON (SONOS) TYPE NONVOLATILE MEMORY
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Issue Dt:
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01/28/2003
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09886861
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Filing Dt:
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06/21/2001
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Title:
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ERASE METHOD FOR DUAL BIT VIRTUAL GROUND FLASH
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Issue Dt:
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02/08/2005
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Application #:
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09887923
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Filing Dt:
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06/22/2001
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Title:
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NOVEL METHOD AND SYSTEM FOR INTERACTION BETWEEN A PROCESSOR AND A POWER ON RESET CIRCUIT TO DYNAMICALLY CONTROL POWER STATES IN A MICROCONTROLLER
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Issue Dt:
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03/15/2005
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Application #:
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09887955
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Filing Dt:
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06/22/2001
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Title:
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NOVEL POWER ON RESET CIRCUIT FOR A MICROCONTROLLER
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Issue Dt:
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09/02/2003
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Application #:
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09891768
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Filing Dt:
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06/25/2001
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Title:
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METHOD AND APPARATUS FOR PERFORMING ELECTRICAL DISTANCE CHECK
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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09891885
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Filing Dt:
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06/26/2001
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Publication #:
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Pub Dt:
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12/26/2002
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Title:
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ESD IMPLANT FOLLOWING SPACER DEPOSITION
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Issue Dt:
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03/11/2003
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Application #:
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09892164
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Filing Dt:
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06/26/2001
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Title:
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SONOS LATCH AND APPLICATION
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Issue Dt:
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07/23/2002
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Application #:
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09892189
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Filing Dt:
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06/26/2001
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Title:
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MODULATED CHARGE PUMP WHICH USES AN ANALOG TO DIGITAL CONVERTER TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS
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Issue Dt:
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10/14/2003
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Application #:
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09892431
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Filing Dt:
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06/26/2001
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Publication #:
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Pub Dt:
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01/24/2002
| | | | |
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Title:
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BANK SELECTOR CIRCUIT FOR A SIMULTANEOUS OPERATION FLASH MEMORY DEVICE WITH A FLEXIBLE BANK PARTITION ARCHITECTURE
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09892685
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Filing Dt:
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06/27/2001
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Title:
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HIGH DENSITY FLASH EEPROM ARRAY WITH SOURCE SIDE INJECTION
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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09893048
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Filing Dt:
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06/26/2001
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Title:
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MICROCONTROLLER HAVING AN ON-CHIP HIGH GAIN AMPLIFIER
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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09893050
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Filing Dt:
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06/26/2001
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Title:
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MULTIPLE USE OF MICROCONTROLLER PAD
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Patent #:
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Issue Dt:
|
02/10/2004
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Application #:
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09893161
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Filing Dt:
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06/27/2001
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Title:
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ARCHITECTURE OF A PLL WITH DYNAMIC FREQUENCY CONTROL ON A PLD
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09893279
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Filing Dt:
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06/27/2001
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Title:
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SOURCE DRAIN IMPLANT DURING ONO FORMATION FOR IMPROVED ISOLATION OF SONOS DEVICES
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Patent #:
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Issue Dt:
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07/16/2002
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Application #:
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09894172
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Filing Dt:
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06/27/2001
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Title:
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COUNTER LOGIC FOR MULTIPLE MEMORY CONFIGURATION
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09894220
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Filing Dt:
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06/27/2001
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Title:
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METHOD TO IMPROVE ROUTABILITY IN PROGRAMMABLE LOGIC DEVICES VIA PRIORITIZED AUGMENTED FLOWS
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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09895114
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Filing Dt:
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06/29/2001
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Title:
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METHOD AND APPARATUS FOR FAST LIMITED CORE AREA ACCESS AND CROSS-PORT WORD SIZE MULTIPLICATION IN SYNCHRONOUS MULTIPORT MEMORIES
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Patent #:
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Issue Dt:
|
09/03/2002
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Application #:
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09895305
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Filing Dt:
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06/30/2001
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Title:
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HIGH SPEED ASYNCHRONOUS AND PROGRAMMABLE STATE MACHINE FOR GENERATING ALMOST EMPTY SYNCHRONOUS FLAGS IN A SYNCHRONOUS FIFO
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Patent #:
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Issue Dt:
|
11/29/2005
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Application #:
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09895306
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Filing Dt:
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06/29/2001
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Title:
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HIGH SPEED ASYNCHRONOUS AND PROGRAMMABLE STATE MACHINE FOR GENERATING ALMOST FULL SYNCHRONOUS FLAGS IN A SYNCHRONOUS FIFO
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09899721
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Filing Dt:
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07/05/2001
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Title:
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METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL USING A VERTICAL ELECTRIC FIELD
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Patent #:
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Issue Dt:
|
03/21/2006
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Application #:
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09899871
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Filing Dt:
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07/06/2001
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Title:
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METHOD AND SYSTEM FOR CLEANING A POLISHING PAD
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Patent #:
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Issue Dt:
|
02/11/2003
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Application #:
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09902332
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Filing Dt:
|
07/10/2001
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Title:
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USING HOT CARRIER INJECTION TO CONTROL OVER-PROGRAMMING IN A NON-VOLATILE MEMORY CELL HAVING AN OXIDE-NITRIDE-OXIDE (ONO) STRUCTURE
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Patent #:
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Issue Dt:
|
07/13/2004
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Application #:
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09902837
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Filing Dt:
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07/10/2001
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Title:
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METHOD AND SYSTEM FOR SPATIAL UNIFORM POLISHING
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Patent #:
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Issue Dt:
|
08/23/2005
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Application #:
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09904042
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Filing Dt:
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07/11/2001
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Title:
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RECESSED TUNNEL OXIDE PROFILE FOR IMPROVED RELIABILITY IN NAND DEVICES
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Patent #:
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Issue Dt:
|
07/08/2003
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Application #:
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09904089
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Filing Dt:
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07/12/2001
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Title:
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OXIDE/NITRIDE OR OXIDE/NITRIDE/OXIDE THICKNESS MEASUREMENT USING SCATTEROMETRY
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Patent #:
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Issue Dt:
|
03/11/2003
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Application #:
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09904328
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Filing Dt:
|
07/12/2001
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Title:
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METHOD AND STRUCTURE FOR HIGH-VOLTAGE DEVICE WITH SELF-ALIGNED GRADED JUNCTIONS
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Patent #:
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Issue Dt:
|
12/23/2003
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Application #:
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09904745
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Filing Dt:
|
07/13/2001
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Title:
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METHOD FOR TRANSFERRING A PLURALITY OF INTEGRATED CIRCUIT DEVICES INTO AND/OR OUT OF A PLURALITY OF SOCKETS
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Patent #:
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Issue Dt:
|
03/28/2006
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Application #:
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09904750
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Filing Dt:
|
07/13/2001
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Title:
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PROGRAMMABLE SERIAL INTERFACE
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Patent #:
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Issue Dt:
|
01/14/2003
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Application #:
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09909045
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Filing Dt:
|
07/18/2001
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Title:
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DIGITAL CONFIGURABLE MACRO ARCHITECTURE
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Patent #:
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|
Issue Dt:
|
09/06/2005
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Application #:
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09909047
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Filing Dt:
|
07/18/2001
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Title:
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PROGRAMMABLE ANALOG SYSTEM ARCHITECTURE
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Patent #:
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Issue Dt:
|
08/05/2003
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Application #:
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09909109
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Filing Dt:
|
07/18/2001
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Title:
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CONFIGURING DIGITAL FUNCTIONS IN A DIGITAL CONFIGURABLE MACRO ARCHITECTURE
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Patent #:
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Issue Dt:
|
06/03/2003
|
Application #:
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09909527
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Filing Dt:
|
07/20/2001
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Title:
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MICROCONTROLLER INPUT/OUTPUT NODES WITH BOTH PROGRAMMABLE PULL-UP AND PULL-DOWN RESISTIVE LOADS AND PROGRAMMABLE DRIVE STRENGTH
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Patent #:
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Issue Dt:
|
02/28/2006
|
Application #:
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09912768
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Filing Dt:
|
07/24/2001
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Title:
|
Dual mode relaxation oscillator generating a clock signal operating at a frequency substantially same in both first and second power modes
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|
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|
Patent #:
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|
Issue Dt:
|
12/16/2003
|
Application #:
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09912834
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Filing Dt:
|
07/25/2001
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Publication #:
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Pub Dt:
|
03/14/2002
| | | | |
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Title:
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MULTIPLE BLOCK SEQUENTIAL MEMORY MANAGEMENT
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|
|
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Patent #:
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Issue Dt:
|
08/24/2004
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Application #:
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09912870
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Filing Dt:
|
07/25/2001
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Publication #:
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Pub Dt:
|
02/07/2002
| | | | |
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Title:
|
RESOURCE LOCKING AND THREAD SYNCHRONIZATION IN A MULTIPROCESSOR ENVIRONMENT
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|
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Patent #:
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|
Issue Dt:
|
03/30/2004
|
Application #:
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09912898
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Filing Dt:
|
07/25/2001
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|
Publication #:
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Pub Dt:
|
02/07/2002
| | | | |
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Title:
|
METHODS AND SYSTEMS FOR A SHARED MEMORY UNIT WITH EXTENDABLE FUNCTIONS
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|
|
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Patent #:
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Issue Dt:
|
01/06/2004
|
Application #:
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09912954
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Filing Dt:
|
07/25/2001
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|
Publication #:
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Pub Dt:
|
02/07/2002
| | | | |
|
Title:
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DEMAND USABLE ADAPTER MEMORY ACCESS MANAGEMENT
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|
|
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Patent #:
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Issue Dt:
|
03/18/2003
|
Application #:
|
09915018
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Filing Dt:
|
07/25/2001
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Publication #:
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Pub Dt:
|
01/30/2003
| | | | |
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Title:
|
VOLTAGE BOOST CIRCUIT USING SUPPLY VOLTAGE DETECTION TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN READ MODE VOLTAGES
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|
|
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|
Patent #:
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|
Issue Dt:
|
05/10/2005
|
Application #:
|
09915109
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Filing Dt:
|
07/25/2001
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|
Publication #:
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Pub Dt:
|
01/31/2002
| | | | |
|
Title:
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LOAD/STORE MICROPACKET HANDLING SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/13/2005
|
Application #:
|
09915794
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Filing Dt:
|
07/26/2001
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|
Title:
|
ARCHITECTURE THAT CONVERTS A HALF-DUPLEX BUS TO A FULL-DUPLEX BUS WHILE KEEPING THE BANDWIDTH OF THE BUS CONSTANT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09915823
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Filing Dt:
|
07/26/2001
|
|
Title:
|
BUFFER WITH STABLE TRIP POINT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/09/2006
|
Application #:
|
09916453
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Filing Dt:
|
07/27/2001
|
|
Title:
|
TECHNIQUES FOR JEDEC FILE INFORMATION INTEGRITY AND PRESERVATION OF DEVICE PROGRAMMING SPECIFICATIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09916533
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Filing Dt:
|
07/30/2001
|
|
Publication #:
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Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
METHOD AND STRUCTURE FOR FORMING METALLIC INTERCONNECTIONS USING DIRECTED THERMAL DIFFUSION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/20/2003
|
Application #:
|
09916925
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Filing Dt:
|
07/27/2001
|
|
Title:
|
OPERATIONAL AMPLIFIER WITH EXTENDED OUTPUT VOLTAGE RANGE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
|
Application #:
|
09916978
|
Filing Dt:
|
07/27/2001
|
|
Title:
|
SIGNAL SCALING SCHEME FOR A DELTA SIGMA MODULATOR
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|
