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12/19/2006
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03/14/2002
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03/21/2002
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11/30/2004
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03/20/2002
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03/25/2002
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03/29/2002
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10/12/2004
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03/27/2002
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09/09/2003
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03/27/2002
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03/27/2002
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11/05/2002
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03/27/2002
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04/25/2006
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12/12/2006
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03/29/2002
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10/05/2004
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03/29/2002
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03/29/2002
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03/29/2002
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12/27/2005
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12/07/2004
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03/29/2002
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03/28/2002
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06/29/2004
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03/28/2002
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03/29/2002
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03/29/2002
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05/11/2004
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03/28/2002
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08/31/2004
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03/28/2002
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05/25/2004
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03/29/2002
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11/25/2003
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03/28/2002
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01/24/2012
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03/28/2002
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06/12/2007
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03/25/2003
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04/01/2002
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05/11/2004
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04/05/2002
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06/15/2004
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07/13/2004
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08/29/2006
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03/18/2014
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04/08/2002
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03/02/2004
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05/31/2005
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02/10/2004
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01/04/2005
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10/19/2004
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08/12/2003
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04/11/2002
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12/06/2005
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11/23/2004
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04/19/2002
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11/04/2003
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04/19/2002
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11/30/2004
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04/19/2002
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07/20/2004
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04/19/2002
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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10126841
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Filing Dt:
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04/19/2002
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Title:
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REPLACING A FIRST LINER LAYER WITH A THICKER OXIDE LAYER WHEN FORMING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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10128771
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Filing Dt:
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04/22/2002
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Title:
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SEMICONDUCTOR MEMORY WITH DEUTERATED MATERIALS
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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10132857
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Filing Dt:
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04/25/2002
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Title:
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CIRCUIT, SYSTEM, AND METHOD FOR PROGRAMMABLY SETTING AN INPUT TO A PRIORITIZER OF A LATCH TO AVOID A NON-DESIRED OUTPUT STATE OF THE LATCH
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10134751
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Filing Dt:
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04/30/2002
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Publication #:
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Pub Dt:
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05/29/2003
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Title:
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DC/DC CONVERTER CONTROL CIRCUIT AND DC/DC CONVERTER SYSTEM WITH POWER SAVING MODE IN ACCORDANCE WITH AN EXTERNAL CONTROL SIGNAL
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10134764
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Filing Dt:
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04/29/2002
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Title:
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CHIP SELECT METHOD THROUGH DOUBLE BONDING
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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10136033
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Filing Dt:
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04/29/2002
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Title:
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SYSTEM FOR PROGRAMMING A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
|
11/09/2004
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Application #:
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10136034
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Filing Dt:
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04/29/2002
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Publication #:
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Pub Dt:
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10/30/2003
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Title:
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SYSTEM FOR CONTROL OF PRE-CHARGE LEVELS IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
|
03/23/2004
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Application #:
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10136111
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Filing Dt:
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05/01/2002
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Title:
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PROGRAMMABLE ON-CHIP TERMINATION DEVICE
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10136173
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Filing Dt:
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05/01/2002
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Publication #:
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Pub Dt:
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11/06/2003
| | | | |
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Title:
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SYSTEM AND METHOD FOR MULTI-BIT FLASH READS USING DUAL DYNAMIC REFERENCES
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Patent #:
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Issue Dt:
|
11/15/2005
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Application #:
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10137244
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Filing Dt:
|
05/02/2002
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Title:
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METHOD OF FORMING A NARROW GATE, AND PRODUCT PRODUCED THEREBY
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Patent #:
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Issue Dt:
|
12/11/2007
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Application #:
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10137497
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Filing Dt:
|
05/01/2002
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Title:
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RECONFIGURABLE TESTING SYSTEM AND METHOD
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Patent #:
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Issue Dt:
|
08/22/2006
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Application #:
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10142963
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Filing Dt:
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05/13/2002
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Title:
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METHOD OF FORMING NITRIDED OXIDE IN A HOT WALL SINGLE WAFER FURNACE
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Patent #:
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Issue Dt:
|
07/15/2003
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Application #:
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10143449
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Filing Dt:
|
05/10/2002
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Title:
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SYSTEM FOR READING A DOUBLE-BIT MEMORY CELL
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Patent #:
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Issue Dt:
|
01/25/2005
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Application #:
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10144676
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Filing Dt:
|
05/13/2002
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Title:
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PROBE CARD WITH AN ADAPTER LAYER FOR TESTING INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
02/17/2004
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Application #:
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10145952
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Filing Dt:
|
05/15/2002
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Title:
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REPLACING LAYERS OF AN INTERGATE DIELECTRIC LAYER WITH HIGH-K MATERIAL FOR IMPROVED SCALABILITY
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Patent #:
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Issue Dt:
|
01/24/2006
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Application #:
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10146074
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Filing Dt:
|
05/16/2002
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Publication #:
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Pub Dt:
|
03/27/2003
| | | | |
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Title:
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METHOD FOR ERROR DETECTION/CORRECTION OF MULTILEVEL CELL MEMORY AND MULTILEVEL CELL MEMORY HAVING ERROR DETECTION/CORRECTION FUNCTION
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Patent #:
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Issue Dt:
|
08/23/2005
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Application #:
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10146524
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Filing Dt:
|
05/15/2002
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Title:
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AMPLIFIER CIRCUIT AND METHOD
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|
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Patent #:
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Issue Dt:
|
10/09/2007
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Application #:
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10146560
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Filing Dt:
|
05/15/2002
|
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Title:
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CIRCUIT FOR DRIVING A LASER DIODE AND METHOD
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Patent #:
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Issue Dt:
|
07/05/2005
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Application #:
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10147827
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Filing Dt:
|
05/17/2002
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Publication #:
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Pub Dt:
|
11/21/2002
| | | | |
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Title:
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BALL GRID ARRAY ANTENNA
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Patent #:
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Issue Dt:
|
06/12/2007
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Application #:
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10147828
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Filing Dt:
|
05/17/2002
|
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Title:
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RANDOM NUMBER GENERATOR
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Patent #:
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Issue Dt:
|
05/22/2007
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Application #:
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10147839
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Filing Dt:
|
05/17/2002
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Title:
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SHORT RANGE RADIO
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Patent #:
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Issue Dt:
|
03/23/2004
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Application #:
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10150179
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Filing Dt:
|
05/16/2002
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Title:
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CASCADABLE BUS BASED CROSSBAR SWITCHING IN A PROGRAMMABLE LOGIC DEVICE
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Patent #:
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|
Issue Dt:
|
08/26/2003
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Application #:
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10150204
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Filing Dt:
|
05/15/2002
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Title:
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SELF-ALIGNED POLYSILICON POLISH
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|
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Patent #:
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Issue Dt:
|
10/26/2004
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Application #:
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10150240
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Filing Dt:
|
05/15/2002
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Title:
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METHOD AND SYSTEM FOR TAILORING CORE AND PERIPHERY CELLS IN A NONVOLATILE MEMORY
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|
|
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Patent #:
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|
Issue Dt:
|
10/19/2004
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Application #:
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10150255
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Filing Dt:
|
05/15/2002
|
|
Title:
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METHOD AND SYSTEM FOR SCALING NONVOLATILE MEMORY CELLS
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|
|
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Patent #:
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|
Issue Dt:
|
08/12/2003
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Application #:
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10150282
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Filing Dt:
|
05/15/2002
|
|
Title:
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METHOD FOR MINIMIZING NITRIDE RESIDUE ON A SILICON WAFER
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|
|
|
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Patent #:
|
|
Issue Dt:
|
11/05/2002
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Application #:
|
10150556
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Filing Dt:
|
05/17/2002
|
|
Title:
|
METHOD FOR FABRICATING SELF-ALIGNED GATE OF FLASH MEMORY CELL
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|
|
|
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Patent #:
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|
Issue Dt:
|
12/26/2006
|
Application #:
|
10150677
|
Filing Dt:
|
05/17/2002
|
|
Title:
|
INTERMEDIATE FREQUENCY TUNER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10150731
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Filing Dt:
|
05/17/2002
|
|
Title:
|
DIGITAL SIGNAL PROCESSOR TRANSCEIVER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10151127
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Filing Dt:
|
05/16/2002
|
|
Title:
|
METHODS OF FORMING SEMICONDUCTOR STRUCTURES, AND ARTICLES AND DEVICES FORMED THEREBY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
10151576
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Filing Dt:
|
05/16/2002
|
|
Title:
|
MEMORY MANUFACTURING PROCESS USING BITLINE RAPID THERMAL ANNEAL
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|
