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03/28/2003
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11/29/2005
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10/23/2003
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04/06/2004
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03/31/2003
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11/30/2004
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04/02/2003
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07/18/2006
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10/16/2003
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10/21/2004
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09/07/2004
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10/23/2003
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05/25/2004
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10/30/2003
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10/19/2004
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04/21/2003
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11/20/2003
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11/23/2004
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04/24/2003
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08/17/2004
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04/24/2003
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07/27/2004
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04/24/2003
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08/10/2004
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04/24/2003
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03/01/2005
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05/03/2003
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08/10/2004
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05/03/2003
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05/25/2004
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01/16/2007
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05/06/2003
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06/22/2004
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05/06/2003
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03/15/2005
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09/13/2005
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05/06/2003
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09/14/2004
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05/06/2003
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04/12/2005
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05/06/2003
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11/18/2004
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11/27/2003
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05/22/2003
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12/04/2003
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12/20/2005
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07/12/2005
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06/12/2003
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06/12/2003
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12/21/2004
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02/15/2005
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06/17/2003
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Title:
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CONTROL CIRCUIT FOR DC/DC CONVERTER
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10625738
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Filing Dt:
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07/24/2003
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Publication #:
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Pub Dt:
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06/24/2004
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Title:
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ANALOG SWITCH CIRCUIT
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10631199
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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FULLY ISOLATED DIELECTRIC MEMORY CELL STRUCTURE FOR A DUAL BIT NITRIDE STORAGE DEVICE AND PROCESS FOR MAKING SAME
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10631812
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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NONVOLATILE MEMORY HAVING A TRAP LAYER
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10631856
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE SUPPLYING PROPER PROGRAM POTENTIAL
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10633535
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Filing Dt:
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08/05/2003
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING A PLURALITY OF BLOCKS AND A SENSING CIRCUIT PROVIDED IN EACH OF THE BLOCKS FOR
COMPARING DATA WITH A REFERENCE SIGNAL HAVING A LOAD IMPOSED
THEREON
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10634042
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Filing Dt:
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08/04/2003
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Title:
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A METHOD OF FABRICATING A DUAL-LEVEL STACKED FLASH MEMORY CELL WITH A MOSFET STORAGE TRANSISTOR
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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10634857
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
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02/26/2004
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Title:
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DESIGN METHOD FOR INTEGRATED CIRCUIT HAVING SCAN FUNCTION
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10635089
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Filing Dt:
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08/06/2003
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Title:
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MEMORY DEVICE AND METHOD OF SIMULTANEOUS FABRICATION OF CORE AND PERIPHERY OF SAME
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10635781
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Filing Dt:
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08/06/2003
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Title:
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MEMORY DEVICE HAVING SILICIDED BITLINES AND METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10636162
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Filing Dt:
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08/07/2003
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Title:
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TEST STRUCTURE FOR DETERMINING ELECTROMIGRATION AND INTERLAYER DIELECTRIC FAILURE
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10636336
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Filing Dt:
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08/06/2003
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Title:
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STRUCTURE AND METHOD TO REDUCE DRAIN INDUCED BARRIER LOWERING
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10636337
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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LOW POWER CHARGE PUMP
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10643967
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Filing Dt:
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08/20/2003
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Publication #:
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Pub Dt:
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03/04/2004
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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10/12/2004
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Application #:
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10646080
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Filing Dt:
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08/22/2003
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Title:
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USE OF HIGH-K DIELECTRIC MATERIAL IN MODIFIED ONO STRUCTURE FOR SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10648272
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Filing Dt:
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08/27/2003
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Publication #:
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Pub Dt:
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03/04/2004
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND ADJUSTMENT METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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10649672
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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PLL CLOCK GENERATOR CIRCUIT AND CLOCK GENERATION METHOD
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10649994
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10650049
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Filing Dt:
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08/26/2003
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Title:
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CAM (CONTENT ADDRESSABLE MEMORY) CELLS AS PART OF CORE ARRAY IN FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10650072
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
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Title:
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METHOD OF MANUFACTURING A MEMORY INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10652035
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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06/10/2004
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Title:
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MEMORY CIRCUIT WITH REDUNDANT CONFIGURATION
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10653050
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Filing Dt:
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08/29/2003
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Title:
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METHOD AND SYSTEM FOR PROGRAMMING A MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10654739
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Filing Dt:
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09/03/2003
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Title:
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PATTERNING FOR ELONGATED VSS CONTACT ON FLASH MEMORY
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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10655179
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Filing Dt:
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09/04/2003
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Title:
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MEMORY CELL STRUCTURE HAVING NITRIDE LAYER WITH REDUCED CHARGE LOSS AND METHOD FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10655936
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Filing Dt:
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09/04/2003
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Title:
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METHOD OF FABRICATING A FLOATING GATE
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10658428
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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SEMICONDUCTOR MEMORY ENABLING CORRECT SUBSTITUTION OF REDUNDANT CELL ARRAY
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10658506
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
| | | | |
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Title:
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MEMORY DEVICE HAVING HIGH WORK FUNCTION GATE AND METHOD OF ERASING SAME
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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10658882
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Filing Dt:
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09/09/2003
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Title:
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METHOD AND APPARATUS FOR COUPLING TO A COMMON LINE IN AN ARRAY
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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10658936
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Filing Dt:
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09/09/2003
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Title:
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FLASH MEMORY WITH HIGH-K DIELECTRIC MATERIAL BETWEEN SUBSTRATE AND GATE
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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10658937
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Filing Dt:
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09/09/2003
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Title:
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METHOD AND APPARATUS FOR COUPLING TO A SOURCE LINE IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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10660420
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Filing Dt:
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09/10/2003
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Title:
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HIGH DENSITY FLOATING GATE FLASH MEMORY AND FABRICATION PROCESSES THEREFOR
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10661720
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Filing Dt:
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09/11/2003
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Title:
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A FLASH MEMORY CELL WITH DRAIN AND SOURCE FORMED BY DIFFUSION OF A DOPANT FROM A SILICIDE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10662011
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Filing Dt:
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09/11/2003
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Title:
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METHOD FOR FABRICATING A MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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10662636
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Filing Dt:
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09/15/2003
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Title:
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FORMING A SUBSTANTIALLY PLANAR UPPER SURFACE AT THE OUTER EDGE OF A SEMICONDUCTOR TOPOGRAPHY
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10662810
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
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|
|
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Patent #:
|
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Issue Dt:
|
03/01/2005
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Application #:
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10665205
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
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Title:
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CONTROL METHOD OF NON-VOLATILE SEMICONDUCTOR MEMORY CELL AND NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
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|
|
|
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Patent #:
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Issue Dt:
|
05/16/2006
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Application #:
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10665406
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
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01/27/2005
| | | | |
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Title:
|
PORTABLE DEVICE HAVING A CHARGING CIRCUIT AND SEMICONDUCTOR DEVICE FOR USE IN THE CHARGING CIRCUIT OF THE SAME
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|
|
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Patent #:
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Issue Dt:
|
04/26/2005
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Application #:
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10672093
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Filing Dt:
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09/26/2003
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|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR MEMORY WITH DEUTERATED MATERIALS
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|
