|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
11007072
|
Filing Dt:
|
12/07/2004
|
|
Title:
|
METHOD AND APPARATUS FOR BINDING PERIPHERAL DEVICES TO A COMPUTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
11008233
|
Filing Dt:
|
12/10/2004
|
|
Title:
|
MEMORY CELL HAVING ENHANCED HIGH-K DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2012
|
Application #:
|
11008240
|
Filing Dt:
|
12/10/2004
|
|
Title:
|
ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
11008263
|
Filing Dt:
|
12/10/2004
|
|
Title:
|
ONE STACK WITH STEAM OXIDE FOR CHARGE RETENTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
11009816
|
Filing Dt:
|
12/10/2004
|
|
Title:
|
OSCILLATOR AMPLIFIER CIRCUIT OPERABLE TO PROVIDE SYMMETRIC CURRENT LIMITING AND METHOD OF SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11011626
|
Filing Dt:
|
12/13/2004
|
|
Title:
|
CIRCUIT, SYSTEM, AND METHOD FOR FINE TUNING CRYSTAL FREQUENCY ACCURACY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
11012610
|
Filing Dt:
|
12/14/2004
|
|
Title:
|
METHOD AND AN APPARATUS TO GENERATE STATIC LOGIC LEVEL OUTPUT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
11014578
|
Filing Dt:
|
12/16/2004
|
|
Title:
|
PROGRAMMABLE PHASE SHIFT AND DUTY CYCLE CORRECTION CIRCUIT AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2007
|
Application #:
|
11015059
|
Filing Dt:
|
12/17/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/23/2005
| | | | |
|
Title:
|
METHOD AND CIRCUIT FOR TRANSLATING A DIFFERENTIAL SIGNAL TO COMPLMENTARY CMOS LEVELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
11015105
|
Filing Dt:
|
12/17/2004
|
|
Title:
|
STAGED CORRELATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2008
|
Application #:
|
11015959
|
Filing Dt:
|
12/16/2004
|
|
Title:
|
APPARATUS AND METHOD FOR A SYNCHRONOUS MULTI-PORT MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
11016077
|
Filing Dt:
|
12/17/2004
|
|
Title:
|
TECHNIQUES FOR PLACING DUMMY FEATURES IN AN INTEGRATED CIRCUIT BASED ON DIELECTRIC PATTERN DENSITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
11018422
|
Filing Dt:
|
12/21/2004
|
|
Title:
|
TECHNIQUES FOR IMPROVING NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI) LIFETIME OF FIELD EFFECT TRANSISTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
11019731
|
Filing Dt:
|
12/21/2004
|
|
Title:
|
METHOD AND DEVICE FOR SLECTING ONE OF MULTIPLE CLOCK SIGNALS BASED ON FREQUENCY DIFFERENCES OF SUCH CLOCK SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11020972
|
Filing Dt:
|
12/22/2004
|
|
Title:
|
RESISTOR-LESS ACCURATE LOW VOLTAGE DETECT CIRCUIT AND METHOD FOR DETECTING A LOW VOLTAGE CONDITION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11021220
|
Filing Dt:
|
12/23/2004
|
|
Title:
|
METHOD OF FORMING A FLOATING METAL STRUCTURE IN AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
11021394
|
Filing Dt:
|
12/23/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
|
Title:
|
NON-VOLATILE COUNTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11021944
|
Filing Dt:
|
12/23/2004
|
|
Title:
|
UTILIZATION OF MEMORY-DIODE WHICH MAY HAVE EACH OF A PLURALITY OF DIFFERENT MEMORY STATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11021958
|
Filing Dt:
|
12/23/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
|
Title:
|
METHOD OF PROGRAMMING, READING AND ERASING MEMORY-DIODE IN A MEMORY-DIODE ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
11021959
|
Filing Dt:
|
12/23/2004
|
|
Title:
|
MEMORY ELEMENT WITH NITROGEN-CONTAINING ACTIVE LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11023914
|
Filing Dt:
|
12/28/2004
|
|
Title:
|
CURRENT SENSING ARCHITECTURE FOR HIGH BITLINE VOLTAGE, RAIL TO RAIL OUTPUT SWING AND VCC NOISE CANCELLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11024257
|
Filing Dt:
|
12/28/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
|
Title:
|
SENSE AMPLIFIERS WITH HIGH VOLTAGE SWING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
11024843
|
Filing Dt:
|
12/30/2004
|
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
|
Title:
|
MEMORY CONTROL CIRCUIT AND MICROPROCESSORY SYSTEM FOR PRE-FETCHING INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
|
Application #:
|
11027005
|
Filing Dt:
|
12/30/2004
|
|
Title:
|
METHOD AND APPARATUS FOR BINDING WIRELESS DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
11029454
|
Filing Dt:
|
01/06/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11033588
|
Filing Dt:
|
01/12/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
|
Title:
|
MEMORY DEVICE HAVING TRAPEZOIDAL BITLINES AND METHOD OF FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
11033941
|
Filing Dt:
|
01/12/2005
|
|
Title:
|
MEMORY CELL CONTAINING COPOLYMER CONTAINING DIARYLACETYLENE PORTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11034071
|
Filing Dt:
|
01/12/2005
|
|
Title:
|
VARIABLE DENSITY AND VARIABLE PERSISTENT ORGANIC MEMORY DEVICES, METHODS, AND FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
11034154
|
Filing Dt:
|
01/12/2005
|
|
Title:
|
METHODS INVOLVING SPIN-ON POLYMERS THAT REVERSIBLY BIND CHARGE CARRIERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2006
|
Application #:
|
11034642
|
Filing Dt:
|
01/13/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
|
Title:
|
MULTI-LEVEL ONO FLASH PROGRAM ALGORITHM FOR THRESHOLD WIDTH CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
|
Application #:
|
11035055
|
Filing Dt:
|
01/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
|
Title:
|
A SEMICONDUCTOR DEVICE HAVING AN ARITHMETIC UNIT OF A RECONFIGURABLE CIRCUIT CONFIGURATION IN ACCORDANCE WITH STORED CONFIGURATION DATA AND A MEMORY STORING FIXED VALUE DATA TO BE SUPPLIED TO THE ARITHMETIC UNIT, REQUIRING NO DATA AREA FOR STORING FIXED VALUE DATA TO BE SET IN A CONFIGURATION MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2007
|
Application #:
|
11035188
|
Filing Dt:
|
01/13/2005
|
|
Title:
|
METHOD FOR CONTROLLING POLY 1 THICKNESS AND UNIFORMITY IN A MEMORY ARRAY FABRICATION PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
11036332
|
Filing Dt:
|
01/18/2005
|
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
|
Title:
|
MICROCOMPUTER WITH INTERNAL DMA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11036395
|
Filing Dt:
|
01/18/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/06/2005
| | | | |
|
Title:
|
MICROCOMPUTER CAPABLE OF MONITORING INTERNAL MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
11038903
|
Filing Dt:
|
01/18/2005
|
|
Title:
|
UNIVERSAL SERIAL BUS INTERFACE TO MASS STORAGE DEVICE USING SPECULATIVE WRITE COMMANDS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11039301
|
Filing Dt:
|
01/19/2005
|
|
Title:
|
METHODS FOR FABRICATING MAGNETIC CELL JUNCTIONS AND A STRUCTURE RESULTING AND/OR USED FOR SUCH METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
11040441
|
Filing Dt:
|
01/21/2005
|
|
Title:
|
CIRCUIT AND METHOD FOR AUTOMATIC MEASUREMENT AND COMPENSATION OF TRANSISTOR THRESHOLD VOLTAGE MISMATCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11041608
|
Filing Dt:
|
01/24/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
|
Title:
|
AUTOMATED TESTS FOR BUILT-IN SELF TEST
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
|
Application #:
|
11042136
|
Filing Dt:
|
01/26/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/14/2005
| | | | |
|
Title:
|
SIGMADELTA MODULATOR FOR PLL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11042419
|
Filing Dt:
|
01/24/2005
|
|
Title:
|
NON-STICK DETECTION METHOD AND MECHANISM FOR ARRAY MOLDED LAMINATE PACKAGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
11042701
|
Filing Dt:
|
01/24/2005
|
|
Title:
|
SYSTEM FOR CONTROLLING THE PROCESSING OF AN INTEGRATED CIRCUIT CHIP ASSEMBLY LINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
11043336
|
Filing Dt:
|
01/27/2005
|
|
Publication #:
|
|
Pub Dt:
|
03/09/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11043985
|
Filing Dt:
|
01/28/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/11/2005
| | | | |
|
Title:
|
FILTER CIRCUIT PERMITTING ADJUSTMENT OF CUTOFF FREQUENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
11045694
|
Filing Dt:
|
01/27/2005
|
|
Title:
|
BURIED WORD LINE MEMORY INTEGRATED CIRCUIT SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
11047559
|
Filing Dt:
|
02/02/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/16/2005
| | | | |
|
Title:
|
MOS TYPE VARIABLE CAPACITANCE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11049855
|
Filing Dt:
|
02/04/2005
|
|
Title:
|
NON-VOLATILE MEMORY DEVICE WITH IMPROVED ERASE SPEED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11052688
|
Filing Dt:
|
02/07/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
|
Title:
|
MEMORY ELEMENT USING ACTIVE LAYER OF BLENDED MATERIALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11059139
|
Filing Dt:
|
02/15/2005
|
|
Title:
|
MULTIPLE DUAL BIT MEMORY INTEGRATED CIRCUIT SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
|
Application #:
|
11060451
|
Filing Dt:
|
02/16/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
|
Title:
|
USB SECURE STORAGE APPARATUS AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2006
|
Application #:
|
11061119
|
Filing Dt:
|
02/18/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
|
Title:
|
CURRENT-VOLTAGE CONVERTER CIRCUIT AND ITS CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
11061307
|
Filing Dt:
|
02/18/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND A REDUNDANCY CONTROL METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
11061365
|
Filing Dt:
|
02/18/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND ITS REDUNDANT METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2008
|
Application #:
|
11062629
|
Filing Dt:
|
02/23/2005
|
|
Title:
|
SYSTEM AND METHOD FOR GATE FORMATION IN A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2007
|
Application #:
|
11062641
|
Filing Dt:
|
02/23/2005
|
|
Title:
|
SYSTEM AND METHOD FOR ERASING A MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
11063560
|
Filing Dt:
|
02/24/2005
|
|
Title:
|
NON-VOLATILE MEMORY DEVICE WITH INCREASED RELIABILITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
11063975
|
Filing Dt:
|
02/24/2005
|
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
|
Title:
|
RESET CONTROL CIRCUIT AND RESET CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
11064054
|
Filing Dt:
|
02/22/2005
|
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND ITS CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
|
Application #:
|
11065305
|
Filing Dt:
|
02/25/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/13/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11065388
|
Filing Dt:
|
02/24/2005
|
|
Title:
|
MEMORY DEVICE HAVING A NANOCRYSTAL CHARGE STORAGE REGION AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
11067976
|
Filing Dt:
|
03/01/2005
|
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11068419
|
Filing Dt:
|
02/28/2005
|
|
Title:
|
VOLTAGE REGULATOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
11068674
|
Filing Dt:
|
03/01/2005
|
|
Title:
|
PROCESSING A COPOLYMER TO FORM A POLYMER MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11069181
|
Filing Dt:
|
03/01/2005
|
|
Title:
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METHOD FOR PATTERNING ELECTRICALLY CONDUCTING POLY(PHENYL ACETYLENE) AND POLY(DIPHENYL ACETYLENE)
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Patent #:
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Issue Dt:
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07/29/2008
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Application #:
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11069499
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Filing Dt:
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03/01/2005
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Title:
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UNIVERSAL MEMORY CIRCUIT ARCHITECTURE SUPPORTING MULTIPLE MEMORY INTERFACE OPTIONS
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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11069500
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Filing Dt:
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03/01/2005
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Title:
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WIRELESS HUMAN INTERFACE DEVICE PACKET COMPRESSION SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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11069501
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Filing Dt:
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03/01/2005
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Publication #:
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Pub Dt:
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09/29/2005
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Title:
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METHODS FOR FORMING SUPER-STEEP DIFFUSION REGION PROFILES IN MOS DEVICES AND RESULTING SEMICONDUCTOR TOPOGRAPHIES
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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11071349
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Filing Dt:
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03/04/2005
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Publication #:
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Pub Dt:
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05/18/2006
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Title:
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BUFFER CIRCUIT
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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11073178
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Filing Dt:
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03/04/2005
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Title:
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FLYBACK CAPACITOR LEVEL SHIFTER FEEDBACK REGULATION FOR NEGATIVE PUMPS
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Patent #:
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Issue Dt:
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05/22/2007
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Application #:
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11075632
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Filing Dt:
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03/08/2005
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Title:
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PROGRAMMABLE LOW VOLTAGE RESET APPARATUS FOR MULTI-VDD CHIPS
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Patent #:
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Issue Dt:
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06/15/2010
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Application #:
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11075999
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Filing Dt:
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03/08/2005
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Title:
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METHOD FOR CONTAINING A SILICIDED GATE WITHIN A SIDEWALL SPACER IN INTEGRATED CIRCUIT TECHNOLOGY
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Patent #:
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Issue Dt:
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10/24/2006
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Application #:
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11076252
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Filing Dt:
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03/08/2005
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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DECODER FOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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11076940
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Filing Dt:
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03/11/2005
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Publication #:
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Pub Dt:
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07/14/2005
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Title:
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CONSTANT-VOLTAGE POWER SUPPLY CIRCUIT
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Patent #:
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Issue Dt:
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09/25/2012
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Application #:
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11078873
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Filing Dt:
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03/11/2005
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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MEMORY DEVICE WITH IMPROVED SWITCHING SPEED AND DATA RETENTION
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Patent #:
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Issue Dt:
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04/07/2009
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Application #:
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11079960
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Filing Dt:
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03/15/2005
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Title:
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PULSED ARBITRATION SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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11082526
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Filing Dt:
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03/17/2005
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Publication #:
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Pub Dt:
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06/29/2006
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Title:
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COUNTING SCHEME WITH AUTOMATIC POINT-OF-REFERENCE GENERATION
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Patent #:
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Issue Dt:
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07/20/2010
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Application #:
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11083534
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Filing Dt:
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03/18/2005
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Title:
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METHOD AND APPARATUS FOR USING VALID BITS FOR ERASURE CORRECTION
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11084671
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Filing Dt:
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03/18/2005
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Publication #:
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Pub Dt:
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09/29/2005
| | | | |
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Title:
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PROBE CARD AND METHOD FOR CONSTRUCTING SAME
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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11085138
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Filing Dt:
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03/22/2005
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Publication #:
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Pub Dt:
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07/28/2005
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Title:
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PULSE WIDTH MEASURING DEVICE WITH AUTOMATIC RANGE SETTING FUNCTION
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Patent #:
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Issue Dt:
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12/30/2008
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Application #:
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11085144
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Filing Dt:
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03/22/2005
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Publication #:
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Pub Dt:
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06/29/2006
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Title:
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SEMICONDUCTOR DEVICE WITH MECHANISM FOR LEAK DEFECT DETECTION
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Patent #:
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Issue Dt:
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02/17/2009
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Application #:
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11086310
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Filing Dt:
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03/23/2005
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Publication #:
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Pub Dt:
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09/28/2006
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Title:
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HIGH K STACK FOR NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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12/05/2006
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Application #:
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11086884
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Filing Dt:
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03/22/2005
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Publication #:
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Pub Dt:
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09/28/2006
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Title:
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TEMPERATURE COMPENSATION OF THIN FILM DIODE VOLTAGE THRESHOLD IN MEMORY SENSING CIRCUIT
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Patent #:
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Issue Dt:
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08/25/2009
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Application #:
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11087000
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Filing Dt:
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03/22/2005
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Publication #:
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Pub Dt:
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09/28/2006
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Title:
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VARIABLE BREAKDOWN CHARACTERISTIC DIODE
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Patent #:
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Issue Dt:
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04/13/2010
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Application #:
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11087484
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Filing Dt:
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03/22/2005
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Title:
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INTEGRATED BACK-END INTEGRATED CIRCUIT MANUFACTURING ASSEMBLY
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|
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Patent #:
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Issue Dt:
|
10/09/2007
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Application #:
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11087735
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Filing Dt:
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03/24/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE THAT ERASES STORED DATA AFTER A PREDETERMINED TIME PERIOD WITHOUT THE USE OF A TIMER CIRCUIT
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|
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Patent #:
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Issue Dt:
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06/24/2008
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Application #:
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11087924
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Filing Dt:
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03/23/2005
|
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Title:
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METHOD OF PATTERNING ELEMENTS WITHIN A SEMICONDUCTOR TOPOGRAPHY
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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11087944
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Filing Dt:
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03/23/2005
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Title:
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CURRENT SENSING CIRCUIT WITH A CURRENT-COMPENSATED DRAIN VOLTAGE REGULATION
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Patent #:
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Issue Dt:
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01/26/2010
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Application #:
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11089630
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Filing Dt:
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03/23/2005
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Title:
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CHIRPED SURFACE ACOUSTIC WAVE (SAW) CORRELATOR/EXPANDER
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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11089707
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Filing Dt:
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03/25/2005
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Title:
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MEMORY DEVICE WITH IMPROVED DATA RETENTION
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|
|
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Patent #:
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Issue Dt:
|
11/09/2010
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Application #:
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11089708
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Filing Dt:
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03/25/2005
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Publication #:
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Pub Dt:
|
09/28/2006
| | | | |
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Title:
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MEMORY DEVICE WITH IMPROVED DATA RETENTION
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|
|
|
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Patent #:
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|
Issue Dt:
|
01/29/2008
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Application #:
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11089732
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Filing Dt:
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03/25/2005
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Title:
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INCREASING SELF-ALIGNED CONTACT AREAS IN INTEGRATED CIRCUITS USING A DISPOSABLE SPACER
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Patent #:
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Issue Dt:
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07/06/2010
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Application #:
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11089921
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Filing Dt:
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03/24/2005
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Publication #:
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Pub Dt:
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09/29/2005
| | | | |
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Title:
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INTEGRATED CIRCUIT HAVING ONE OR MORE CONDUCTIVE DEVICES FORMED OVER A SAW AND/OR MEMS DEVICE
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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11090716
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Filing Dt:
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03/25/2005
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Publication #:
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Pub Dt:
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09/29/2005
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR WRITING DATA INTO THE SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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11090935
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Filing Dt:
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03/23/2005
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Title:
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CIRCUIT AND METHOD FOR CMOS VOLTAGE LEVEL TRANSLATION
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Patent #:
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Issue Dt:
|
09/20/2011
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Application #:
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11091519
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Filing Dt:
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03/29/2005
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Title:
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ULTRAVIOLET RADIATION BLOCKING INTERLAYER DIELECTRIC
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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11091524
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Filing Dt:
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03/29/2005
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Title:
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FILM STACKS TO PREVENT UV-INDUCED DEVICE DAMAGE
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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11091982
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Filing Dt:
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03/29/2005
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Title:
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QUAD BIT USING HOT-HOLE ERASE FOR CBD CONTROL
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Patent #:
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Issue Dt:
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01/17/2012
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Application #:
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11095849
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Filing Dt:
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03/31/2005
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
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Title:
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METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMEORY DEVICE
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Patent #:
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Issue Dt:
|
08/28/2007
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Application #:
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11095909
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Filing Dt:
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03/31/2005
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Title:
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SHUNT TYPE VOLTAGE REGULATOR
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Patent #:
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|
Issue Dt:
|
11/18/2008
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Application #:
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11097527
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Filing Dt:
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03/31/2005
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
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Title:
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CIRCUIT AND METHOD FOR MONITORING THE STATUS OF A CLOCK SIGNAL
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/20/2013
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Application #:
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11097665
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Filing Dt:
|
04/01/2005
|
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Title:
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PHOTODIODE HAVING A BURIED WELL REGION
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