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12/09/2014
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FLASH MEMORY DEVICES AND SYSTEMS
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07/12/2016
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14066522
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10/29/2013
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07/01/2014
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14067717
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10/30/2013
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04/03/2014
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11/29/2016
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03/13/2014
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02/27/2014
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NONE
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11/11/2013
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03/06/2014
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NONE
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11/11/2013
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03/06/2014
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Multi-Chip Module and Method of Manufacture
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05/03/2016
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14077971
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11/12/2013
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02/09/2016
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14080844
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11/15/2013
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03/13/2014
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SEMICONDUCTOR INTEGRATED CIRCUIT, OPERATING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND DEBUG SYSTEM
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03/31/2015
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14081987
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11/15/2013
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07/31/2014
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SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
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04/19/2016
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14085013
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11/20/2013
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06/05/2014
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SIGNAL PROCESSOR AND COMMUNICATION DEVICE
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12/19/2017
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14089048
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11/25/2013
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03/27/2014
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Voltage Adjustment Circuit and Display Device Driving Circuit
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03/03/2015
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14091470
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11/27/2013
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03/27/2014
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PROCESSOR SYSTEM OPTIMIZATION
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06/21/2016
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11/27/2013
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05/28/2015
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06/21/2016
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14093703
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12/02/2013
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06/04/2015
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GENERATION OF WAKE-UP WORDS
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NONE
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14095150
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12/03/2013
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06/04/2015
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Reduction of Charging Induced Damage in Photolithography Wet Process
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04/08/2014
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14095902
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12/03/2013
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METHOD AND APPARATUS FOR CALCULATING COORDINATES WITH HIGH NOISE IMMUNITY IN TOUCH APPLICATIONS
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12/22/2015
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14095930
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12/03/2013
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DETERMINING FORCES OF CONTACTS BETWEEN STYLUSES AND OBJECTS
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10/21/2014
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14096978
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12/04/2013
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09/18/2014
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ATTENUATOR CIRCUIT OF A CAPACITANCE-SENSING CIRCUIT
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03/14/2017
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14097126
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12/04/2013
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10/23/2014
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UNIFORM SIGNALS FROM NON-UNIFORM PATTERNS OF ELECTRODES
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09/16/2014
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14097138
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12/04/2013
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HIGH RESOLUTION CAPACITANCE TO CODE CONVERTER
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10/28/2014
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14098057
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12/05/2013
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INTERLEAVING SENSE ELEMENTS OF A CAPACITIVE-SENSE ARRAY
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05/19/2015
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14099340
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12/06/2013
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04/03/2014
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METHOD AND APPARATUS FOR STAGGERED START-UP OF A PREDEFINED, RANDOM OR DYNAMIC NUMBER OF FLASH MEMORY DEVICES
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NONE
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14100673
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12/09/2013
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06/11/2015
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SCATTERING BAR OPTIMIZATION APPARATUS AND METHOD
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NONE
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14102446
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12/10/2013
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06/05/2014
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Memory Device Interconnects and Method of Manufacture
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NONE
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14102450
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12/10/2013
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05/29/2014
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Memory Device Interconnects and Method of Manufacture
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08/11/2015
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14105041
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12/12/2013
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04/17/2014
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SONOS TYPE STACKS FOR NONVOLATILE CHANGETRAP MEMORY DEVICES AND METHODS TO FORM THE SAME
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01/26/2016
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14107729
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12/16/2013
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04/10/2014
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Output Voltage Controller, Electronic Device, and Output Voltage Control Method
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12/27/2016
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14107871
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12/16/2013
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01/07/2016
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CAPACITANCE SENSING CIRCUITS AND METHODS
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10/11/2016
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14108780
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12/17/2013
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06/18/2015
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PROCESS FOR FORMING EDGE WORDLINE IMPLANTS ADJACENT EDGE WORDLINES
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09/01/2015
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14108967
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12/17/2013
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METHOD OF FORMING DRAIN EXTENDED MOS TRANSISTORS FOR HIGH VOLTAGE CIRCUITS
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01/17/2017
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12/17/2013
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01/01/2015
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METHODS OF FABRICATING AN F-RAM
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09/27/2016
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12/17/2013
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06/19/2014
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HTO OFFSET FOR LONG LEFFECTIVE, BETTER DEVICE PERFORMANCE
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01/26/2016
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14109464
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12/17/2013
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05/01/2014
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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03/07/2017
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14109571
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12/17/2013
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Apparatus and method for recognizing a tap gesture on a touch sensing device
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11/15/2016
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14132422
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12/18/2013
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06/18/2015
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INCREASING LITHOGRAPHIC DEPTH OF FOCUS WINDOW USING WAFER TOPOGRAPHY
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12/06/2016
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14132430
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12/18/2013
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04/17/2014
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PARTIAL LOCAL SELF BOOSTING FOR NAND
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01/27/2015
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14133359
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12/18/2013
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SERIAL DATA INTERMEDIARY DEVICE, AND RELATED SYSTEMS AND METHODS
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10/28/2014
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12/19/2013
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06/07/2016
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12/20/2013
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06/25/2015
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06/14/2016
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12/20/2013
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06/25/2015
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GATE FORMATION MEMORY BY PLANARIZATION
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09/06/2016
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12/20/2013
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04/24/2014
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SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
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12/08/2015
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14137020
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12/20/2013
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CONTACT IDENTIFICATION AND TRACKING ON A CAPACITANCE SENSING ARRAY
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02/02/2016
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12/20/2013
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10/16/2014
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DC-DC Converter With Adaptive Phase Compensation Controller
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11/28/2017
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12/20/2013
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10/07/2014
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14137635
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12/20/2013
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04/12/2016
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14140909
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12/26/2013
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07/10/2014
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02/02/2016
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12/30/2013
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07/02/2015
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Formation of Gate Sidewall Structure
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08/30/2016
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01/07/2014
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05/01/2014
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14149628
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01/07/2014
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07/09/2015
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MULTI-LAYER INTER-GATE DIELECTRIC STRUCTURE
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09/01/2015
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14150627
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01/08/2014
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07/05/2016
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01/10/2014
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08/23/2016
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01/13/2014
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05/08/2014
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ELECTRICALLY PROGRAMMABLE AND ERASEABLE MEMORY DEVICE
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06/20/2017
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01/13/2014
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FINGER GESTURE RECOGNITION FOR TOUCH SENSING SURFACE
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07/28/2015
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14159315
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01/20/2014
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09/18/2014
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MEMORY TRANSISTOR WITH MULTIPLE CHARGE STORING LAYERS AND A HIGH WORK FUNCTION GATE ELECTRODE
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05/24/2016
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01/28/2014
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03/01/2016
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01/29/2014
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10/23/2014
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08/30/2016
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01/31/2014
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05/29/2014
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PARALLEL BITLINE NONVOLATILE MEMORY EMPLOYING CHANNEL-BASED PROCESSING TECHNOLOGY
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07/22/2014
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05/29/2014
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05/24/2016
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02/04/2014
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09/25/2014
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02/14/2017
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02/12/2014
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06/12/2014
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09/19/2017
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02/14/2014
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06/12/2014
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AUTHENTICATED MEMORY AND CONTROLLER SLAVE
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11/28/2017
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02/19/2014
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06/19/2014
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SEMICONDUCTOR DEVICE HAVING ELEMENT SEPARATION REGION FORMED FROM A RECESS-FREE TRENCH
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10/17/2017
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02/24/2014
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08/27/2015
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MEMORY SUBSYSTEM WITH WRAPPED-TO-CONTINUOUS READ
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03/07/2017
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14199837
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Filing Dt:
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03/06/2014
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Publication #:
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Pub Dt:
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09/10/2015
| | | | |
Title:
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Memory Access Bases on Erase Cycle Time
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Patent #:
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Issue Dt:
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11/24/2015
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Application #:
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14201456
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Filing Dt:
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03/07/2014
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Publication #:
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Pub Dt:
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08/21/2014
| | | | |
Title:
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METHOD OF INTEGRATING A CHARGE-TRAPPING GATE STACK INTO A CMOS FLOW
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Patent #:
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Issue Dt:
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08/09/2016
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Application #:
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14201520
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Filing Dt:
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03/07/2014
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Publication #:
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Pub Dt:
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09/25/2014
| | | | |
Title:
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Method and Apparatus for Identification of Touch Panels
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Patent #:
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Issue Dt:
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08/23/2016
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Application #:
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14203145
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Filing Dt:
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03/10/2014
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Publication #:
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Pub Dt:
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09/18/2014
| | | | |
Title:
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METHODS AND CIRCUITS FOR MEASURING MUTUAL AND SELF CAPACITANCE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14204373
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Filing Dt:
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03/11/2014
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Publication #:
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Pub Dt:
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07/10/2014
| | | | |
Title:
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SELF-ALIGNED DOUBLE PATTERNING FOR MEMORY AND OTHER MICROELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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14204440
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Filing Dt:
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03/11/2014
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Title:
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COMPUTER-ASSISTED ROUTER FOR A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
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02/02/2016
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14207303
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03/12/2014
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Publication #:
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Pub Dt:
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09/17/2015
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Title:
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BURIED TRENCH ISOLATION IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/05/2016
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14215468
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03/17/2014
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Publication #:
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Pub Dt:
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07/31/2014
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Title:
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CONVEX SHAPED THIN-FILM TRANSISTOR DEVICE HAVING ELONGATED CHANNEL OVER INSULATING LAYER
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Patent #:
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Issue Dt:
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03/24/2015
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Application #:
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14216589
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Filing Dt:
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03/17/2014
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Publication #:
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Pub Dt:
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10/09/2014
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Title:
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Method to Reduce Program Disturbs in Non-Volatile Memory Cells
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Patent #:
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Issue Dt:
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12/06/2016
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Application #:
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14218169
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Filing Dt:
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03/18/2014
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Publication #:
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Pub Dt:
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07/17/2014
| | | | |
Title:
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DEBUG CONTROL CIRCUIT
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Patent #:
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Issue Dt:
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12/20/2016
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Application #:
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14220628
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Filing Dt:
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03/20/2014
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Publication #:
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Pub Dt:
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07/24/2014
| | | | |
Title:
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CONTROL CIRCUIT OF STEP-DOWN DC-DC CONVERTER, CONTROL CIRCUIT OF STEP-UP DC-DC CONVERTER AND STEP-UP/STEP-DOWN DC-DC CONVERTER
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Patent #:
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Issue Dt:
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11/25/2014
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Application #:
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14221011
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03/20/2014
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Publication #:
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Pub Dt:
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09/25/2014
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Title:
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Node System and Supervisory Node
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Patent #:
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12/06/2016
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14222227
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Filing Dt:
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03/21/2014
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Title:
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INPUT/OUTPUT MULTIPLEXER BUS
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Patent #:
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NONE
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Application #:
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14222258
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Filing Dt:
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03/21/2014
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Publication #:
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Pub Dt:
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07/24/2014
| | | | |
Title:
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SWITCHABLE MEMORY DIODES BASED ON FERROELECTRIC/CONJUUGATED POLYMER HETEROSTRUCTURES AND/OR THEIR COMPOSITES
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Patent #:
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Issue Dt:
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10/18/2016
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Application #:
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14222399
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Filing Dt:
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03/21/2014
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Publication #:
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Pub Dt:
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01/01/2015
| | | | |
Title:
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SYSTEM WITH MEMORY HAVING VOLTAGE APPLYING UNIT
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Patent #:
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Issue Dt:
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03/17/2015
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Application #:
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14222446
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Filing Dt:
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03/21/2014
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Publication #:
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Pub Dt:
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08/21/2014
| | | | |
Title:
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CONTACT CONFIGURATION FOR UNDERTAKING TESTS ON CIRCUIT BOARD
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Patent #:
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Issue Dt:
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08/18/2015
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Application #:
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14222904
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Filing Dt:
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03/24/2014
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Publication #:
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Pub Dt:
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03/12/2015
| | | | |
Title:
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METHOD OF FABRICATING A FERROELECTRIC CAPACITOR
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Patent #:
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Issue Dt:
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09/02/2014
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Application #:
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14224854
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Filing Dt:
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03/25/2014
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Title:
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DETECT AND DIFFERENTIATE TOUCHES FROM DIFFERENT SIZE CONDUCTIVE OBJECTS ON A CAPACITIVE BUTTON
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Patent #:
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Issue Dt:
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09/18/2018
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Application #:
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14225152
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03/25/2014
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Publication #:
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Pub Dt:
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09/18/2014
| | | | |
Title:
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NONVOLATILE CHARGE TRAP MEMORY DEVICE HAVING A DEUTERATED LAYER IN A MULTI-LAYER CHARGE-TRAPPING REGION
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Patent #:
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Issue Dt:
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03/17/2015
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Application #:
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14226660
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Filing Dt:
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03/26/2014
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Title:
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WATER REJECTION AND WET FINGER TRACKING ALGORITHMS FOR TRUETOUCH PANELS AND SELF CAPACITANCE TOUCH SENSORS
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Patent #:
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Issue Dt:
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03/29/2016
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Application #:
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14227021
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Filing Dt:
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03/27/2014
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Publication #:
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Pub Dt:
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06/11/2015
| | | | |
Title:
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STYLUS TIP SHAPE
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Patent #:
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Issue Dt:
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06/07/2016
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Application #:
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14228899
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Filing Dt:
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03/28/2014
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Publication #:
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Pub Dt:
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04/30/2015
| | | | |
Title:
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MULTI-CHANNEL, MULTI-BANK MEMORY WITH WIDE DATA INPUT/OUTPUT
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Patent #:
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Issue Dt:
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04/28/2015
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Application #:
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14229069
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Filing Dt:
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03/28/2014
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Publication #:
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Pub Dt:
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08/14/2014
| | | | |
Title:
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DEUTERATED FILM ENCAPSULATION OF NONVOLATILE CHARGE TRAP MEMORY DEVICE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14229524
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Filing Dt:
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03/28/2014
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Publication #:
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Pub Dt:
|
07/31/2014
| | | | |
Title:
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TOUCH SENSOR DEVICE
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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14229594
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Filing Dt:
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03/28/2014
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Title:
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INTEGRATION OF A MEMORY TRANSISTOR INTO HIGH-K, METAL GATE CMOS PROCESS FLOW
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Patent #:
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Issue Dt:
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12/29/2015
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14229765
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Filing Dt:
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03/28/2014
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Publication #:
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Pub Dt:
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04/30/2015
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Title:
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MULTI-CHANNEL PHYSICAL INTERFACES AND METHODS FOR STATIC RANDOM ACCESS MEMORY DEVICES
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Patent #:
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Issue Dt:
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12/12/2017
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14229908
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Filing Dt:
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03/29/2014
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Publication #:
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Pub Dt:
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07/31/2014
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Title:
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MEMORY CELL ARRAY LATCHUP PREVENTION
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Patent #:
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Issue Dt:
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10/25/2016
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14250113
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Filing Dt:
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04/10/2014
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Publication #:
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Pub Dt:
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08/07/2014
| | | | |
Title:
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MEMORY BUFFERING SYSTEM THAT IMPROVES READ/WRITE PERFORMANCE AND PROVIDES LOW LATENCY FOR MOBILE SYSTEMS
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Patent #:
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NONE
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Application #:
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14251448
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Filing Dt:
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04/11/2014
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Publication #:
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Pub Dt:
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08/07/2014
| | | | |
Title:
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continuous erase control circuit
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14253056
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Filing Dt:
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04/15/2014
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Publication #:
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Pub Dt:
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08/14/2014
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Title:
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OPERATING SYSTEM BASED DRAM AND FLASH MANAGEMENT
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Patent #:
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Issue Dt:
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03/13/2018
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14254237
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04/16/2014
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Pub Dt:
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08/14/2014
| | | | |
Title:
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FLASH MEMORY CELLS HAVING TRENCHED STORAGE ELEMENTS
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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14258076
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Filing Dt:
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04/22/2014
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Publication #:
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Pub Dt:
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08/14/2014
| | | | |
Title:
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DATA PATTERN ANALYSIS
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Patent #:
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Issue Dt:
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12/26/2017
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14258905
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Filing Dt:
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04/22/2014
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Publication #:
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Pub Dt:
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09/18/2014
| | | | |
Title:
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DIGITAL DRIVING CIRCUITS, METHODS AND SYSTEMS FOR DISPLAY DEVICES
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Patent #:
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Issue Dt:
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05/30/2017
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14258950
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04/22/2014
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Pub Dt:
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11/20/2014
| | | | |
Title:
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ACCESS METHODS AND CIRCUITS FOR MEMORY DEVICES HAVING MULTIPLE BANKS
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Patent #:
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Issue Dt:
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07/05/2016
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Application #:
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14262614
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04/25/2014
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Title:
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CHARGE BALANCING CONVERTER USING A PASSIVE INTEGRATOR CIRCUIT
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Issue Dt:
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08/11/2015
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14265129
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04/29/2014
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Pub Dt:
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12/25/2014
| | | | |
Title:
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SONOS STACK WITH SPLIT NITRIDE MEMORY LAYER
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