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Reel/Frame:035308/0345   Pages: 83
Recorded: 03/24/2015
Attorney Dkt #:40767.149
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 103
Page 1 of 2
Pages: 1 2
1
Patent #:
7616029
Issue Dt:
11/10/2009
Application #:
11869019
Filing Dt:
10/09/2007
Title:
HYSTERESIS-BASED PROCESSING FOR APPLICATIONS SUCH AS SIGNAL BIAS MONITORS
2
Patent #:
7586344
Issue Dt:
09/08/2009
Application #:
11872950
Filing Dt:
10/16/2007
Title:
DYNAMIC DELAY OR ADVANCE ADJUSTMENT OF OSCILLATING SIGNAL PHASE
3
Patent #:
7757198
Issue Dt:
07/13/2010
Application #:
11875748
Filing Dt:
10/19/2007
Title:
SCAN CHAIN SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES
4
Patent #:
7411414
Issue Dt:
08/12/2008
Application #:
11877434
Filing Dt:
10/23/2007
Title:
SINGLE-ENDED OUTPUT DRIVER BUFFER
5
Patent #:
8132040
Issue Dt:
03/06/2012
Application #:
11924088
Filing Dt:
10/25/2007
Title:
CHANNEL-TO-CHANNEL DESKEW SYSTEMS AND METHODS
6
Patent #:
7573291
Issue Dt:
08/11/2009
Application #:
11934711
Filing Dt:
11/02/2007
Title:
PROGRAMMABLE LOGIC DEVICE WITH ENHANCED LOGIC BLOCK ARCHITECTURE
7
Patent #:
7895555
Issue Dt:
02/22/2011
Application #:
11937300
Filing Dt:
11/08/2007
Title:
SIMULTANEOUS SWITCHING OUTPUT NOISE ESTIMATION AND REDUCTION SYSTEMS AND METHODS
8
Patent #:
7788620
Issue Dt:
08/31/2010
Application #:
11937328
Filing Dt:
11/08/2007
Title:
INPUT/OUTPUT PLACEMENT SYSTEMS AND METHODS TO REDUCE SIMULTANEOUS SWITCHING OUTPUT NOISE
9
Patent #:
7863931
Issue Dt:
01/04/2011
Application #:
11939787
Filing Dt:
11/14/2007
Title:
FLEXIBLE DELAY CELL ARCHITECTURE
10
Patent #:
7535253
Issue Dt:
05/19/2009
Application #:
11941006
Filing Dt:
11/15/2007
Title:
REGISTER DATA RETENTION SYSTEMS AND METHODS DURING REPROGRAMMING OF PROGRAMMABLE LOGIC DEVICES
11
Patent #:
7902865
Issue Dt:
03/08/2011
Application #:
11941031
Filing Dt:
11/15/2007
Title:
COMPRESSION AND DECOMPRESSION OF CONFIGURATION DATA USING REPEATED DATA FRAMES
12
Patent #:
7788623
Issue Dt:
08/31/2010
Application #:
11947662
Filing Dt:
11/29/2007
Title:
COMPOSITE WIRE INDEXING FOR PROGRAMMABLE LOGIC DEVICES
13
Patent #:
7586325
Issue Dt:
09/08/2009
Application #:
11949130
Filing Dt:
12/03/2007
Title:
INTEGRATED CIRCUIT HAVING INDEPENDENT VOLTAGE AND PROCESS/TEMPERATURE CONTROL
14
Patent #:
7605609
Issue Dt:
10/20/2009
Application #:
11957598
Filing Dt:
12/17/2007
Title:
PROGRAMMABLE LEVEL SHIFTER
15
Patent #:
7630259
Issue Dt:
12/08/2009
Application #:
11959329
Filing Dt:
12/18/2007
Title:
PROGRAMMABLE LOGIC DEVICE WITH BUILT IN SELF TEST
16
Patent #:
7646643
Issue Dt:
01/12/2010
Application #:
11970212
Filing Dt:
01/07/2008
Title:
PROCESS CHARGING MONITOR FOR NONVOLATILE MEMORY
17
Patent #:
7728625
Issue Dt:
06/01/2010
Application #:
12001600
Filing Dt:
12/11/2007
Title:
SERIAL INTERFACE FOR PROGRAMMABLE LOGIC DEVICES
18
Patent #:
7787326
Issue Dt:
08/31/2010
Application #:
12019526
Filing Dt:
01/24/2008
Title:
PROGRAMMABLE LOGIC DEVICE WITH A MULTI-DATA RATE SDRAM INTERFACE
19
Patent #:
8069329
Issue Dt:
11/29/2011
Application #:
12021202
Filing Dt:
01/28/2008
Title:
INTERNALLY TRIGGERED RECONFIGURATION OF PROGRAMMABLE LOGIC DEVICES
20
Patent #:
7652500
Issue Dt:
01/26/2010
Application #:
12044842
Filing Dt:
03/07/2008
Title:
RECONFIGURATION OF PROGRAMMABLE LOGIC DEVICES
21
Patent #:
7890913
Issue Dt:
02/15/2011
Application #:
12055170
Filing Dt:
03/25/2008
Title:
WIRE MAPPING FOR PROGRAMMABLE LOGIC DEVICES
22
Patent #:
7459935
Issue Dt:
12/02/2008
Application #:
12060776
Filing Dt:
04/01/2008
Title:
PROGRAMMABLE LOGIC DEVICES WITH DISTRIBUTED MEMORY
23
Patent #:
7831856
Issue Dt:
11/09/2010
Application #:
12061885
Filing Dt:
04/03/2008
Title:
DETECTION OF TIMING ERRORS IN PROGRAMMABLE LOGIC DEVICES
24
Patent #:
7661878
Issue Dt:
02/16/2010
Application #:
12099933
Filing Dt:
04/09/2008
Title:
ON-CHIP TEMPERATURE SENSOR FOR AN INTEGRATED CIRCUIT
25
Patent #:
7558143
Issue Dt:
07/07/2009
Application #:
12100859
Filing Dt:
04/10/2008
Title:
PROGRAMMABLE LOGIC DEVICE WITH POWER-SAVING ARCHITECTURE
26
Patent #:
7557606
Issue Dt:
07/07/2009
Application #:
12105146
Filing Dt:
04/17/2008
Title:
SYNCHRONIZATION OF DATA SIGNALS AND CLOCK SIGNALS FOR PROGRAMMABLE LOGIC DEVICES
27
Patent #:
7696784
Issue Dt:
04/13/2010
Application #:
12105959
Filing Dt:
04/18/2008
Title:
PROGRAMMABLE LOGIC DEVICE WITH MULTIPLE SLICE TYPES
28
Patent #:
7560953
Issue Dt:
07/14/2009
Application #:
12107883
Filing Dt:
04/23/2008
Title:
POWER MANAGEMENT SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES
29
Patent #:
7897448
Issue Dt:
03/01/2011
Application #:
12122489
Filing Dt:
05/16/2008
Title:
FORMATION OF HIGH VOLTAGE TRANSISTOR WITH HIGH BREAKDOWN VOLTAGE
30
Patent #:
8463832
Issue Dt:
06/11/2013
Application #:
12146042
Filing Dt:
06/25/2008
Title:
DIGITAL SIGNAL PROCESSING BLOCK ARCHITECTURE FOR PROGRAMMABLE LOGIC DEVICE
31
Patent #:
7592834
Issue Dt:
09/22/2009
Application #:
12164265
Filing Dt:
06/30/2008
Title:
LOGIC BLOCK CONTROL ARCHITECTURES FOR PROGRAMMABLE LOGIC DEVICES
32
Patent #:
8261160
Issue Dt:
09/04/2012
Application #:
12182940
Filing Dt:
07/30/2008
Title:
SYNCHRONIZATION OF SERIAL DATA SIGNALS
33
Patent #:
7579865
Issue Dt:
08/25/2009
Application #:
12186027
Filing Dt:
08/05/2008
Title:
SELECTIVE LOADING OF CONFIGURATION DATA INTO CONFIGURATION MEMORY CELLS
34
Patent #:
7605602
Issue Dt:
10/20/2009
Application #:
12188120
Filing Dt:
08/07/2008
Title:
LOW-POWER OUTPUT DRIVER BUFFER CIRCUIT
35
Patent #:
7911229
Issue Dt:
03/22/2011
Application #:
12238959
Filing Dt:
09/26/2008
Publication #:
US20100079166
Pub Dt:
04/01/2010
Title:
PROGRAMMABLE SIGNAL ROUTING SYSTEMS HAVING LOW STATIC LEAKAGE
36
Patent #:
7663419
Issue Dt:
02/16/2010
Application #:
12273868
Filing Dt:
11/19/2008
Title:
CLOCK SYSTEMS AND METHODS
37
Patent #:
8112731
Issue Dt:
02/07/2012
Application #:
12277217
Filing Dt:
11/24/2008
Title:
CONGESTION-DRIVEN PLACEMENT SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES
38
Patent #:
7992120
Issue Dt:
08/02/2011
Application #:
12323974
Filing Dt:
11/26/2008
Title:
CONGESTION ESTIMATION FOR PROGRAMMABLE LOGIC DEVICES
39
Patent #:
7656193
Issue Dt:
02/02/2010
Application #:
12327128
Filing Dt:
12/03/2008
Title:
PROGRAMMABLE LOGIC DEVICE AND METHOD OF TESTING
40
Patent #:
8856718
Issue Dt:
10/07/2014
Application #:
12337502
Filing Dt:
12/17/2008
Title:
CONGESTION ESTIMATION BASED ON ROUTING RESOURCES OF PROGRAMMABLE LOGIC DEVICES
41
Patent #:
8181139
Issue Dt:
05/15/2012
Application #:
12341929
Filing Dt:
12/22/2008
Title:
MULTI-PRIORITY PLACEMENT FOR CONFIGURING PROGRAMMABLE LOGIC DEVICES
42
Patent #:
7714608
Issue Dt:
05/11/2010
Application #:
12370039
Filing Dt:
02/12/2009
Title:
TEMPERATURE-INDEPENDENT, LINEAR ON-CHIP TERMINATION RESISTANCE
43
Patent #:
7957208
Issue Dt:
06/07/2011
Application #:
12389149
Filing Dt:
02/19/2009
Title:
FLEXIBLE MEMORY ARCHITECTURES FOR PROGRAMMABLE LOGIC DEVICES
44
Patent #:
7844243
Issue Dt:
11/30/2010
Application #:
12402751
Filing Dt:
03/12/2009
Title:
RECEIVER FOR DIFFERENTIAL AND REFERENCE VOLTAGE SIGNALING WITH PROGRAMMABLE COMMON MODE
45
Patent #:
8069431
Issue Dt:
11/29/2011
Application #:
12406772
Filing Dt:
03/18/2009
Title:
ROUTING SIGNALS TO PINS OF COMPONENTS IN PROGRAMMABLE LOGIC DEVICES
46
Patent #:
8086986
Issue Dt:
12/27/2011
Application #:
12408047
Filing Dt:
03/20/2009
Title:
CLOCK BOOSTING SYSTEMS AND METHODS
47
Patent #:
7675321
Issue Dt:
03/09/2010
Application #:
12409757
Filing Dt:
03/24/2009
Title:
DUAL-SLICE ARCHITECTURES FOR PROGRAMMABLE LOGIC DEVICES
48
Patent #:
7808405
Issue Dt:
10/05/2010
Application #:
12413787
Filing Dt:
03/30/2009
Title:
EFFICIENT BITSTREAM COMPRESSION
49
Patent #:
7741865
Issue Dt:
06/22/2010
Application #:
12430848
Filing Dt:
04/27/2009
Title:
SOFT ERROR UPSET HARDENED INTEGRATED CIRCUIT SYSTEMS AND METHODS
50
Patent #:
7876125
Issue Dt:
01/25/2011
Application #:
12464822
Filing Dt:
05/12/2009
Title:
REGISTER DATA RETENTION SYSTEMS AND METHODS DURING REPROGRAMMING OF PROGRAMMABLE LOGIC DEVICES
51
Patent #:
7868654
Issue Dt:
01/11/2011
Application #:
12465444
Filing Dt:
05/13/2009
Title:
READING AN EXTERNAL MEMORY DEVICE TO DETERMINE ITS INTERFACE CHARACTERISTICS FOR CONFIGURING A PROGRAMMABLE LOGIC DEVICE
52
Patent #:
7737723
Issue Dt:
06/15/2010
Application #:
12467800
Filing Dt:
05/18/2009
Title:
TRANSPARENT FIELD RECONFIGURATION FOR PROGRAMMABLE LOGIC DEVICES
53
Patent #:
8044682
Issue Dt:
10/25/2011
Application #:
12476155
Filing Dt:
06/01/2009
Publication #:
US20100301898
Pub Dt:
12/02/2010
Title:
FPGA HAVING LOW POWER, FAST CARRY CHAIN
54
Patent #:
7702977
Issue Dt:
04/20/2010
Application #:
12480565
Filing Dt:
06/08/2009
Title:
PROGRAMMABLE LOGIC DEVICES WITH CUSTOM IDENTIFICATION SYSTEMS AND METHODS
55
Patent #:
8165164
Issue Dt:
04/24/2012
Application #:
12494822
Filing Dt:
06/30/2009
Title:
IN-SYSTEM RECONFIGURABLE CIRCUIT FOR MAPPING DATA WORDS OF DIFFERENT LENGTHS
56
Patent #:
7724029
Issue Dt:
05/25/2010
Application #:
12502141
Filing Dt:
07/13/2009
Title:
POWER MANAGEMENT FOR INTEGRATED CIRCUITS SUCH AS PROGRAMMABLE LOGIC DEVICES
57
Patent #:
7768300
Issue Dt:
08/03/2010
Application #:
12511388
Filing Dt:
07/29/2009
Title:
PROGRAMMABLE LOGIC DEVICE PROVIDING SERIAL PERIPHERAL INTERFACES
58
Patent #:
8255733
Issue Dt:
08/28/2012
Application #:
12512944
Filing Dt:
07/30/2009
Title:
CLOCK DELAY AND SKEW CONTROL SYSTEMS AND METHODS
59
Patent #:
7969248
Issue Dt:
06/28/2011
Application #:
12512961
Filing Dt:
07/30/2009
Title:
OSCILLATOR TUNING FOR PHASE-LOCKED LOOP CIRCUIT
60
Patent #:
7808855
Issue Dt:
10/05/2010
Application #:
12538810
Filing Dt:
08/10/2009
Title:
DISTRIBUTED FRONT-END FIFO FOR SOURCE-SYNCHRONOUS INTERFACES WITH NON-CONTINUOUS CLOCKS
61
Patent #:
8010871
Issue Dt:
08/30/2011
Application #:
12561140
Filing Dt:
09/16/2009
Title:
AUTO RECOVERY FROM VOLATILE SOFT ERROR UPSETS (SEUS)
62
Patent #:
7746107
Issue Dt:
06/29/2010
Application #:
12564781
Filing Dt:
09/22/2009
Title:
REDUNDANT CONFIGURATION MEMORY SYSTEMS AND METHODS
63
Patent #:
8122277
Issue Dt:
02/21/2012
Application #:
12578470
Filing Dt:
10/13/2009
Title:
CLOCK DISTRIBUTION CHIP
64
Patent #:
8112656
Issue Dt:
02/07/2012
Application #:
12578492
Filing Dt:
10/13/2009
Title:
CLOCK DISTRIBUTION CHIP
65
Patent #:
7985656
Issue Dt:
07/26/2011
Application #:
12607333
Filing Dt:
10/28/2009
Title:
SHALLOW TRENCH ISOLATION (STI) WITH TRENCH LINER OF INCREASED THICKNESS
66
Patent #:
7989911
Issue Dt:
08/02/2011
Application #:
12607868
Filing Dt:
10/28/2009
Title:
SHALLOW TRENCH ISOLATION (STI) WITH TRENCH LINER OF INCREASED THICKNESS
67
Patent #:
8059470
Issue Dt:
11/15/2011
Application #:
12611262
Filing Dt:
11/03/2009
Title:
FLASH MEMORY ARRAY WITH INDEPENDENTLY ERASABLE SECTORS
68
Patent #:
7944765
Issue Dt:
05/17/2011
Application #:
12626289
Filing Dt:
11/25/2009
Title:
PROGRAMMABLE LOGIC DEVICE WITH BUILT IN SELF TEST
69
Patent #:
8060784
Issue Dt:
11/15/2011
Application #:
12630163
Filing Dt:
12/03/2009
Title:
PROGRAMMABLE LOGIC DEVICE AND METHODS FOR PROVIDING MULTI-BOOT CONFIGURATION DATA SUPPORT
70
Patent #:
8200179
Issue Dt:
06/12/2012
Application #:
12637884
Filing Dt:
12/15/2009
Title:
COMBINED VARIABLE GAIN AMPLIFIER AND ANALOG EQUALIZER CIRCUIT
71
Patent #:
8040152
Issue Dt:
10/18/2011
Application #:
12698283
Filing Dt:
02/02/2010
Title:
SEPARATE CONFIGURATION OF I/O CELLS AND LOGIC CORE IN A PROGRAMMABLE LOGIC DEVICE
72
Patent #:
7924054
Issue Dt:
04/12/2011
Application #:
12706227
Filing Dt:
02/16/2010
Title:
LATENCY MEASUREMENTS FOR WIRELESS COMMUNICATIONS
73
Patent #:
7834652
Issue Dt:
11/16/2010
Application #:
12709685
Filing Dt:
02/22/2010
Title:
METHOD AND DEVICES FOR STORING A SECURITY KEY USING PROGRAMMABLE FUSES
74
Patent #:
8040159
Issue Dt:
10/18/2011
Application #:
12729952
Filing Dt:
03/23/2010
Title:
COMPARATOR WITH JITTER MITIGATION
75
Patent #:
8384427
Issue Dt:
02/26/2013
Application #:
12752455
Filing Dt:
04/01/2010
Title:
CONFIGURING MULTIPLE PROGRAMMABLE LOGIC DEVICES WITH SERIAL PERIPHERAL INTERFACES
76
Patent #:
8664774
Issue Dt:
03/04/2014
Application #:
12757087
Filing Dt:
04/09/2010
Title:
BONDWIRE CONFIGURATION FOR REDUCED CROSSTALK
77
Patent #:
8108754
Issue Dt:
01/31/2012
Application #:
12786359
Filing Dt:
05/24/2010
Title:
PROGRAMMABLE LOGIC DEVICE PROGRAMMING VERIFICATION SYSTEMS AND METHODS
78
Patent #:
8164499
Issue Dt:
04/24/2012
Application #:
12813540
Filing Dt:
06/11/2010
Title:
SHARED-ARRAY MULTIPLE-OUTPUT DIGITAL-TO-ANALOG CONVERTER
79
Patent #:
8441292
Issue Dt:
05/14/2013
Application #:
12813573
Filing Dt:
06/11/2010
Title:
DELAYING DATA SIGNALS
80
Patent #:
7868646
Issue Dt:
01/11/2011
Application #:
12818544
Filing Dt:
06/18/2010
Title:
SOFT ERROR UPSET HARDENED INTEGRATED CIRCUIT SYSTEMS AND METHODS
81
Patent #:
8286116
Issue Dt:
10/09/2012
Application #:
12871764
Filing Dt:
08/30/2010
Title:
COMPOSITE WIRE INDEXING FOR PROGRAMMABLE LOGIC DEVICES
82
Patent #:
8351287
Issue Dt:
01/08/2013
Application #:
12976412
Filing Dt:
12/22/2010
Title:
BITLINE FLOATING CIRCUIT FOR MEMORY POWER REDUCTION
83
Patent #:
8477549
Issue Dt:
07/02/2013
Application #:
12976520
Filing Dt:
12/22/2010
Title:
TRIGGERED SENSE AMPLIFIER
84
Patent #:
8522126
Issue Dt:
08/27/2013
Application #:
12977011
Filing Dt:
12/22/2010
Title:
Blocking Memory Readback In A Programmable Logic Device
85
Patent #:
8274412
Issue Dt:
09/25/2012
Application #:
12987393
Filing Dt:
01/10/2011
Title:
SERIALIZER WITH ODD GEARING RATIO
86
Patent #:
8384428
Issue Dt:
02/26/2013
Application #:
13006622
Filing Dt:
01/14/2011
Title:
PRE-CONFIGURATION PROGRAMMABILITY OF I/O CIRCUITRY
87
Patent #:
8324934
Issue Dt:
12/04/2012
Application #:
13007688
Filing Dt:
01/17/2011
Title:
PROGRAMMABLE BUFFER
88
Patent #:
8248136
Issue Dt:
08/21/2012
Application #:
13007804
Filing Dt:
01/17/2011
Title:
LOW-POWER, GLITCH-LESS, CONFIGURABLE DELAY ELEMENT
89
Patent #:
8104009
Issue Dt:
01/24/2012
Application #:
13026555
Filing Dt:
02/14/2011
Title:
WIRE MAPPING FOR PROGRAMMABLE LOGIC DEVICES
90
Patent #:
8058898
Issue Dt:
11/15/2011
Application #:
13034174
Filing Dt:
02/24/2011
Title:
COMPRESSION AND DECOMPRESSION OF CONFIGURATION DATA USING REPEATED DATA FRAMES
91
Patent #:
8654600
Issue Dt:
02/18/2014
Application #:
13037703
Filing Dt:
03/01/2011
Title:
LOW-VOLTAGE CURRENT SENSE AMPLIFIER
92
Patent #:
8368424
Issue Dt:
02/05/2013
Application #:
13038259
Filing Dt:
03/01/2011
Title:
PROGRAMMABLE LOGIC DEVICE WAKEUP USING A GENERAL PURPOSE INPUT/OUTPUT PORT
93
Patent #:
8816718
Issue Dt:
08/26/2014
Application #:
13038270
Filing Dt:
03/01/2011
Title:
VARIABLE RESPONSE MODE FOR SYNCHRONOUS DATA READ
94
Patent #:
8553463
Issue Dt:
10/08/2013
Application #:
13052142
Filing Dt:
03/21/2011
Title:
VOLTAGE DISCHARGE CIRCUIT HAVING DIVIDED DISCHARGE CURRENT
95
Patent #:
8319521
Issue Dt:
11/27/2012
Application #:
13076300
Filing Dt:
03/30/2011
Title:
SAFE PROGRAMMING OF KEY INFORMATION INTO NON-VOLATILE MEMORY FOR A PROGRAMMABLE LOGIC DEVICE
96
Patent #:
8314634
Issue Dt:
11/20/2012
Application #:
13079578
Filing Dt:
04/04/2011
Title:
POWER CONTROL BLOCK WITH OUTPUT GLITCH PROTECTION
97
Patent #:
8531222
Issue Dt:
09/10/2013
Application #:
13079595
Filing Dt:
04/04/2011
Title:
PHASE LOCKED LOOP CIRCUIT WITH SELECTABLE FEEDBACK PATHS
98
Patent #:
8138790
Issue Dt:
03/20/2012
Application #:
13083889
Filing Dt:
04/11/2011
Title:
LATENCY MEASUREMENTS FOR WIRELESS COMMUNICATIONS
99
Patent #:
8441284
Issue Dt:
05/14/2013
Application #:
13154885
Filing Dt:
06/07/2011
Title:
FLEXIBLE UPDATING OF MULTI-BIT REGISTERS
100
Patent #:
8547075
Issue Dt:
10/01/2013
Application #:
13155547
Filing Dt:
06/08/2011
Title:
VOLTAGE REGULATORS WITH A SHARED CAPACITOR
Assignors
1
LATTICE SEMICONDUCTOR CORPORATION
Exec Dt:
03/10/2015
2
SIBEAM, INC
Exec Dt:
03/10/2015
3
SILICON IMAGE, INC.
Exec Dt:
03/10/2015
4
DVDO, INC.
Exec Dt:
03/10/2015
Assignee
1
JEFFERIES FINANCE LLC
520 MADISON AVENUE
NEW YORK, NEW YORK 10022
Correspondence name and address
PROSKAUER ROSE LLP
ONE INTERNATIONAL PLACE
BOSTON, MA 02110

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