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09/09/1997
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12/10/2002
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04/19/1994
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06/22/1999
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04/19/1994
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10/28/1997
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04/19/1994
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09/29/1998
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04/19/1994
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12/05/2000
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04/19/1994
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06/02/1998
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05/09/1994
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08/13/2002
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06/14/1994
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09/22/1998
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06/20/1994
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01/09/1996
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07/19/1994
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12/12/1995
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07/29/1994
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06/02/1998
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08/08/1994
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01/23/1996
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08/09/1994
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08/04/1998
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08/12/1994
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05/21/1996
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08/15/1994
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03/25/1997
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08/24/1994
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06/10/1997
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08/24/1994
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11/14/1995
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08/31/1994
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12/24/1996
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09/07/1994
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08/06/1996
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09/08/1994
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09/24/1996
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09/09/1994
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04/08/1997
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09/13/1994
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06/10/1997
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09/13/1994
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10/22/1996
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09/13/1994
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07/16/1996
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09/15/1994
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09/03/1996
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09/16/1994
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07/28/1998
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09/22/1994
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11/14/1995
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09/22/1994
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10/22/1996
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09/23/1994
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10/28/1997
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10/05/1994
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06/10/1997
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10/24/1994
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01/28/1997
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10/24/1994
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11/26/1996
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11/02/1994
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11/25/1997
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11/04/1994
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09/24/1996
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11/10/1994
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05/21/1996
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11/10/1994
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07/16/1996
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11/22/1994
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12/05/1995
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12/02/1994
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05/06/1997
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12/07/1994
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11/21/1995
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12/07/1994
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01/05/1999
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12/08/1994
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07/29/1997
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12/13/1994
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12/02/1997
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12/13/1994
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11/19/1996
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12/28/1994
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07/15/1997
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12/30/1994
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10/21/1997
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12/30/1994
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04/22/1997
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12/30/1994
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09/09/1997
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01/03/1995
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04/29/1997
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01/09/1995
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02/03/1998
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01/09/1995
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07/08/1997
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01/18/1995
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01/28/1997
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01/18/1995
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12/24/1996
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04/15/1997
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01/20/1995
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07/01/1997
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01/25/1995
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02/04/1997
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01/24/1995
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03/25/1997
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01/26/1995
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05/06/1997
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02/03/1995
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01/13/1998
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02/16/1995
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01/21/1997
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02/16/1995
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10/28/1997
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02/17/1995
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12/21/1999
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03/01/1995
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08/12/1997
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03/01/1995
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MICROELECTRONIC INTEGRATED CIRCUIT INCLUDING HEXAGONAL SEMICONDUCTOR "AND" GATE DEVICE
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07/23/1996
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03/01/1995
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10/28/1997
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03/06/1995
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12/09/1997
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03/17/1995
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03/23/1995
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08/26/1997
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08409757
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Filing Dt:
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03/24/1995
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Title:
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PHYSICAL DESIGN AUTOMATION SYSTEM AND METHOD USING HIERARCHICAL CLUSTERIZATION AND PLACEMENT IMPROVEMENT BASED ON COMPLETE RE-PLACEMENT OF CELL CLUSTERS
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Patent #:
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Issue Dt:
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06/27/2000
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Application #:
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08410375
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Filing Dt:
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03/27/1995
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Title:
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BICMOS COMPACTED LOGIC ARRAY
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Patent #:
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Issue Dt:
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03/11/1997
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Application #:
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08412087
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Filing Dt:
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03/27/1995
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Title:
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SEMICONDUCTOR DEVICE PACKAGE FABRICATION METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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02/15/2000
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Application #:
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08412536
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Filing Dt:
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03/28/1995
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Title:
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NETWORK ARCHITECTURE
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Patent #:
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Issue Dt:
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09/03/1996
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Application #:
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08421321
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Filing Dt:
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04/13/1995
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Title:
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MEMORY PARTITIONING
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Patent #:
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Issue Dt:
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11/06/2001
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Application #:
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08424828
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Filing Dt:
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04/19/1995
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Title:
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SUPPORT FOR SEMICONDUCTOR BOND WIRES
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Patent #:
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Issue Dt:
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07/23/1996
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Application #:
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08432358
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Filing Dt:
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05/01/1995
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Title:
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HIGH SPEED DRIVER CIRCUIT WITH IMPROVED OFF TRANSITION FEEDBACK
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08434276
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Filing Dt:
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05/03/1995
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Title:
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PROCESS FOR MOUNTING A SEMICONDUCTOR DEVICE TO A CIRCUIT SUBBSTRATE
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Patent #:
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Issue Dt:
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04/08/1997
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Application #:
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08434660
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Filing Dt:
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05/04/1995
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Title:
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SEMICONDUCTOR CELL HAVING A VARIABLE TRANSISTOR WIDTH
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08434673
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Filing Dt:
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05/04/1995
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Title:
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PROCESS FOR MAKING GROUP IV SEMICONDUCTOR SUBSTRATE TREATED WITH ONE OR MORE GROUP IV ELEMENTS TO FORM ONE OR MORE BARRIER REGIONS CAPABLE OF INHIBITING MIGRATION OF DOPANT MATERILS IN SUBSTRATE
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Patent #:
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Issue Dt:
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01/13/1998
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Application #:
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08434674
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Filing Dt:
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05/04/1995
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Title:
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OXIDE FORMED IN SEMICONDUCTOR SUBSTRATE BY IMPLANTATION OF SUBSTRATE WITH A NOBLE GAS PRIOR TO OXIDATION
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08437957
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Filing Dt:
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05/09/1995
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Title:
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ELECTRONIC SIMULATION AND EMULATION SYSTEM
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08441539
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Filing Dt:
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05/15/1995
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Title:
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METHOD OF CALCULATING MACROCELL POWER AND DELAY VALUES
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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08442726
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Filing Dt:
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05/17/1995
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Title:
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METHOD OF ACCOMPLISHING A LEAST-RECENTLY USED REPLACEMENT SCHEME USING REPPLE COUNTERS
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Patent #:
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Issue Dt:
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01/14/1997
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Application #:
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08443887
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Filing Dt:
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05/31/1995
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Title:
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A PSEUDO-LRU CACHE MEMORY REPLACEMENT METHOD AND APPARATUS UTILIZING NODES
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Patent #:
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Issue Dt:
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06/29/1999
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Application #:
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08445828
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Filing Dt:
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05/22/1995
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Title:
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METHOD AND APPARATUS FOR TRANSFERRING DATA BETWEEN TWO DEVICES WITH REDUCED MICROPROCESSOR OVERHEAD
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Patent #:
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Issue Dt:
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12/24/1996
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Application #:
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08447377
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Filing Dt:
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05/23/1995
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Title:
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METHOD FOR TRANSFERRING DATA BETWEEN TWO DEVICES THAT INSURES DATA RECOVERY IN THE EVENT OF A FAULT
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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08447594
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Filing Dt:
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05/23/1995
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Title:
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APPARATUS AND METHOD FOR TRANSFERRING DATA FROM A HOST COMPUTER TO A STORAGE MEDIA USING SELECTABLE CACHING STRATEGIES
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08451177
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Filing Dt:
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05/26/1995
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Title:
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AUTOMATED GENERATION OF MEGACELLS IN AN INTEGRATED CIRCUIT DESIGN SYSTEM
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Patent #:
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Issue Dt:
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10/20/1998
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Application #:
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08454539
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Filing Dt:
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05/30/1995
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Title:
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MICROMACHINED MICROSCOPIC PARTICLE SELECTING APPARATUS
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Patent #:
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Issue Dt:
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07/22/1997
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Application #:
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08461387
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Filing Dt:
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06/05/1995
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Title:
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INTEGRATED CIRCUIT STRUCTURE HAVING FLOATING ELECTRODE WITH DISCONTINUOUS PHASE OF METAL SILICIDE FORMED ON A SURFACE THEREOF AND PROCESS FOR MAKING SAME
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Patent #:
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Issue Dt:
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06/11/1996
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Application #:
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08463064
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Filing Dt:
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06/05/1995
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Title:
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RELIABLE METALLIZATION WITH BARRIER FOR SEMICONDUCTORS
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08466383
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Filing Dt:
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06/06/1995
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Title:
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ANALOG TO DIGITAL CONVERTER
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Patent #:
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Issue Dt:
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05/26/1998
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Application #:
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08466384
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Filing Dt:
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06/06/1995
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Title:
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DIFFERENTIAL DELAY BUFFER
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08467849
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Filing Dt:
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06/06/1995
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Title:
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DIFFERENTIAL SIGNAL RECEIVER
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Patent #:
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Issue Dt:
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04/22/1997
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Application #:
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08472475
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Filing Dt:
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06/07/1995
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Title:
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ASYNCHRONOUS TRANSFER MODE (ATM) INTERCONNECTION SYSTEM FOR MULTIPLE HOSTS INCLUDING ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
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Patent #:
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Issue Dt:
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11/12/1996
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Application #:
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08472857
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Filing Dt:
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06/07/1995
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Title:
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MEMORY TESTING APPARATUS FOR MICROELECTRONIC INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08473543
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Filing Dt:
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06/07/1995
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Title:
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LAYOUT CONFIGURATION FOR AN INTEGRATED CIRCUIT GATE ARRAY
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08474794
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Filing Dt:
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06/07/1995
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Title:
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METHOD OF MAKING SELF-ALIGNED REMOTE POLYSILICON CONTACTS
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Patent #:
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Issue Dt:
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08/26/1997
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Application #:
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08475028
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Filing Dt:
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06/06/1995
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Title:
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METHOD OF FORMING AN MOS-TYPE INTEGRATED CIRCUIT STRUCTURE WITH A DIODE FORMED IN THE SUBSTRATE UNDER A POLYSILICON GATE ELECTRODE TO CONSERVE SPACE
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Patent #:
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Issue Dt:
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06/10/1997
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Application #:
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08475586
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Filing Dt:
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06/07/1995
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Title:
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SILICON CONTROLLED RECTIFIER (SCR) WITH CAPACITIVE TRIGGER
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