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Reel/Frame:035390/0388   Pages: 247
Recorded: 04/03/2015
Attorney Dkt #:040981-0072
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5804
Page 13 of 59
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
1
Patent #:
Issue Dt:
09/29/2009
Application #:
09344169
Filing Dt:
06/24/1999
Title:
DETERMINING TIMING OF INTEGRATED CIRCUITS
2
Patent #:
Issue Dt:
11/21/2000
Application #:
09345432
Filing Dt:
07/01/1999
Title:
ROUTING DENSITY ENHANCEMENT FOR SEMICOMDUCTOR BGA PACKAGES AND PRINTED WIRING BOARDS
3
Patent #:
Issue Dt:
04/26/2005
Application #:
09345568
Filing Dt:
12/13/1999
Title:
METHOD AND APPARATUS FOR TESTING OR CALIBRATING AN ANALOG TO DIGITAL CONVERTER USING A PHASE LOCKED LOOP
4
Patent #:
Issue Dt:
05/15/2001
Application #:
09346493
Filing Dt:
06/30/1999
Title:
PROCESS TO PREVENT STRESS CRACKING OF DIELECTRIC FILMS ON SEMICONDUCTOR WAFERS
5
Patent #:
Issue Dt:
03/08/2005
Application #:
09346784
Filing Dt:
07/07/1999
Title:
METHOD AND APPARATUS FOR PERFORMING AN INTERFREQUENCY SEARCH
6
Patent #:
Issue Dt:
08/28/2001
Application #:
09347487
Filing Dt:
07/02/1999
Title:
METHOD FOR MANUFACTURING A METAL-TO-METAL CAPACITOR UTILIZING ONLY ONE MASKING STEP
7
Patent #:
Issue Dt:
11/04/2003
Application #:
09350700
Filing Dt:
07/09/1999
Title:
METHOD AND APPARATUS FOR MULTI-LEVEL CODING OF DIGITAL SIGNALS
8
Patent #:
Issue Dt:
01/22/2002
Application #:
09353216
Filing Dt:
07/14/1999
Title:
VIDEO ON DEMAND DVD SYSTEM
9
Patent #:
Issue Dt:
11/20/2001
Application #:
09354644
Filing Dt:
07/15/1999
Title:
INITIAL PHASE CONTROL OF AN OSCILLATOR
10
Patent #:
Issue Dt:
10/16/2001
Application #:
09354685
Filing Dt:
07/15/1999
Title:
DOUBLE-CLAMPED DELAY STAGE AND VOLTAGE CONTROLLED OSCILLATOR
11
Patent #:
Issue Dt:
07/30/2002
Application #:
09358606
Filing Dt:
07/21/1999
Title:
OFF-AXIS PUPIL APERTURE AND METHOD FOR MAKING THE SAME
12
Patent #:
Issue Dt:
05/09/2000
Application #:
09361684
Filing Dt:
07/27/1999
Title:
CONSISTENT ALIGNMENT MARK PROFILES ON SEMICONDUCTOR WAFERS USING FINE GRAIN TUNGSTEN PROTECTIVE LAYER
13
Patent #:
Issue Dt:
09/05/2000
Application #:
09362645
Filing Dt:
07/27/1999
Title:
PROCESS FOR TREATING EXPOSED SURFACES OF A LOW DIELECTRIC CONSTANT CARBON DOPED SILICON OXIDE DIELECTRIC MATERIAL TO PROTECT THE MATERIAL FROM DAMAGE
14
Patent #:
Issue Dt:
08/14/2001
Application #:
09362648
Filing Dt:
07/27/1999
Title:
PRE-CONDITIONING POLISHING PADS FOR CHEMICAL-MECHANICAL POLISHING
15
Patent #:
Issue Dt:
11/22/2005
Application #:
09363311
Filing Dt:
07/28/1999
Title:
FUNCTIONAL-PATTERN MANAGEMENT SYSTEM FOR DEVICE VERIFICATION
16
Patent #:
Issue Dt:
04/15/2003
Application #:
09363697
Filing Dt:
07/28/1999
Title:
DETECTING INTERPORT FAULTS IN MULTIPORT STATIC MEMORIES
17
Patent #:
Issue Dt:
09/17/2002
Application #:
09364140
Filing Dt:
07/30/1999
Title:
METHOD AND APPARATUS FOR PLANRIZING A WAFER SURFACE OF A SEMICONDUCTOR WAFER HAVING AN ELEVATED PORTION EXTENDING THEREFROM
18
Patent #:
Issue Dt:
07/18/2000
Application #:
09365440
Filing Dt:
08/02/1999
Title:
METHOD OF SINGLE STEP DAMASCENE PROCESS FOR DEPOSITION AND GLOBAL PLANARIZATION
19
Patent #:
Issue Dt:
05/23/2000
Application #:
09365455
Filing Dt:
08/02/1999
Title:
METHOD OF FORMING DRAM CAPACITOR BY FORMING SEPARATE DIELECTRIC LAYERS IN A CMOS PROCESS
20
Patent #:
Issue Dt:
04/10/2001
Application #:
09366827
Filing Dt:
08/04/1999
Title:
HARDWARE MECHANISM FOR MANAGING CACHE STRUCTURES IN A DATA STORAGE SYSTEM
21
Patent #:
Issue Dt:
05/07/2002
Application #:
09369746
Filing Dt:
08/06/1999
Title:
CODING SYSTEM AND METHOD FOR PARTIAL RESPONSE CHANNELS
22
Patent #:
Issue Dt:
02/25/2003
Application #:
09370501
Filing Dt:
08/09/1999
Title:
LOW THRESHOLD VOLTAGE MOS TRANSISTOR AND METHOD OF MANUFACTURE
23
Patent #:
Issue Dt:
10/16/2001
Application #:
09370564
Filing Dt:
08/09/1999
Title:
PROVIDING AN UPGRADE PATH FOR AN EXISTING DATA STORAGE SYSTEM
24
Patent #:
Issue Dt:
09/10/2002
Application #:
09370856
Filing Dt:
08/09/1999
Title:
NON-DESTRUCTIVE METHOD OF DETECTING DIE CRACK PROBLEMS
25
Patent #:
Issue Dt:
12/17/2002
Application #:
09372275
Filing Dt:
08/11/1999
Title:
TESTING CONTENT ADDRESSABLE STATIC MEMORIES
26
Patent #:
Issue Dt:
03/12/2002
Application #:
09373864
Filing Dt:
08/13/1999
Title:
METHODS AND APPARATUS FOR USING INTERRUPT SCORE BOARDING WITH INTELLIGENT PERIPHERAL DEVICE
27
Patent #:
Issue Dt:
05/07/2002
Application #:
09374053
Filing Dt:
08/13/1999
Title:
METHODS AND APPARATUS FOR RAID HARDWARE SEQUENCING TO ACHIEVE A HIGHER PERFORMANCE RAID ARCHITECTURE
28
Patent #:
Issue Dt:
09/04/2001
Application #:
09377887
Filing Dt:
08/19/1999
Title:
MULTIPLE LAYER TAPE BALL GRID ARRAY PACKAGE
29
Patent #:
Issue Dt:
06/04/2002
Application #:
09377999
Filing Dt:
08/20/1999
Title:
LOW SKEW SIGNAL DISTRIBUTION FOR INTEGRATED CIRCUITS
30
Patent #:
Issue Dt:
05/07/2002
Application #:
09382945
Filing Dt:
08/25/1999
Title:
OPTICAL/ELECTRICAL INPUTS FOR AN INTEGRATED CIRCUIT
31
Patent #:
Issue Dt:
09/23/2003
Application #:
09382946
Filing Dt:
08/25/1999
Title:
LOW SKEW SIGNAL DISTRIBUTION FOR INTEGRATED CIRCUITS
32
Patent #:
Issue Dt:
08/07/2001
Application #:
09383108
Filing Dt:
08/25/1999
Title:
LOW VOLTAGE BIPOLAR TRANSCONDUCTOR CIRCUIT WITH EXTENDED DYNAMIC RANGE
33
Patent #:
Issue Dt:
07/13/2004
Application #:
09384705
Filing Dt:
08/27/1999
Title:
RESET SEQUENCE FOR SEGMENTED COMPUTER NETWORK TOPOLOGY
34
Patent #:
Issue Dt:
05/08/2001
Application #:
09384850
Filing Dt:
08/27/1999
Title:
RATE 32/34 (D=0, G=9/I=9) MODULATION CODE WITH PARITY FOR A RECORDING CHANNEL
35
Patent #:
Issue Dt:
11/06/2001
Application #:
09385190
Filing Dt:
08/30/1999
Title:
VITERBI DETECTOR WITH PARTIAL ERASURE COMPENSATION FOR READ CHANNELS
36
Patent #:
Issue Dt:
11/19/2002
Application #:
09385588
Filing Dt:
08/27/1999
Title:
COMPENSATING FOR INITIAL SIGNAL INTERFERENCE EXHIBITED BY DIFFERENTIAL TRANSMISSION LINES
37
Patent #:
Issue Dt:
04/24/2001
Application #:
09386029
Filing Dt:
08/30/1999
Title:
ARCHITECTURE TO REDUCE ERRORS DUE TO METASTABILITY IN ANALOG TO DIGITAL CONVERTERS
38
Patent #:
Issue Dt:
12/16/2003
Application #:
09386088
Filing Dt:
08/30/1999
Publication #:
Pub Dt:
09/11/2003
Title:
BITSTREAM GENERATION TOOLS FOR BITSTREAM MANAGEMENT SYSTEM
39
Patent #:
Issue Dt:
08/07/2001
Application #:
09387448
Filing Dt:
09/01/1999
Title:
SUPPLY INDEPENDENT BIASING SCHEME
40
Patent #:
Issue Dt:
01/02/2001
Application #:
09388036
Filing Dt:
09/01/1999
Title:
DIFFERENTIAL CHARGE PUMP WITH REDUCED CHARGE-COUPLING EFFECTS
41
Patent #:
Issue Dt:
11/19/2002
Application #:
09388037
Filing Dt:
09/01/1999
Title:
ERROR SIGNAL CALCULATION FROM A VITERBI OUTPUT
42
Patent #:
Issue Dt:
03/19/2002
Application #:
09388727
Filing Dt:
09/02/1999
Title:
SWAPPED DRAIN STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION
43
Patent #:
Issue Dt:
02/06/2001
Application #:
09388996
Filing Dt:
09/01/1999
Title:
MAGNITUDE AND GROUP DELAY SHAPING CIRCUIT IN CONTINUOUS-TIME READ CHANNEL FILTERS
44
Patent #:
Issue Dt:
06/12/2001
Application #:
09389872
Filing Dt:
09/02/1999
Title:
METHOD AND APPARATUS FOR ENCODING A BINARY SIGNAL
45
Patent #:
Issue Dt:
06/11/2002
Application #:
09392039
Filing Dt:
09/08/1999
Title:
METHOD AND APPARATUS FOR INCREASING DATA RATES BETWEEN NODES OF A SERIAL BUS
46
Patent #:
Issue Dt:
07/31/2001
Application #:
09393208
Filing Dt:
09/09/1999
Title:
PROGRAMMABLE WRITE SIGNAL GENERATOR
47
Patent #:
Issue Dt:
04/01/2003
Application #:
09393388
Filing Dt:
09/10/1999
Title:
FORWARD ERROR CORRECTION APPARATUS AND METHODS
48
Patent #:
Issue Dt:
09/03/2002
Application #:
09393399
Filing Dt:
09/10/1999
Title:
FORWARD ERROR CORRECTION APPARATUS AND METHODS
49
Patent #:
Issue Dt:
09/11/2001
Application #:
09395062
Filing Dt:
09/13/1999
Title:
ALIGNMENT OF OPENINGS IN SEMICONDUCTOR FABRICATION
50
Patent #:
Issue Dt:
12/11/2001
Application #:
09395507
Filing Dt:
09/14/1999
Title:
METHOD AND APPARATUS FOR DETERMINING TEMPERATURE OF A SEMICONDUCTOR WAFER DURING FABRICATION THEREOF
51
Patent #:
Issue Dt:
06/29/2004
Application #:
09397542
Filing Dt:
09/16/1999
Title:
DETECTING FAULTS IN DUAL PORT FIFO MEMORIES
52
Patent #:
Issue Dt:
07/09/2002
Application #:
09400686
Filing Dt:
09/22/1999
Title:
SILICON VERIFICATION WITH EMBEDDED TESTBENCHES
53
Patent #:
Issue Dt:
12/11/2001
Application #:
09400767
Filing Dt:
09/22/1999
Title:
UNIFORM AXIAL LOADING GROUND GLASS JOINT CLAMP
54
Patent #:
Issue Dt:
01/09/2001
Application #:
09404889
Filing Dt:
09/24/1999
Title:
ENHANCED PULSE WIDTH MODULATOR
55
Patent #:
Issue Dt:
05/01/2001
Application #:
09405805
Filing Dt:
09/24/1999
Title:
METHOD FOR ENHANCING ANTIREFLECTIVE COATINGS USED IN PHOTOLIGHOGRAPHY OF ELECTRONIC DEVICES
56
Patent #:
Issue Dt:
01/17/2006
Application #:
09405901
Filing Dt:
09/24/1999
Title:
MACROBLOCK LEVEL INTRAREFRESH TECHNIQUE FOR ENCODED VIDEO
57
Patent #:
Issue Dt:
10/23/2001
Application #:
09406308
Filing Dt:
09/27/1999
Title:
METHOD FOR IMPROVING BALL JOINTS IN SEMICONDUCTOR PACKAGES
58
Patent #:
Issue Dt:
05/01/2001
Application #:
09407357
Filing Dt:
09/29/1999
Title:
VACUUM VALVE INTERFACE
59
Patent #:
Issue Dt:
09/18/2001
Application #:
09408016
Filing Dt:
09/29/1999
Title:
DIGITAL-TO-ANALOG CONVERTER USING WEIGHTS STORED IN A WEIGHT TABLE
60
Patent #:
Issue Dt:
11/26/2002
Application #:
09410187
Filing Dt:
09/30/1999
Title:
METHODS AND SYSTEMS FOR DYNAMIC SELECTION OF ERROR RECOVERY PROCEDUREDS IN A MANAGED DEVICE
61
Patent #:
Issue Dt:
05/07/2002
Application #:
09410405
Filing Dt:
10/01/1999
Title:
FLEXIBLE WIDTH CELL LAYOUT ARCHITECTURE
62
Patent #:
Issue Dt:
08/14/2001
Application #:
09411342
Filing Dt:
10/01/1999
Title:
DIGITALLY CALIBRATED BANDGAP REFERENCE
63
Patent #:
Issue Dt:
03/12/2002
Application #:
09413667
Filing Dt:
10/06/1999
Title:
SUBTRACTIVE OXIDATION METHOD OF FABRICATING A SHORT-LENGTH AND VERTICALLY-ORIENTED CHANNEL,DUAL-GATE,CMOS FET
64
Patent #:
Issue Dt:
07/30/2002
Application #:
09417255
Filing Dt:
10/12/1999
Title:
METHOD FOR ASSEMBLING TAPE BALL GRID ARRAYS
65
Patent #:
Issue Dt:
12/30/2003
Application #:
09420636
Filing Dt:
10/21/1999
Title:
ASYNCHRONOUS BIST FOR EMBEDDED MULTIPORT MEMORIES
66
Patent #:
Issue Dt:
05/04/2004
Application #:
09421844
Filing Dt:
10/20/1999
Title:
METHOD OF AUTOMATICALLY MIGRATING INFORMATION FROM A SOURCE TO AN ASSEMBLAGE OF STRUCTURED DATA CARRIERS AND ASSOCIATED SYSTEM AND ASSEMBLAGE OF DATA CARRIERS
67
Patent #:
Issue Dt:
06/03/2003
Application #:
09423596
Filing Dt:
12/01/1999
Title:
IMPROVEMENTS IN MICROPROCESSOR DEVELOPMENT SYSTEMS
68
Patent #:
Issue Dt:
06/05/2001
Application #:
09425493
Filing Dt:
10/22/1999
Title:
METHOD AND APPARATUS FOR PROVIDING PRECISE CIRCUIT DELAYS
69
Patent #:
Issue Dt:
07/23/2002
Application #:
09425552
Filing Dt:
10/22/1999
Title:
METHOD FOR FORMING INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT MATERIAL AND HAVING SILICON OXYNITRIDE CAPS OVER CLOSELY SPACED APART METAL LINES
70
Patent #:
Issue Dt:
12/17/2002
Application #:
09426034
Filing Dt:
10/25/1999
Title:
BUILT-IN SELF REPAIR CIRCUIT WITH PAUSE FOR DATA RETENTION COVERAGE
71
Patent #:
Issue Dt:
05/21/2002
Application #:
09426056
Filing Dt:
10/22/1999
Title:
LOW K DIELECTRIC COMPOSITE LAYER FOR INTERGRATED CIRCUIT STRUCTURE WHICH PROVIDES VOID-FREE LOW K DIELECTRIC MATERIAL BETWEEN METAL LINES WHILE MITIGATING VIA POISONING
72
Patent #:
Issue Dt:
06/29/2004
Application #:
09426061
Filing Dt:
10/22/1999
Title:
LOW DIELECTRIC CONSTANT SILICON OXIDE-BASED DIELECTRIC LAYER FOR INTEGRATED CIRCUIT STRUCTURES HAVING IMPROVED COMPATIBILITY WITH VIA FILLER MATERIALS, AND METHOD OF MAKING SAME
73
Patent #:
Issue Dt:
02/06/2001
Application #:
09427200
Filing Dt:
10/25/1999
Title:
SENSING ARCHITECTURE WITH DECREASED PRECHARGE VOLTAGE LEVELS
74
Patent #:
Issue Dt:
01/16/2001
Application #:
09427572
Filing Dt:
10/26/1999
Title:
PROCESS FOR FORMING METAL INTERCONNECT STACK FOR INTEGRATED CIRCUIT STRUCTURE
75
Patent #:
Issue Dt:
11/13/2001
Application #:
09428344
Filing Dt:
10/26/1999
Title:
PROCESS FOR REMOVING RESIST MASK OF INTEGRATED CIRCUIT STRUCTURE WHICH MITIGATES DAMAGE TO UNDERLYING LOW DIELECTRIC CONSTANT SILICON OXIDE DIELECTRIC LAYER
76
Patent #:
Issue Dt:
01/07/2003
Application #:
09428799
Filing Dt:
10/28/1999
Title:
FAST BUILT-IN SELF-REPAIR CIRCUIT
77
Patent #:
Issue Dt:
09/04/2001
Application #:
09431439
Filing Dt:
11/01/1999
Title:
INTEGRATED CIRCUIT DEVICE AND METHOD OF MAKING THE SAME USING CHEMICAL MECHANICAL POLISHING TO REMOVE MATERIAL IN TWO LAYERS FOLLOWING MASKING
78
Patent #:
Issue Dt:
01/21/2003
Application #:
09431606
Filing Dt:
11/01/1999
Title:
METHOD FOR OUT-OF-BAND NETWORK COMMUNICATION
79
Patent #:
Issue Dt:
07/18/2000
Application #:
09434340
Filing Dt:
11/05/1999
Title:
DEPLETION FREE POLYSILICON GATE ELECTRODES
80
Patent #:
Issue Dt:
04/29/2003
Application #:
09436535
Filing Dt:
11/09/1999
Title:
COMMUNICATIONS RECEIVER HAVING ADAPTIVE DYNAMIC RANGE
81
Patent #:
Issue Dt:
11/11/2003
Application #:
09437454
Filing Dt:
11/10/1999
Title:
METHOD AND APPARATUS FOR MULTI-CHANNEL DATA DELAY EQUALIZATION
82
Patent #:
Issue Dt:
05/06/2003
Application #:
09437464
Filing Dt:
11/10/1999
Title:
SYSTEM FOR MEASURING DELAY OF DIGITAL SIGNAL USING CLOCK GENERATOR AND DELAY UNIT WHEREIN A SET OF DIGITAL ELEMENTS OF CLOCK GENERATOR IDENTICAL TO A SET OF DIGITAL ELEMENTS OF DELAY UNIT
83
Patent #:
Issue Dt:
11/14/2000
Application #:
09438642
Filing Dt:
11/12/1999
Title:
PROCESS FOR FORMING LOW K SILICON OXIDE DIELECTRIC MATERIAL WHILE SUPPRESSING PRESSURE SPIKING AND INHIBITING INCREASE IN DIELECTRIC CONSTANT
84
Patent #:
Issue Dt:
06/24/2003
Application #:
09439126
Filing Dt:
11/12/1999
Title:
ROBUST ADAPTIVE EQUALIZER
85
Patent #:
Issue Dt:
08/14/2001
Application #:
09441250
Filing Dt:
11/16/1999
Title:
ADAPTIVE CANCELLATION OF TIME VARIANT DC OFFSET
86
Patent #:
Issue Dt:
05/06/2003
Application #:
09441543
Filing Dt:
11/16/1999
Title:
BACKSIDE LIQUID CRYSTAL ANALYSIS TECHNIQUE FOR FLIP-CHIP PACKAGES
87
Patent #:
Issue Dt:
01/30/2001
Application #:
09442078
Filing Dt:
11/16/1999
Title:
METHOD AND APPARATUS FOR USING ACROSS WAFER BACK PRESSURE DIFFERENTIALS TO INFLUENCE THE PERFORMANCE OF CHEMICAL MECHANICAL POLISHING
88
Patent #:
Issue Dt:
07/24/2001
Application #:
09444424
Filing Dt:
11/19/1999
Title:
PREDRIVER FOR HIGH FREQUENCY DATA TRANSCEIVER
89
Patent #:
Issue Dt:
09/18/2001
Application #:
09444975
Filing Dt:
11/22/1999
Publication #:
Pub Dt:
06/14/2001
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM
90
Patent #:
Issue Dt:
10/09/2001
Application #:
09448307
Filing Dt:
11/24/1999
Title:
INTEGRATED CIRCUIT I/O BUFFER WITH SERIES P-CHANNEL AND FLOATING WELL
91
Patent #:
Issue Dt:
01/30/2001
Application #:
09448677
Filing Dt:
11/24/1999
Title:
VOLTAGE TOLERANT OSCILLATOR INPUT CELL
92
Patent #:
Issue Dt:
09/17/2002
Application #:
09448793
Filing Dt:
11/23/1999
Title:
METHOD AND APPARATUS FOR SWITCHING CLOCKS PRESENTED TO SYNCHRONOUS SRAMS
93
Patent #:
Issue Dt:
04/01/2003
Application #:
09449324
Filing Dt:
11/24/1999
Title:
CAPACITANCE ESTIMATION
94
Patent #:
Issue Dt:
01/28/2003
Application #:
09449403
Filing Dt:
11/26/1999
Title:
MIRROR ADDRESSING IN A DSP
95
Patent #:
Issue Dt:
10/14/2003
Application #:
09452272
Filing Dt:
11/30/1999
Title:
METHOD FOR SYNCHRONIZING TIMING SIGNALS
96
Patent #:
Issue Dt:
10/02/2001
Application #:
09454257
Filing Dt:
12/02/1999
Title:
SLURRY FILLING A RECESS FORMED DURING SEMICONDUCTOR FABRICATION
97
Patent #:
Issue Dt:
04/04/2006
Application #:
09457021
Filing Dt:
12/07/1999
Title:
SPECULATIVE PACKET SELECTION FOR TRANSMISSION OF ISOCHRONOUS DATA
98
Patent #:
Issue Dt:
08/06/2002
Application #:
09457117
Filing Dt:
12/07/1999
Title:
METHOD AND APPARATUS FOR AUDIO AND VIDEO END-TO-END SYNCHRONIZATION
99
Patent #:
Issue Dt:
01/15/2002
Application #:
09459507
Filing Dt:
12/13/1999
Title:
METHOD AND APPARATUS FOR OPTIMIZING CROSSOVER VOLTAGE FOR DIFFERENTIAL PAIR SWITCHES IN A CURRENT-STEERING DIGITAL-TO-ANALOG CONVERTER OR THE LIKE
100
Patent #:
Issue Dt:
12/06/2005
Application #:
09460965
Filing Dt:
12/14/1999
Title:
METHOD AND APPARATUS FOR REDUCING BLOCK RELATED ARTIFACTS IN VIDEO
Assignor
1
Exec Dt:
08/14/2014
Assignee
1
1 YISHUN AVENUE 7
SINGAPORE, SINGAPORE 768923
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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