|
|
|
|
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Patent #:
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|
Issue Dt:
|
08/24/2004
|
Application #:
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09571691
|
Filing Dt:
|
05/15/2000
|
|
Title:
|
METHOD FOR INDEPENDENT DYNAMIC RANGE CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2002
|
Application #:
|
09573123
|
Filing Dt:
|
05/17/2000
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|
Title:
|
Capacitor with multiple-component dielectric and method of fabricating same
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
09573137
|
Filing Dt:
|
05/17/2000
|
|
Title:
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CAPACITOR WITH STOICHIOMETRICALLY ADJUSTED DIELECTRIC AND METHOD OF FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2002
|
Application #:
|
09573806
|
Filing Dt:
|
05/18/2000
|
|
Title:
|
SYSTEM AND METHOD FOR EFFICIENT LAYOUT OF FUNCTIONALLY EXTRANEOUS CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2003
|
Application #:
|
09574365
|
Filing Dt:
|
05/19/2000
|
|
Title:
|
PROCESS CONTROL SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
09574771
|
Filing Dt:
|
05/19/2000
|
|
Title:
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INTEGRATED CIRCUIT STRUCTURES HAVING LOW K POROUS ALUMINUM OXIDE DIELECTRIC MATERIAL SEPARATING ALUMINUM LINES, AND METHOD OF MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09574804
|
Filing Dt:
|
05/19/2000
|
|
Title:
|
METHOD OF MAKING IC INTERCONNECTION SYSTEM WITH LATERAL BARRIER LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2002
|
Application #:
|
09575585
|
Filing Dt:
|
05/22/2000
|
|
Publication #:
|
|
Pub Dt:
|
03/28/2002
| | | | |
|
Title:
|
MODIFIED PHASE INTERPOLATOR AND METHOD TO USE SAME IN HIGH-SPEED,LOW POWER APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2003
|
Application #:
|
09576575
|
Filing Dt:
|
05/22/2000
|
|
Title:
|
MASTER/SLAVE PROCESSOR MEMORY INTER ACCESSABILITY IN AN INTEGRATED EMBEDDED SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
09577912
|
Filing Dt:
|
05/24/2000
|
|
Title:
|
ANTI-CORROSION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09580106
|
Filing Dt:
|
05/30/2000
|
|
Title:
|
SYSTEM TO REDUCE PARTICULATE CONTAMINATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09580939
|
Filing Dt:
|
05/30/2000
|
|
Title:
|
METHOD FOR ENHANCING ANTI-REFLECTIVE COATINGS USED IN PHOTOLITHOGRAPHY OF ELECTRONIC DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2002
|
Application #:
|
09583434
|
Filing Dt:
|
05/31/2000
|
|
Title:
|
ENDPOINT DETECTION METHOD AND APPARATUS WHICH UTILIZE A CHELATING AGENT TO DETECT A POLISHING ENDPOINT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2002
|
Application #:
|
09587609
|
Filing Dt:
|
06/05/2000
|
|
Title:
|
Method and apparatus for enhancing uniformity during polishing of a semiconductor wafer
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2002
|
Application #:
|
09588101
|
Filing Dt:
|
06/01/2000
|
|
Title:
|
METHOD FOR COMPENSATING FOR INTERSYMBOL INTERFERENCE IN AN OPTICAL
DATA STORAGE CHANNEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
09589930
|
Filing Dt:
|
06/07/2000
|
|
Title:
|
SYSTEM AND METHOD FOR GENERATING REAL TIME ERRORS FOR DEVICE TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09590310
|
Filing Dt:
|
06/07/2000
|
|
Title:
|
LOW TEMPERATURE PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC-MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION AND GOOD GAP-FILLING CAPABILITIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
|
Application #:
|
09590917
|
Filing Dt:
|
06/09/2000
|
|
Title:
|
FREQUENCY TO DIGITAL CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09591108
|
Filing Dt:
|
06/09/2000
|
|
Title:
|
SEMICONDUCTOR DEVICE WITH A PAIR OF TRANSISTORS HAVING DUAL WORK FUNCTION GATE ELECTRODES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2002
|
Application #:
|
09591972
|
Filing Dt:
|
06/12/2000
|
|
Title:
|
TERMINATION IMPEDANCE TEIMMING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09592749
|
Filing Dt:
|
06/13/2000
|
|
Title:
|
ITERARIVE PREDICTION OF CIRCUIT DELAYS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
09594376
|
Filing Dt:
|
06/15/2000
|
|
Title:
|
METHOD AND APPARATUS FOR ALLOCATING FREE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2001
|
Application #:
|
09594478
|
Filing Dt:
|
06/15/2000
|
|
Title:
|
Insulated-gate field-effect transistors having different gate capacitances
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09596039
|
Filing Dt:
|
06/15/2000
|
|
Title:
|
METHOD FOR ATTACHING SOLDERBALLS BY SELECTIVELY OXIDIZING TRACES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2002
|
Application #:
|
09596568
|
Filing Dt:
|
06/19/2000
|
|
Title:
|
Load sensing, slew rate shaping, output signal pad cell driver circuit and method
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2002
|
Application #:
|
09596677
|
Filing Dt:
|
06/19/2000
|
|
Title:
|
Dynamically minimizing clock tree skew in an integrated circuit
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2002
|
Application #:
|
09596909
|
Filing Dt:
|
06/20/2000
|
|
Title:
|
ENGINEERING DATABASE FEEDBACK SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
09597433
|
Filing Dt:
|
06/20/2000
|
|
Title:
|
METHOD OF AUTOMATICALLY GENERATING SCHEMATIC AND WAVEFORM DIAGRAMS FOR RELEVANT LOGIC CELLS OF A CIRCUIT USING INPUT SIGNAL PREDICTORS AND TRANSITION TIMES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2001
|
Application #:
|
09602797
|
Filing Dt:
|
06/23/2000
|
|
Title:
|
SEMICONDUCTOR WAFER HAVING A LAYER-TO-LAYER ALIGNMENT MARK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09604865
|
Filing Dt:
|
06/28/2000
|
|
Title:
|
LASER FAULT CORRECTION OF SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09605380
|
Filing Dt:
|
06/27/2000
|
|
Title:
|
COMPOSITE LOW DIELECTRIC CONSTANT FILM FOR INTEGRATED CIRCUIT STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2002
|
Application #:
|
09605382
|
Filing Dt:
|
06/27/2000
|
|
Title:
|
Process to provide enhanced resistance to cracking and to further reduce the dielectric constant of a low dielectric constant dielectric film of an integrated circuit structure by implantation of the low dielectric constant dielectric film with hydrogen ions
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09607169
|
Filing Dt:
|
06/29/2000
|
|
Title:
|
APPARATUS AND METHOD FOR PLANARIZING THE SURFACE OF A SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09607177
|
Filing Dt:
|
06/29/2000
|
|
Title:
|
APPARATUS AND METHOD FOR LINEARLY PLANARIZING A SURFACE OF A SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
09607511
|
Filing Dt:
|
06/28/2000
|
|
Title:
|
Process for forming trenches and vias in layers of low dielectric constant carbon-doped silicon oxide dielectric material of an integrated circuit structure
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2002
|
Application #:
|
09607512
|
Filing Dt:
|
06/28/2000
|
|
Title:
|
PROCESS FOR FORMING TRENCHES AND VIAS IN LAYERS OF LOW DIELECTRIC CONSTANT CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL OF AN INTEGRATED CIRCUIT STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
09608556
|
Filing Dt:
|
06/30/2000
|
|
Title:
|
METHODS AND APPARATUS FOR SEAMLESS FIRMWARE UPDATE AND PROPAGATION IN A DUAL RAID CONTROLLER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09609527
|
Filing Dt:
|
07/03/2000
|
|
Title:
|
SYSTEM TO IMPROVE SER IMMUNITY AND PUNCHTHROUGH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2002
|
Application #:
|
09610592
|
Filing Dt:
|
10/30/2000
|
|
Title:
|
Pad driver
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
09611524
|
Filing Dt:
|
07/06/2000
|
|
Title:
|
BUILT-IN REDUNDANCY ANALYSIS FOR MEMORIES WITH ROW AND COLUMN REPAIR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09612054
|
Filing Dt:
|
07/07/2000
|
|
Title:
|
TRANSPORTABLE MEMORY APPARATUS AND ASSOCIATED METHODS OF INITIALIZING A COMPUTER SYSTEM HAVING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09612867
|
Filing Dt:
|
07/10/2000
|
|
Title:
|
METHOD OF PLANARIZING DIE SOLDER BALLS BY EMPLOYING A DIE'S WEIGHT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
09615890
|
Filing Dt:
|
07/14/2000
|
|
Title:
|
EFFICIENT ALGORITHM FOR BLIND DETECTION OF SIGNAL CONSTELLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2003
|
Application #:
|
09617550
|
Filing Dt:
|
07/17/2000
|
|
Title:
|
LOW VIA RESISTANCE SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09618211
|
Filing Dt:
|
07/10/2000
|
|
Title:
|
POLYMERIC DIELECTRIC LAYERS HAVING LOW DIELECTRIC CONSTANTS AND IMPROVED ADHESION TO METAL LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2002
|
Application #:
|
09624060
|
Filing Dt:
|
07/24/2000
|
|
Title:
|
METHOD AND APPARATUS FOR DESIGN VERIFICATION OF AN INTEGRATED CIRCUIT USING A SIMULATION TEST BENCH ENVIRONMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
09624816
|
Filing Dt:
|
07/25/2000
|
|
Title:
|
FRAMED PACKET BUS WITH IMPROVED FPB PROTOCOL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2002
|
Application #:
|
09624932
|
Filing Dt:
|
07/25/2000
|
|
Title:
|
HARDWARE REALIZED STATE MACHINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09625650
|
Filing Dt:
|
07/26/2000
|
|
Title:
|
HIGH SPEED, LOW-POWER INTER-CHIP TRANSMISSION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
09625802
|
Filing Dt:
|
07/26/2000
|
|
Title:
|
HIGH-SPEED, LOW-POWER CROSSBAR SWITCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
09626037
|
Filing Dt:
|
07/27/2000
|
|
Title:
|
METHOD AND APPARATUS FOR LOCATING CONSTANTS IN COMBINATIONAL CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09632901
|
Filing Dt:
|
08/04/2000
|
|
Title:
|
METHOD AND SYSTEM FOR PERIPHERAL ORDERING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2002
|
Application #:
|
09636498
|
Filing Dt:
|
08/11/2000
|
|
Title:
|
METHOD OF RAPID WAFER BUMPING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2003
|
Application #:
|
09637230
|
Filing Dt:
|
08/11/2000
|
|
Title:
|
INSTRUCTION TRANSLATION SYSTEM AND METHOD ACHIEVING SINGLE-CYCLE TRANSLATION OF VARIABLE-LENGTH MIPS16 INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
09639181
|
Filing Dt:
|
08/15/2000
|
|
Title:
|
METHOD FOR DERIVING A WORD ADDRESS AND BYTE OFFSET INFORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2001
|
Application #:
|
09639375
|
Filing Dt:
|
08/15/2000
|
|
Title:
|
Information storage systems utilizing media with optically-differentiated data sites
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
09639440
|
Filing Dt:
|
08/15/2000
|
|
Title:
|
STATISTICAL DECISION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2002
|
Application #:
|
09639449
|
Filing Dt:
|
08/15/2000
|
|
Title:
|
CLEANLINESS VERIFICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
09639534
|
Filing Dt:
|
08/16/2000
|
|
Title:
|
METHOD AND APPARATUS FOR CONTROLLING AND NORMALIZING THE DESIRED RATE OF A VISUAL PROCESS ACROSS DIFFERENT COMPUTING PLATFORMS AND ENVIRONMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
09641661
|
Filing Dt:
|
08/18/2000
|
|
Title:
|
TEST LIMITS BASED ON POSITION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2002
|
Application #:
|
09644187
|
Filing Dt:
|
08/22/2000
|
|
Title:
|
METHOD AND APPARATUS FOR MODULATION ENCODING DATA FOR STORAGE ON A MULTI-LEVEL OPTICAL RECORDING MEDIUM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
09645637
|
Filing Dt:
|
08/24/2000
|
|
Title:
|
METHOD AND ARCHITECTURE TO ASSOCIATE ENCLOSURE SERVICE DATA WITH PHYSICAL DEVICES ON A FIBRE CHANNEL LOOP WITH SOFT ADDRESSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
09645949
|
Filing Dt:
|
08/25/2000
|
|
Title:
|
RAID VOLUME FOR SEQUENTIAL USE THAT NEEDS NO REDUNDANCY PRE-INITIALIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2003
|
Application #:
|
09650164
|
Filing Dt:
|
08/29/2000
|
|
Title:
|
RESIDUAL OXYGEN REDUCTION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09651308
|
Filing Dt:
|
08/30/2000
|
|
Title:
|
THIN FORM FACTOR FLIP CHIP BALL GRID ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
09654689
|
Filing Dt:
|
09/05/2000
|
|
Title:
|
INTEGRATED CIRCUIT ISOLATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
09654952
|
Filing Dt:
|
09/05/2000
|
|
Title:
|
DATA-BURST-COUNT-BASE RECEIVE FIFO CONTROL DESIGN AND EARLY PACKET DISCARD FOR DMA OPTIMIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
09661465
|
Filing Dt:
|
09/13/2000
|
|
Title:
|
PROCESS FOR PLANARIZATION OF INTEGRATED CIRCUIT STRUCTURE WHICH INHIBITS CRACKING OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL ADJACENT UNDERLYING RAISED STRUCTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
09665924
|
Filing Dt:
|
09/20/2000
|
|
Title:
|
INCREMENTER/DECREMENTER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
09665988
|
Filing Dt:
|
09/20/2000
|
|
Title:
|
CONCENTRIC OPTICAL CABLE WITH FULL DUPLEX CONNECTORS
|
|
|
|
|
Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09666507
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Filing Dt:
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09/20/2000
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Title:
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EXHAUST FLOW CONTROL SYSTEM
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09666676
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Filing Dt:
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09/20/2000
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Title:
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METHOD AND APPARATUS FOR ACCOMMODATING IRREGULAR MEMORY WRITE WORD WIDTHS
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09669979
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Filing Dt:
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09/26/2000
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Title:
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Planarization system
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09670448
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Filing Dt:
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09/26/2000
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Title:
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SHALLOW JUNCTION FORMATION
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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09670975
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Filing Dt:
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09/27/2000
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Title:
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TEMPERATURE CONTROL SYSTEM
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Patent #:
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Issue Dt:
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12/17/2002
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Application #:
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09670997
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Filing Dt:
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09/27/2000
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Title:
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NONVOLATILE MEMORY IN CMOS PROCESS FLOW
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09670998
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Filing Dt:
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09/27/2000
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Title:
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PROCESS FOR PLANARIZING AN ISOLATION STRUCTURE IN A SUBSTRATE
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09675109
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Filing Dt:
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09/28/2000
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Title:
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REDUCED SOFT ERROR RATE (SER) CONSTRUCTION FOR INTEGRATED CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09676516
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Filing Dt:
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10/02/2000
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Title:
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DIGITAL-TO-ANALOG CONVERTER WITH HIGH DYNAMIC RANGE
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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09676909
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Filing Dt:
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10/02/2000
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Title:
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SERIAL DATA COMMUNICATION RECEIVER HAVING ADAPTIVE TERMINATION RESISTORS
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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09677269
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Filing Dt:
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10/02/2000
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Title:
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SERIAL DATA COMMUNICATION RECEIVER HAVING ADAPTIVE EQUALIZATION
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09677276
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Filing Dt:
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10/02/2000
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Title:
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METHOD AND APPARATUS FOR DETECING EQUIVALENT AND ANTI-EQUIVALENT PINS
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Patent #:
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Issue Dt:
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03/02/2004
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Application #:
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09677350
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Filing Dt:
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10/02/2000
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Title:
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SERIAL DATA COMMUNICATION RECEIVER HAVING ADAPTIVELY MINIMIZED CAPTURE LATCH OFFSET VOLTAGE
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09677623
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Filing Dt:
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10/03/2000
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Title:
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METHOD TO MAKE A PHASE-LOCKED LOOP'S JITTER TRANSFER FUNCTION INDEPENDENT OF DATA TRANSITION DENSITY
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Patent #:
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Issue Dt:
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10/21/2003
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Application #:
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09677940
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Filing Dt:
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10/02/2000
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Title:
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METHOD AND APPARATUS FOR QUICK SEARCH FOR IDENTITIES APPLICABLE TO SPECIFIED FORMULA
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09678201
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Filing Dt:
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10/01/2000
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Title:
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METHOD AND APPARATUS FOR FORMULAE AREA AND DELAY MINIMIZATION
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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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09678478
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Filing Dt:
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10/02/2000
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Title:
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METHOD AND APPARATUS FOR DYNAMIC BUFFER AND INVERTER TREE OPTIMIZATION
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09678479
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Filing Dt:
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10/02/2000
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Title:
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METHOD AND APPARATUS FOR LOCAL RESYNTHESIS OF LOGIC TREES WITH MULTIPLE COST FUNCTIONS
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09678481
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Filing Dt:
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10/02/2000
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Title:
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METHOD AND APPARATUS FOR OPTIMAL CRITICAL NETLIST AREA SELECTION
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09679209
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Filing Dt:
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10/04/2000
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Title:
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FAST FLEXIBLE SEARCH ENGINE FOR LONGEST PREFIX MATCH
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09679313
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Filing Dt:
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10/04/2000
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Title:
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FLEXIBLE SEARCH ENGINE HAVING SORTED BINARY SEARCH TREE FOR PERFECT MATCH
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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09680759
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Filing Dt:
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10/06/2000
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Title:
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BALANCED COEFFICIENT OF THERMAL EXPANSION FOR FLIP CHIP BALL GRID ARRAY
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09680893
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Filing Dt:
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10/06/2000
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Title:
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METHOD OF AUTOMATICALLY GENERATING SCHEMATIC AND WAVEFORM DIAGRAMS FOR ANALYSIS OF TIMING MARGINS AND SIGNAL SKEWS OF RELEVANT LOGIC CELLS USING INPUT SIGNAL PREDICTORS AND TRANSITION TIMES
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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09684770
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Filing Dt:
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10/06/2000
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Title:
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METHOD OF AUTOMATICALLY GENERATING SCHEMATIC AND WAVEFORM DIAGRAMS FOR ISOLATING FAULTS FROM MULTIPLE FAILING PATHS IN A CIRCUIT USING INPUT SIGNAL PREDICTORS AND TRANSITION TIMES
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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09684868
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Filing Dt:
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10/06/2000
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Title:
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DIAGNOSTIC ARCHITECTURE USING FPGA CORE IN SYSTEM ON A CHIP DESIGN
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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09685856
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Filing Dt:
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10/11/2000
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Title:
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MODULATION OF A PRIMARY DATA CHANNEL REFERENCE CLOCK TO FORM A SEPARATE DATA COMMUNICATION CHANNEL
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09685990
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Filing Dt:
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10/10/2000
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Title:
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METHOD AND APPARATUS FOR MINIMIZATION OF NET DELAY BY OPTIMAL BUFFER INSERTION
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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09686675
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Filing Dt:
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10/11/2000
|
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Title:
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VITERBI DECODER WITH ADAPTIVE TRACEBACK
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|
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Patent #:
|
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Issue Dt:
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12/30/2003
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Application #:
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09687263
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Filing Dt:
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10/12/2000
|
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Title:
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INSULATED BONDING WIRE FOR MICROELECTRONIC PACKAGING
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|
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09690047
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Filing Dt:
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10/16/2000
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Title:
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METHOD AND APPARATUS FOR WASHING DRUMS
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