|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2002
|
Application #:
|
09693014
|
Filing Dt:
|
10/20/2000
|
|
Title:
|
Off-grid metal layer utilization
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2003
|
Application #:
|
09694534
|
Filing Dt:
|
10/23/2000
|
|
Title:
|
METHOD THAT ALLOWS I/O REQUESTS TO RUN CONCURRENTLY WITH A ROLLBACK FROM A SNAPSHOT IN A DRIVE ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2002
|
Application #:
|
09695534
|
Filing Dt:
|
10/24/2000
|
|
Title:
|
DIRECT CURRENT DECHUCKING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09695540
|
Filing Dt:
|
10/24/2000
|
|
Title:
|
APPARATUS SUITABLE FOR MOUNTING AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2005
|
Application #:
|
09702202
|
Filing Dt:
|
10/30/2000
|
|
Title:
|
STORAGE DEVICE, SYSTEM AND METHOD WHICH CAN USE TAG BITS TO SYNCHRONIZE QUEUING BETWEEN TWO CLOCK DOMAINS, AND DETECT VALID ENTRIES WITHIN THE STORAGE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2001
|
Application #:
|
09702384
|
Filing Dt:
|
10/31/2000
|
|
Title:
|
Multiple bit line memory architecture
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
09703616
|
Filing Dt:
|
10/30/2000
|
|
Title:
|
PROCESS FOR CMP REMOVAL OF EXCESS TRENCH OR VIA FILLER METAL WHICH INHIBITS FORMATION OF CONCAVE REGIONS ON OXIDE SURFACE OF INTEGRATED CIRCUIT STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2002
|
Application #:
|
09703745
|
Filing Dt:
|
10/31/2000
|
|
Title:
|
PROCESS FOR PLANARIZATION OF METAL-FILLED TRENCHES OF INTEGRATED CIRCUIT STRUCTURES BY FORMING A LAYER OF PLANARIZABLE MATERIAL OVER THE METAL LAYER PRIOR TO PLANARIZING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2002
|
Application #:
|
09704164
|
Filing Dt:
|
10/31/2000
|
|
Title:
|
PROCESS FOR FORMING LOW K DIELECTRIC MATERIAL BETWEEN METAL LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09704200
|
Filing Dt:
|
10/31/2000
|
|
Title:
|
PROCESS FOR FORMING INTEGRATED CIRCUIT STRUCTURE WITH LOW DIELECTRIC CONSTANT MATERIAL BETWEEN CLOSELY SPACED APART METAL LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09704635
|
Filing Dt:
|
11/01/2000
|
|
Title:
|
PROCESS FOR INHIBITING CRACK FORMATION IN LOW DIELECTRIC CONSTANT DIELECTRIC FILMS OF INTEGRATED CIRCUIT STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09706286
|
Filing Dt:
|
11/03/2000
|
|
Title:
|
PROCESS MONITOR WITH STATISTICALLY SELECTED RING OSCILLATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
09710359
|
Filing Dt:
|
11/09/2000
|
|
Title:
|
METHOD TO TRANSLATE UDPS USING GATE PRIMITIVES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
09710830
|
Filing Dt:
|
11/13/2000
|
|
Title:
|
POLYPHASE RECEIVERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09711498
|
Filing Dt:
|
11/13/2000
|
|
Title:
|
METHOD AND APPARATUS FOR DIRECTLY BOOTING A RAID VOLUME AS THE PRIMARY OPERATING SYSTEM MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2002
|
Application #:
|
09711594
|
Filing Dt:
|
11/13/2000
|
|
Title:
|
SYSTEM AND METHOD FOR SYNCHRONIZING DATA MIRRORED BY STORAGE SUBSYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2003
|
Application #:
|
09712403
|
Filing Dt:
|
11/13/2000
|
|
Title:
|
METHOD AND APPARATUS FOR DIGITAL INTERFERENCE REJECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2002
|
Application #:
|
09713085
|
Filing Dt:
|
11/15/2000
|
|
Title:
|
Photovoltaic power source for portable electronic device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09713998
|
Filing Dt:
|
11/15/2000
|
|
Title:
|
DATA VALIDITY MEASURE FOR EFFICIENT IMPLEMENTATION OF FIRST-IN-FIRST-OUT MEMORIES FOR MULTI-PROCESSOR SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
09714000
|
Filing Dt:
|
11/15/2000
|
|
Title:
|
PROCESS FOR FORMING PLANARIZED ISOLATION TRENCH IN INTEGRATED CIRCUIT STRUCTURE ON SEMICONDUCTOR SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09714370
|
Filing Dt:
|
11/14/2000
|
|
Title:
|
METHOD AND APPARATUS FOR APPLICATION OF PROXIMITY CORRECTION WITH RELATIVE SEGMENTATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09715814
|
Filing Dt:
|
11/17/2000
|
|
Title:
|
STANDARD LIBRARY GENERATOR FOR CELL TIMING MODEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
09720149
|
Filing Dt:
|
12/21/2000
|
|
Title:
|
DEVICE CONFIGURED AS STAND-ALONE OR SLAVE BASED ON DETECTION OF POWER SUPPLY IN A POWERED DATA BUS SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
09721079
|
Filing Dt:
|
11/22/2000
|
|
Title:
|
PAUSING AN INSTRUCTION CACHE LINE FETCH IN RESPONSE TO A BRANCH INSTRUCTION AND RESUMING FROM WHERE PAUSED AFTER EVALUATING A BRANCH PREDICTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
09721319
|
Filing Dt:
|
11/22/2000
|
|
Title:
|
COMPACT DISC EMULATION IN A FLASH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2004
|
Application #:
|
09722892
|
Filing Dt:
|
11/27/2000
|
|
Title:
|
METHOD AND SYSTEM FOR EXPANDING VOLUME CAPACITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09723095
|
Filing Dt:
|
11/27/2000
|
|
Title:
|
SYSTEM AND METHOD FOR AUTOMATIC DYNAMIC EXPANSION OF A SNAPSHOT REPOSITORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
09723476
|
Filing Dt:
|
11/27/2000
|
|
Title:
|
LASER-BREAKABLE FUSE LINK WITH ALIGNMENT AND BREAK POINT POMOTION STRUCTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09723516
|
Filing Dt:
|
11/28/2000
|
|
Title:
|
SILICON NITRIDE AND SILICON DIOXIDE GATE INSULATOR TRANSISTORS AND METHOD OF FORMING SAME IN A HYBRID INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2003
|
Application #:
|
09724225
|
Filing Dt:
|
11/28/2000
|
|
Title:
|
METHOD OF REDUCING SILICON OXYNITRIDE GATE INSULATOR THICKNESS IN SOME TRANSISTORS OF A HYBIRD INTEGRATED CIRCUIT TO OBTAIN INCREASED DIFFERENTIAL IN GATE INSULATOR THICKNESS WITH OTHER TRANSISTORS OF THE HYBIRD CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09724444
|
Filing Dt:
|
11/28/2000
|
|
Title:
|
SILICON GERMANIUM CMOS CHANNEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09725543
|
Filing Dt:
|
11/29/2000
|
|
Title:
|
INTEGRATED EJTAG EXTERNAL BUS INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09725631
|
Filing Dt:
|
11/29/2000
|
|
Title:
|
DEVICE FREQUENCY MEASUREMENT SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2002
|
Application #:
|
09726107
|
Filing Dt:
|
11/29/2000
|
|
Title:
|
Programmable read only memory in CMOS process flow
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
09727043
|
Filing Dt:
|
11/30/2000
|
|
Title:
|
INTEGRATED CIRCUIT MEMORY HAVING COLUMN REDUNDANCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2002
|
Application #:
|
09727426
|
Filing Dt:
|
11/30/2000
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
PIN PLACEMENT METHOD FOR INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09727427
|
Filing Dt:
|
11/30/2000
|
|
Title:
|
NON-ISOTHERMAL ELECTROMIGRATION TESTING OF MICROELECTRONIC PACKAGING INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09729020
|
Filing Dt:
|
12/04/2000
|
|
Title:
|
INTEGRATED CIRCUIT MEMORY HAVING COLUMN REDUNDANCY WITH NO TIMING PENALITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
09729508
|
Filing Dt:
|
12/04/2000
|
|
Title:
|
PROCESSOR PIPELINE STALL BASED ON DATA REGISTER STATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2002
|
Application #:
|
09730704
|
Filing Dt:
|
12/06/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2001
| | | | |
|
Title:
|
CMP SLURRY RECYCLING APPARATUS AND METHOD FOR RECYCLING CMP SLURRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09731476
|
Filing Dt:
|
12/06/2000
|
|
Title:
|
DATA-CACHE DATA-PATH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
09731596
|
Filing Dt:
|
12/06/2000
|
|
Title:
|
METHOD FOR PROBING A SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
09732946
|
Filing Dt:
|
12/08/2000
|
|
Title:
|
DATA CACHE STORE BUFFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2001
|
Application #:
|
09734999
|
Filing Dt:
|
12/12/2000
|
|
Title:
|
System for programmable chip initialization
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
09735084
|
Filing Dt:
|
12/11/2000
|
|
Title:
|
ETCH RESISTANT SHALLOW TRENCH ISOLATION IN A SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2003
|
Application #:
|
09735085
|
Filing Dt:
|
12/11/2000
|
|
Title:
|
INTERCONNECTOR AND METHOD OF CONNECTING PROBES TO A DIE FOR FUNCTIONAL ANALYSIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2002
|
Application #:
|
09735233
|
Filing Dt:
|
12/11/2000
|
|
Title:
|
Designing memory for testability to support scan capability in an asic design
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2003
|
Application #:
|
09735255
|
Filing Dt:
|
12/12/2000
|
|
Title:
|
DELAY/LOAD ESTIMATION FOR USE IN INTEGRATED CIRCUIT DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
09735820
|
Filing Dt:
|
12/12/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/13/2002
| | | | |
|
Title:
|
TESTING OF HIGH SPEED DDR INTERFACE USING SINGLE CLOCK EDGE TRIGGERED TESTER DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
09735837
|
Filing Dt:
|
12/13/2000
|
|
Title:
|
CELL PIN EXTENSIONS FOR INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09736571
|
Filing Dt:
|
12/14/2000
|
|
Title:
|
NETLIST RESYNTHESIS PROGRAM USING STRUCTURE CO-FACTORING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
09736883
|
Filing Dt:
|
12/14/2000
|
|
Title:
|
INTERFACE FOR BUS INDEPENDENT CORE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
09736989
|
Filing Dt:
|
12/14/2000
|
|
Title:
|
ENCODER WITH VECTOR-CALCULATED DISPARITY LOGIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09737239
|
Filing Dt:
|
12/14/2000
|
|
Title:
|
NETLIST RESYNTHESIS PROGRAM BASED ON PHYSICAL DELAY CALCULATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2001
|
Application #:
|
09737504
|
Filing Dt:
|
12/15/2000
|
|
Publication #:
|
|
Pub Dt:
|
05/10/2001
| | | | |
|
Title:
|
Apparatus for enhancing image contrast using intensity filtration
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09737837
|
Filing Dt:
|
12/15/2000
|
|
Title:
|
SOURCE PULSED, DYNAMIC THRESHOLD COMPLEMENTARY METAL OXIDE SEMICONDUCTOR STATIC RAM CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
09738485
|
Filing Dt:
|
12/15/2000
|
|
Title:
|
CONFIGURABLE HARDWARE REGISTER STACK FOR CPU ARCHITECTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
09739956
|
Filing Dt:
|
12/19/2000
|
|
Title:
|
GENERATOR OF GRAPHICS IN COMPUTER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
09740604
|
Filing Dt:
|
12/19/2000
|
|
Title:
|
NOVEL WAY TO COMPENSATE THE EFFECT OF COUPLING BETWEEN BITLINES IN A MULTI-PORT MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2004
|
Application #:
|
09740907
|
Filing Dt:
|
12/19/2000
|
|
Title:
|
BUS MONITOR AND METHOD OF GATHERING BUS PHASE INFORMATION IN REAL-TIME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
09741568
|
Filing Dt:
|
12/19/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
|
Title:
|
CARBON-DOPED HARD MASK AND METHOD OF PASSIVATING STRUCTURES DURING SEMICONDUCTOR DEVICE FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09741667
|
Filing Dt:
|
12/19/2000
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2001
| | | | |
|
Title:
|
VIRTUAL-GROUND, SPLIT-GATE FLASH MEMORY CELL ARRANGEMENTS AND METHOD FOR PRODUCING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
09746796
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
MICROCODE BASED HARDWARE TRANSLATOR TO SUPPORT A MULTITUDE OF PROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09747638
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
INTEGRATED CIRCUIT FABRICATION DUAL PLASMA PROCESS WITH SEPARATE INTRODUCTION OF DIFFERENT GASES INTO GAS FLOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2006
|
Application #:
|
09748029
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
USE OF INTERNAL GENERAL PURPOSE REGISTERS OF A PROCESSOR AS A JAVA VIRTUAL MACHINE TOP OF STACK AND DYNAMIC ALLOCATION OF THE REGISTERS ACCORDING TO STACK STATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
09748030
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
USE OF LIMITED PROGRAM SPACE OF GENERAL PURPOSE PROCESSOR FOR UNLIMITED SEQUENCE OF TRANSLATED INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
09748324
|
Filing Dt:
|
12/26/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
METHODS AND SYSTEMS FOR INTELLIGENT I/O CONTROLLER WITH CHANNEL EXPANDABILITY VIA MASTER/SLAVE CONFIGURATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
09748641
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
INTERRUPT HANDLING MECHANISM IN TRANSLATOR FROM ONE INSTRUCTION SET TO ANOTHER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09750639
|
Filing Dt:
|
12/28/2000
|
|
Title:
|
ARRANGEMENT AND METHOD FOR POLISHING A SURFACE OF A SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
09751760
|
Filing Dt:
|
12/29/2000
|
|
Title:
|
METHOD AND APPARATUS FOR A MULTIPURPOSE CONFIGURABLE BUS INDEPENDENT SIMULATION BUS FUNCTIONAL MODEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2002
|
Application #:
|
09752357
|
Filing Dt:
|
12/29/2000
|
|
Title:
|
Dual threshold voltage sense amplifier
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09754429
|
Filing Dt:
|
01/04/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2001
| | | | |
|
Title:
|
Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical system
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
09756506
|
Filing Dt:
|
01/08/2001
|
|
Title:
|
FLIP CHIP TRACE LIBRARY GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
09758603
|
Filing Dt:
|
01/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
ROUTING TECHNIQUE TO ADJUST CLOCK SKEW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
09758909
|
Filing Dt:
|
01/10/2001
|
|
Title:
|
METHOD AND APPARATUS FOR MANAGING ACCOUNTS PAYABLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
09758972
|
Filing Dt:
|
01/10/2001
|
|
Title:
|
METHOD AND APPARATUS FOR MANAGING MULTIPLE PROJECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
09759921
|
Filing Dt:
|
01/12/2001
|
|
Title:
|
AUTOMATIC DEADLOCK PREVENTION VIA ARBITRATION SWITCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
|
Application #:
|
09761306
|
Filing Dt:
|
01/16/2001
|
|
Title:
|
DEMODULATING DIGITAL VIDEO BROADCAST SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
09765827
|
Filing Dt:
|
01/19/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2001
| | | | |
|
Title:
|
FLIP-CHIP INTEGRATED CIRCUIT ROUTING TO I/O DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
|
Application #:
|
09766104
|
Filing Dt:
|
01/19/2001
|
|
Title:
|
HEAT SINK WITH CHIP DIE EMC GROUND INTERCONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
09767585
|
Filing Dt:
|
01/22/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
BUILT-IN SELF-REPAIR WRAPPER METHODOLOGY, DESIGN FLOW AND DESIGN ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09771272
|
Filing Dt:
|
01/26/2001
|
|
Title:
|
ELMORE MODEL ENHANCEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
09773033
|
Filing Dt:
|
02/01/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DECODING M-PSK TURBO CODE USING NEW APPROXIMATION TECHNIQUE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
09774501
|
Filing Dt:
|
01/31/2001
|
|
Title:
|
PARALLEL/SERIAL SCSI WITH LEGACY SUPPORT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09776000
|
Filing Dt:
|
02/02/2001
|
|
Title:
|
STRUCTURE AND METHOD FOR WAFER COMPRISING DIELECTRIC AND SEMICONDUCTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
09777996
|
Filing Dt:
|
02/06/2001
|
|
Title:
|
CLUSTER TOOL REPORTING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
09779530
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/29/2001
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR IMPLEMENTING AN END-TO-END ERROR-CORRECTING PROTOCOL IN A VOICE BAND DATA RELAY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
09779564
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
|
Title:
|
METHOD FOR ELIMINATING MULTIPLE MODULATING AND DEMODULATING OF GROUP 3 FAX OVER PACKET AND LOW DATA RATE DIGITAL NETWORKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
09779749
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
FAX TRANMISSION OVER CONGESTED OR CORRUPTED WIDEBAND NETWORK, OR NARROWBAND NETWORK, USING ECM ERROR BLOCK FLOW CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09779750
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR OPTIMIZED FACSIMILE TRANSMISSION SPEED OVER A BANDWIDTH LIMITED NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2004
|
Application #:
|
09780061
|
Filing Dt:
|
02/09/2001
|
|
Title:
|
SIMPLE MECHANISM FOR GUARANTEEING IN ORDER READ DATA RETURN ON A SPLIT TRANSACTION BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2002
|
Application #:
|
09782806
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
LOW-POWER DATA SERIALIZER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2002
|
Application #:
|
09782842
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
RESISTIVELY-LOADED CURRENT-MODE OUTPUT BUFFER WITH SLEW RATE CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2002
|
Application #:
|
09783231
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
DATA SERIALIZER WITH SLEW-RATE CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09783653
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
SINGLE CHANNEL FOUR TRANSISTOR SRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2002
|
Application #:
|
09783690
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
REDUCED-SWING DIFFERENTIAL OUTPUT BUFFER WITH IDLE FUNCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09784548
|
Filing Dt:
|
02/15/2001
|
|
Title:
|
SIMPLE AND SCALABLE RAID XOR ASSIST LOGIC WITH OVERLAPPED OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
09784587
|
Filing Dt:
|
02/15/2001
|
|
Title:
|
AMBA BUS OFF-CHIP BRIDGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
09785845
|
Filing Dt:
|
02/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
BUS BANDWIDTH CONSUMPTION PROFILER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09788257
|
Filing Dt:
|
02/15/2001
|
|
Title:
|
BALANCED CLOCK PLACEMENT FOR INTEGRATED CIRCUITS CONTAINING MEGACELLS
|
|
