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Reel/Frame:	035390/0388			Pages:	247
		Recorded:	04/03/2015
Attorney Dkt #:	040981-0072
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 5804
Page 21 of 59
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Patent #:	6658628	Issue Dt:	12/02/2003	Application #:	10025123	Filing Dt:	12/19/2001
Title:	DEVELOPMENT OF HARDMAC TECHNOLOGY FILES (CLF, TECH AND SYNLIB) FOR RTL AND FULL GATE LEVEL NETLISTS

Patent #:	6713386	Issue Dt:	03/30/2004	Application #:	10025304	Filing Dt:	12/19/2001
Title:	METHOD OF PREVENTING RESIST POISONING IN DUAL DAMASCENE STRUCTURES

Patent #:	6680629	Issue Dt:	01/20/2004	Application #:	10026154	Filing Dt:	12/18/2001
Publication #:	US20030112039	Pub Dt:	06/19/2003
Title:	5 V TOLERANT HOT CARRIER INJECTION (HCI) PROTECTION CIRCUIT

Patent #:	6587322	Issue Dt:	07/01/2003	Application #:	10026186	Filing Dt:	12/20/2001
Publication #:	US20020055219	Pub Dt:	05/09/2002
Title:	SWAPPED DRAIN STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION

Patent #:	6920578	Issue Dt:	07/19/2005	Application #:	10026305	Filing Dt:	12/18/2001
Title:	METHOD AND APPARATUS FOR TRANSFERRING DATA BETWEEN A SLOWER CLOCK DOMAIN AND A FASTER CLOCK DOMAIN IN WHICH ONE OF THE CLOCK DOMAINS IS BANDWIDTH LIMITED

Patent #:	6730588	Issue Dt:	05/04/2004	Application #:	10026407	Filing Dt:	12/20/2001
Title:	METHOD OF FORMING SIGE GATE ELECTRODE

Patent #:	6774730	Issue Dt:	08/10/2004	Application #:	10027182	Filing Dt:	12/20/2001
Publication #:	US20020075082	Pub Dt:	06/20/2002
Title:	POWER RAILS GLITCH NOISE INSENSITIVE CHARGE PUMP

Patent #:	6941494	Issue Dt:	09/06/2005	Application #:	10027311	Filing Dt:	12/21/2001
Title:	BUILT-IN TEST FOR MULTIPLE MEMORY CIRCUITS

Patent #:	6845495	Issue Dt:	01/18/2005	Application #:	10027642	Filing Dt:	12/20/2001
Publication #:	US20030121017	Pub Dt:	06/26/2003
Title:	MULTIDIRECTIONAL ROUTER

Patent #:	7093041	Issue Dt:	08/15/2006	Application #:	10027720	Filing Dt:	12/20/2001
Publication #:	US20030120847	Pub Dt:	06/26/2003
Title:	DUAL PURPOSE PCI-X DDR CONFIGURABLE TERMINATOR/DRIVER

Patent #:	6917998	Issue Dt:	07/12/2005	Application #:	10027936	Filing Dt:	12/21/2001
Title:	REUSABLE COMPLEX MULTI-BUS SYSTEM HARDWARE PROTOTYPE SYSTEM

Patent #:	6577165	Issue Dt:	06/10/2003	Application #:	10027960	Filing Dt:	10/25/2001
Title:	UNI-SIZED CLOCK BUFFERS

Patent #:	6980481	Issue Dt:	12/27/2005	Application #:	10028582	Filing Dt:	12/20/2001
Title:	ADDRESS TRANSITION DETECT CONTROL CIRCUIT FOR SELF TIMED ASYNCHRONOUS MEMORIES

Patent #:	6564313	Issue Dt:	05/13/2003	Application #:	10028836	Filing Dt:	12/20/2001
Title:	SYSTEM AND METHOD FOR EFFICIENT INSTRUCTION PREFETCHING BASED ON LOOP PERIODS

Patent #:	6760803	Issue Dt:	07/06/2004	Application #:	10032188	Filing Dt:	12/21/2001
Title:	ALIGNING AND OFFSETTING BUS SIGNALS

Patent #:	6817941	Issue Dt:	11/16/2004	Application #:	10033090	Filing Dt:	10/25/2001
Title:	UNIFORM AIRFLOW DIFFUSER

Patent #:	6429721	Issue Dt:	08/06/2002	Application #:	10033158	Filing Dt:	10/25/2001
Title:	MIXER WITH STEPPED GAIN AND CONSTANT COMMON MODE DC OUTPUT BIAS VOLTAGE

Patent #:	6511925	Issue Dt:	01/28/2003	Application #:	10033164	Filing Dt:	10/19/2001
Title:	PROCESS FOR FORMING HIGH DIELECTRIC CONSTANT GATE DIELECTRIC FOR INTEGRATED CIRCUIT STRUCTURE

Patent #:	6566951	Issue Dt:	05/20/2003	Application #:	10033354	Filing Dt:	10/25/2001
Title:	LOW VOLTAGE VARIABLE GAIN AMPLIFIER HAVING CONSTANT COMMON MODE DC OUTPUT

Patent #:	6691288	Issue Dt:	02/10/2004	Application #:	10034535	Filing Dt:	12/27/2001
Title:	METHOD TO DEBUG IKOS METHOD

Patent #:	6889366	Issue Dt:	05/03/2005	Application #:	10034839	Filing Dt:	12/27/2001
Publication #:	US20030126562	Pub Dt:	07/03/2003
Title:	SYSTEM AND METHOD FOR COEVOLUTIONARY CIRCUIT DESIGN

Patent #:	6825546	Issue Dt:	11/30/2004	Application #:	10035346	Filing Dt:	12/28/2001
Title:	CMOS VARACTOR WITH CONSTANT DC/DV CHARACTERISTIC

Patent #:	6743474	Issue Dt:	06/01/2004	Application #:	10035501	Filing Dt:	10/25/2001
Title:	METHOD FOR GROWING THIN FILMS

Patent #:	6727177	Issue Dt:	04/27/2004	Application #:	10035704	Filing Dt:	10/18/2001
Title:	MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION

Patent #:	6639312	Issue Dt:	10/28/2003	Application #:	10036291	Filing Dt:	11/07/2001
Publication #:	US20030087108	Pub Dt:	05/08/2003
Title:	DUMMY WAFERS AND METHODS FOR MAKING THE SAME

Patent #:	6935933	Issue Dt:	08/30/2005	Application #:	10036621	Filing Dt:	12/21/2001
Title:	VISCOUS ELECTROPOLISHING SYSTEM

Patent #:	6715024	Issue Dt:	03/30/2004	Application #:	10036695	Filing Dt:	12/31/2001
Title:	MULTI-BANK MEMORY DEVICE HAVING A 1:1 STATE MACHINE-TO-MEMORY BANK RATIO

Patent #:	6807593	Issue Dt:	10/19/2004	Application #:	10036820	Filing Dt:	11/01/2001
Title:	ENHANCED BUS ARCHITECTURE FOR POSTED READ OPERATION BETWEEN MASTERS AND SLAVES

Patent #:	6868459	Issue Dt:	03/15/2005	Application #:	10037722	Filing Dt:	10/19/2001
Title:	METHODS AND STRUCTURE FOR TRANSFER OF BURST TRANSACTIONS HAVING UNSPECIFIED LENGTH

Patent #:	6587390	Issue Dt:	07/01/2003	Application #:	10039083	Filing Dt:	12/31/2001
Title:	MEMORY CONTROLLER FOR HANDLING DATA TRANSFERS WHICH EXCEED THE PAGE WIDTH OF DDR SDRAM DEVICES

Patent #:	6841308	Issue Dt:	01/11/2005	Application #:	10039508	Filing Dt:	11/09/2001
Title:	ADJUSTABLE TRANSMISSION PHASE SHIFT MASK

Patent #:	7114135	Issue Dt:	09/26/2006	Application #:	10044155	Filing Dt:	01/11/2002
Title:	ROUTING OF TEST SIGNALS OF INTEGRATED CIRCUITS

Patent #:	6649537	Issue Dt:	11/18/2003	Application #:	10044215	Filing Dt:	11/19/2001
Title:	INTERMITTENT PULSED OXIDATION PROCESS

Patent #:	6501695	Issue Dt:	12/31/2002	Application #:	10044339	Filing Dt:	01/11/2002
Title:	TECHNIQUE FOR THE REDUCTION OF MEMORY ACCESS TIME VARIATION

Patent #:	7115991	Issue Dt:	10/03/2006	Application #:	10044864	Filing Dt:	10/22/2001
Title:	METHOD FOR CREATING BARRIERS FOR COPPER DIFFUSION

Patent #:	6647538	Issue Dt:	11/11/2003	Application #:	10045473	Filing Dt:	11/08/2001
Title:	APPARATUS AND METHOD FOR SIGNAL SKEW CHARACTERIZATION UTILIZING CLOCK DIVISION

Patent #:	7018878	Issue Dt:	03/28/2006	Application #:	10045653	Filing Dt:	11/07/2001
Publication #:	US20030087484	Pub Dt:	05/08/2003
Title:	METAL STRUCTURES FOR INTEGRATED CIRCUITS AND METHODS FOR MAKING THE SAME

Patent #:	6845412	Issue Dt:	01/18/2005	Application #:	10045889	Filing Dt:	11/07/2001
Title:	METHOD AND SYSTEM FOR A HOST PROCESSOR TO BROADCAST DATA TO INSTRUCTION OR DATA MEMORIES OF SEVERAL PROCESSORS IN A MULTI-PROCESSOR INTEGRATED CIRCUIT

Patent #:	7007111	Issue Dt:	02/28/2006	Application #:	10047546	Filing Dt:	01/16/2002
Publication #:	US20020188885	Pub Dt:	12/12/2002
Title:	DMA PORT SHARING BANDWIDTH BALANCING LOGIC

Patent #:	6498758	Issue Dt:	12/24/2002	Application #:	10047547	Filing Dt:	01/16/2002
Title:	TWISTED BITLINES TO REDUCE COUPLING EFECTS (DUAL PORT MEMORIES)

Patent #:	6653859	Issue Dt:	11/25/2003	Application #:	10047615	Filing Dt:	01/16/2002
Publication #:	US20020186042	Pub Dt:	12/12/2002
Title:	HETEROGENEOUS INTEGRATED CIRCUIT WITH RECONFIGURABLE LOGIC CORES

Patent #:	6667636	Issue Dt:	12/23/2003	Application #:	10047616	Filing Dt:	01/16/2002
Publication #:	US20020186043	Pub Dt:	12/12/2002
Title:	DSP INTEGRATED WITH PROGRAMMABLE LOGIC BASED ACCELERATORS

Patent #:	6603356	Issue Dt:	08/05/2003	Application #:	10047960	Filing Dt:	01/14/2002
Title:	METHOD AND CIRCUIT FOR CONTROLLING QUIESCENT CURRENT OF AMPLIFIER

Patent #:	7158772	Issue Dt:	01/02/2007	Application #:	10051445	Filing Dt:	01/18/2002
Title:	FILTER FOR BROADCAST RECEIVER TUNER

Patent #:	6807186	Issue Dt:	10/19/2004	Application #:	10052233	Filing Dt:	01/17/2002
Publication #:	US20020181482	Pub Dt:	12/05/2002
Title:	ARCHITECTURES FOR A SINGLE-STAGE GROOMING SWITCH

Patent #:	6566922	Issue Dt:	05/20/2003	Application #:	10052929	Filing Dt:	10/29/2001
Title:	ZERO PHASE AND FREQUENCY RESTART PLL

Patent #:	6673498	Issue Dt:	01/06/2004	Application #:	10053537	Filing Dt:	11/02/2001
Title:	METHOD FOR RETICLE FORMATION UTILIZING METAL VAPORIZATION

Patent #:	7302160	Issue Dt:	11/27/2007	Application #:	10054286	Filing Dt:	01/22/2002
Title:	AUDIO/VIDEO RECORDER WITH AUTOMATIC COMMERCIAL ADVANCEMENT PREVENTION

Patent #:	6710990	Issue Dt:	03/23/2004	Application #:	10055082	Filing Dt:	01/22/2002
Publication #:	US20030137789	Pub Dt:	07/24/2003
Title:	LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE

Patent #:	6605954	Issue Dt:	08/12/2003	Application #:	10055812	Filing Dt:	01/23/2002
Title:	REDUCING PROBE CARD SUBSTRATE WARPAGE

Patent #:	7369743	Issue Dt:	05/06/2008	Application #:	10056166	Filing Dt:	01/24/2002
Publication #:	US20030140350	Pub Dt:	07/24/2003
Title:	ENHANCED PERSONAL VIDEO RECORDER

Patent #:	7069363	Issue Dt:	06/27/2006	Application #:	10056631	Filing Dt:	01/25/2002
Title:	ON-CHIP BUS

Patent #:	7117323	Issue Dt:	10/03/2006	Application #:	10057359	Filing Dt:	10/23/2001
Title:	CYCLIC REDUNDANCY CHECKING FOR MANAGING THE COHERENCY OF MIRRORED STORAGE VOLUMES

Patent #:	6842873	Issue Dt:	01/11/2005	Application #:	10057774	Filing Dt:	01/22/2002
Title:	ADVANCED FORWARD ERROR CORRECTION

Patent #:	6772289	Issue Dt:	08/03/2004	Application #:	10057863	Filing Dt:	01/24/2002
Title:	METHODS AND APPARATUS FOR MANAGING CACHED CRC VALUES IN A STORAGE CONTROLLER

Patent #:	6757881	Issue Dt:	06/29/2004	Application #:	10059480	Filing Dt:	01/29/2002
Publication #:	US20030145302	Pub Dt:	07/31/2003
Title:	POWER ROUTING WITH OBSTACLES

Patent #:	6710851	Issue Dt:	03/23/2004	Application #:	10060002	Filing Dt:	01/29/2002
Title:	MULTI PATTERN RETICLE

Patent #:	6871316	Issue Dt:	03/22/2005	Application #:	10060526	Filing Dt:	01/30/2002
Title:	DELAY REDUCTION OF HARDWARE IMPLEMENTATION OF THE MAXIMUM A POSTERIORI (MAP) METHOD

Patent #:	6613639	Issue Dt:	09/02/2003	Application #:	10060867	Filing Dt:	01/30/2002
Title:	FORMING A SEMICONDUCTOR ON IMPLANTED INSULATOR

Patent #:	6617181	Issue Dt:	09/09/2003	Application #:	10061518	Filing Dt:	02/01/2002
Title:	FLIP CHIP TESTING

Patent #:	6752916	Issue Dt:	06/22/2004	Application #:	10061519	Filing Dt:	02/01/2002
Title:	ELECTROCHEMICAL PLANARIZATION END POINT DETECTION

Patent #:	6779168	Issue Dt:	08/17/2004	Application #:	10061660	Filing Dt:	02/01/2002
Publication #:	US20030149833	Pub Dt:	08/07/2003
Title:	MAGNETORESISTIVE MEMORY FOR A COMPLEX PROGRAMMABLE LOGIC DEVICE

Patent #:	7315976	Issue Dt:	01/01/2008	Application #:	10066270	Filing Dt:	01/31/2002
Publication #:	US20030145270	Pub Dt:	07/31/2003
Title:	METHOD FOR USING CRC AS METADATA TO PROTECT AGAINST DRIVE ANOMALY ERRORS IN A STORAGE ARRAY

Patent #:	6621134	Issue Dt:	09/16/2003	Application #:	10067299	Filing Dt:	02/07/2002
Title:	VACUUM SEALED RF/MICROWAVE MICRORESONATOR

Patent #:	6771113	Issue Dt:	08/03/2004	Application #:	10068768	Filing Dt:	02/06/2002
Title:	FIVE VOLT TOLERANT AND FAIL SAFE INPUT SCHEME USING SOURCE FOLLOWER CONFIGURATION

Patent #:	7039064	Issue Dt:	05/02/2006	Application #:	10071718	Filing Dt:	02/08/2002
Title:	PROGRAMMABLE TRANSMISSION AND RECEPTION OF OUT OF BAND SIGNALS FOR SERIAL ATA

Patent #:	6701503	Issue Dt:	03/02/2004	Application #:	10072008	Filing Dt:	02/07/2002
Publication #:	US20030149952	Pub Dt:	08/07/2003
Title:	OVERLAP REMOVER MANAGER

Patent #:	6760814	Issue Dt:	07/06/2004	Application #:	10076681	Filing Dt:	02/14/2002
Publication #:	US20030115417	Pub Dt:	06/19/2003
Title:	METHODS AND APPARATUS FOR LOADING CRC VALUES INTO A CRC CACHE IN A STORAGE CONTROLLER

Patent #:	7043718	Issue Dt:	05/09/2006	Application #:	10077066	Filing Dt:	02/15/2002
Title:	SYSTEM REAL-TIME ANALYSIS TOOL

Patent #:	6611214	Issue Dt:	08/26/2003	Application #:	10077351	Filing Dt:	02/15/2002
Title:	ROM CODE COMPRESSION

Patent #:	6801972	Issue Dt:	10/05/2004	Application #:	10077453	Filing Dt:	02/15/2002
Publication #:	US20030158984	Pub Dt:	08/21/2003
Title:	INTERFACE SHUTDOWN MODE FOR A DATA BUS SLAVE

Patent #:	6638776	Issue Dt:	10/28/2003	Application #:	10077497	Filing Dt:	02/15/2002
Publication #:	US20030157735	Pub Dt:	08/21/2003
Title:	THERMAL CHARACTERIZATION COMPENSATION

Patent #:	6667912	Issue Dt:	12/23/2003	Application #:	10078313	Filing Dt:	02/18/2002
Title:	TIMING SCHEME FOR SEMICONDUCTOR MEMORY DEVICES

Patent #:	7113554	Issue Dt:	09/26/2006	Application #:	10078955	Filing Dt:	02/19/2002
Publication #:	US20020136332	Pub Dt:	09/26/2002
Title:	TURBO DECODER SYSTEM COMPRISING PARALLEL DECODERS

Patent #:	6999132	Issue Dt:	02/14/2006	Application #:	10079026	Filing Dt:	02/19/2002
Title:	RF/IF DIGITAL DEMODULATION OF VIDEO AND AUDIO

Patent #:	7167469	Issue Dt:	01/23/2007	Application #:	10080219	Filing Dt:	02/21/2002
Publication #:	US20020118673	Pub Dt:	08/29/2002
Title:	METHOD FOR ELIMINATING MULTIPLE MODULATION AND DEMODULATION OF VOICE BAND DATA COMMUNICATION OVER PACKET AND LOW DATA RATE DIGITAL NETWORKS

Patent #:	6674176	Issue Dt:	01/06/2004	Application #:	10082027	Filing Dt:	02/20/2002
Publication #:	US20030155633	Pub Dt:	08/21/2003
Title:	WIRE BOND PACKAGE WITH CORE RING FORMED OVER I/O CELLS

Patent #:	7035844	Issue Dt:	04/25/2006	Application #:	10082687	Filing Dt:	02/25/2002
Publication #:	US20030163442	Pub Dt:	08/28/2003
Title:	FFS SEARCH AND EDIT PIPLINE SEPARATION

Patent #:	7000163	Issue Dt:	02/14/2006	Application #:	10082737	Filing Dt:	02/25/2002
Title:	OPTIMIZED BUFFERING FOR JTAG BOUNDARY SCAN NETS

Patent #:	6988149	Issue Dt:	01/17/2006	Application #:	10083214	Filing Dt:	02/26/2002
Publication #:	US20030163592	Pub Dt:	08/28/2003
Title:	INTEGRATED TARGET MASKING

Patent #:	6757877	Issue Dt:	06/29/2004	Application #:	10083411	Filing Dt:	02/27/2002
Publication #:	US20030163797	Pub Dt:	08/28/2003
Title:	SYSTEM AND METHOD FOR IDENTIFYING AND ELIMINATING BOTTLENECKS IN INTEGRATED CIRCUIT DESIGNS

Patent #:	6725306	Issue Dt:	04/20/2004	Application #:	10083833	Filing Dt:	02/27/2002
Publication #:	US20030163613	Pub Dt:	08/28/2003
Title:	DEBUG MODE FOR A DATA BUS

Patent #:	6813483	Issue Dt:	11/02/2004	Application #:	10085662	Filing Dt:	02/27/2002
Title:	METHOD AND SYSTEM FOR IMPROVING NOISE MARGIN IN A RECEIVER CIRCUIT

Patent #:	7131050	Issue Dt:	10/31/2006	Application #:	10085929	Filing Dt:	02/28/2002
Publication #:	US20030163777	Pub Dt:	08/28/2003
Title:	OPTIMIZED READ PERFORMANCE METHOD USING METADATA TO PROTECT AGAINST DRIVE ANOMALY ERRORS IN A STORAGE ARRAY

Patent #:	6662349	Issue Dt:	12/09/2003	Application #:	10086232	Filing Dt:	02/27/2002
Publication #:	US20030163795	Pub Dt:	08/28/2003
Title:	METHOD OF REPEATER INSERTION FOR HIERARCHICAL INTEGRATED CIRCUIT DESIGN

Patent #:	7174401	Issue Dt:	02/06/2007	Application #:	10086786	Filing Dt:	02/28/2002
Publication #:	US20040267992	Pub Dt:	12/30/2004
Title:	LOOK AHEAD SPLIT RELEASE FOR A DATA BUS

Patent #:	6615401	Issue Dt:	09/02/2003	Application #:	10092195	Filing Dt:	03/06/2002
Title:	BLOCKED NET BUFFER INSERTION

Patent #:	6654226	Issue Dt:	11/25/2003	Application #:	10094520	Filing Dt:	03/08/2002
Publication #:	US20030170973	Pub Dt:	09/11/2003
Title:	THERMAL LOW K DIELECTRICS

Patent #:	6623992	Issue Dt:	09/23/2003	Application #:	10094549	Filing Dt:	03/08/2002
Title:	SYSTEM AND METHOD FOR DETERMINING A SUBTHRESHOLD LEAKAGE TEST LIMIT OF AN INTEGRATED CIRCUIT

Patent #:	6813758	Issue Dt:	11/02/2004	Application #:	10097419	Filing Dt:	03/14/2002
Publication #:	US20030177451	Pub Dt:	09/18/2003
Title:	OPTICAL PROXIMITY CORRECTION DRIVEN HIERARCHY

Patent #:	6800940	Issue Dt:	10/05/2004	Application #:	10099641	Filing Dt:	03/15/2002
Publication #:	US20020123243	Pub Dt:	09/05/2002
Title:	LOW K DIELECTRIC COMPOSITE LAYER FOR INTEGRATED CIRCUIT STRUCTURE WHICH PROVIDES VOID-FREE LOW K DIELECTRIC MATERIAL BETWEEN METAL LINES WHILE MITIGATING VIA POISONING

Patent #:	7136966	Issue Dt:	11/14/2006	Application #:	10100150	Filing Dt:	03/18/2002
Publication #:	US20030177305	Pub Dt:	09/18/2003
Title:	METHOD AND APPARATUS FOR USING A SOLID STATE DISK DEVICE AS A STORAGE CONTROLLER CACHE

Patent #:	6574525	Issue Dt:	06/03/2003	Application #:	10105483	Filing Dt:	03/25/2002
Title:	IN SITU MEASUREMENT

Patent #:	6904586	Issue Dt:	06/07/2005	Application #:	10105579	Filing Dt:	03/25/2002
Title:	INTEGRATED CIRCUIT HAVING INTEGRATED PROGRAMMABLE GATE ARRAY AND FIELD PROGRAMMABLE GATE ARRAY, AND METHOD OF OPERATING THE SAME

Patent #:	6733829	Issue Dt:	05/11/2004	Application #:	10106128	Filing Dt:	03/19/2002
Publication #:	US20030177981	Pub Dt:	09/25/2003
Title:	ANTI-BINDING DEPOSITION RING

Patent #:	6934597	Issue Dt:	08/23/2005	Application #:	10106432	Filing Dt:	03/26/2002
Title:	INTEGRATED CIRCUIT HAVING INTEGRATED PROGRAMMABLE GATE ARRAY AND METHOD OF OPERATING THE SAME

Patent #:	6586969	Issue Dt:	07/01/2003	Application #:	10107496	Filing Dt:	03/25/2002
Title:	METHOD AND SYSTEM FOR SYNCHRONOUSLY INITIALIZING DIGITAL LOGIC CIRCUITS

Patent #:	6842750	Issue Dt:	01/11/2005	Application #:	10108286	Filing Dt:	03/27/2002
Publication #:	US20030187815	Pub Dt:	10/02/2003
Title:	SYMBOLIC SIMULATION DRIVEN NETLIST SIMPLIFICATION

Patent #:	6701493	Issue Dt:	03/02/2004	Application #:	10109113	Filing Dt:	03/27/2002
Publication #:	US20030188274	Pub Dt:	10/02/2003
Title:	FLOOR PLAN TESTER FOR INTEGRATED CIRCUIT DESIGN

100

Patent #:	7007036	Issue Dt:	02/28/2006	Application #:	10109285	Filing Dt:	03/28/2002
Publication #:	US20030187818	Pub Dt:	10/02/2003
Title:	METHOD AND APPARATUS FOR EMBEDDING CONFIGURATION DATA

Assignor

LSI CORPORATION

Exec Dt:

08/14/2014

Assignee

AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

1 YISHUN AVENUE 7

SINGAPORE, SINGAPORE 768923

Correspondence name and address
	LATHAM & WATKINS LLP
	650 TOWN CENTER DRIVE, SUITE 2000
	COSTA MESA, CA 92626

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