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Reel/Frame:	035390/0388			Pages:	247
		Recorded:	04/03/2015
Attorney Dkt #:	040981-0072
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 5804
Page 23 of 59
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Patent #:	6741096	Issue Dt:	05/25/2004	Application #:	10188880	Filing Dt:	07/02/2002
Publication #:	US20040004495	Pub Dt:	01/08/2004
Title:	STRUCTURE AND METHODS FOR MEASUREMENT OF ARBITRATION PERFORMANCE

Patent #:	6892289	Issue Dt:	05/10/2005	Application #:	10188882	Filing Dt:	07/02/2002
Publication #:	US20040006666	Pub Dt:	01/08/2004
Title:	METHODS AND STRUCTURE FOR USING A MEMORY MODEL FOR EFFICIENT ARBITRATION

Patent #:	7111199	Issue Dt:	09/19/2006	Application #:	10190933	Filing Dt:	07/08/2002
Publication #:	US20040004279	Pub Dt:	01/08/2004
Title:	BUILT-IN DEBUG FEATURE FOR COMPLEX VLSI CHIP

Patent #:	6806038	Issue Dt:	10/19/2004	Application #:	10190954	Filing Dt:	07/08/2002
Publication #:	US20040005517	Pub Dt:	01/08/2004
Title:	PLASMA PASSIVATION

Patent #:	6744387	Issue Dt:	06/01/2004	Application #:	10191596	Filing Dt:	07/10/2002
Publication #:	US20040008769	Pub Dt:	01/15/2004
Title:	METHOD AND SYSTEM FOR SYMBOL BINARIZATION

Patent #:	7082522	Issue Dt:	07/25/2006	Application #:	10191634	Filing Dt:	07/09/2002
Publication #:	US20040010678	Pub Dt:	01/15/2004
Title:	METHOD AND/OR APPARATUS FOR IMPLEMENTING ENHANCED DEVICE IDENTIFICATION

Patent #:	6767842	Issue Dt:	07/27/2004	Application #:	10191670	Filing Dt:	07/09/2002
Publication #:	US20040007761	Pub Dt:	01/15/2004
Title:	IMPLEMENTATION OF SI-GE HBT WITH CMOS PROCESS

Patent #:	6810505	Issue Dt:	10/26/2004	Application #:	10192989	Filing Dt:	07/10/2002
Publication #:	US20040010761	Pub Dt:	01/15/2004
Title:	INTEGRATED CIRCUIT DESIGN FLOW WITH CAPACITIVE MARGIN

Patent #:	6532431	Issue Dt:	03/11/2003	Application #:	10194134	Filing Dt:	07/12/2002
Title:	RATIO TESTING

Patent #:	6586984	Issue Dt:	07/01/2003	Application #:	10194271	Filing Dt:	07/12/2002
Title:	METHOD FOR PREVENTING DAMAGE TO IO DEVICES DUE TO OVER VOLTAGE AT PIN

Patent #:	7020770	Issue Dt:	03/28/2006	Application #:	10194348	Filing Dt:	07/12/2002
Publication #:	US20040010680	Pub Dt:	01/15/2004
Title:	METHOD AND APPARATUS FOR CONFIGURATION OF RAID CONTROLLERS

Patent #:	6674092	Issue Dt:	01/06/2004	Application #:	10194578	Filing Dt:	07/12/2002
Title:	THIN FILM CMOS CALIBRATION STANDARD HAVING PROTECTIVE COVER LAYER

Patent #:	6768339	Issue Dt:	07/27/2004	Application #:	10194650	Filing Dt:	07/12/2002
Publication #:	US20040007712	Pub Dt:	01/15/2004
Title:	FIVE VOLT TOLERANT INPUT SCHEME USING A SWITCHED CMOS PASS GATE

Patent #:	6858531	Issue Dt:	02/22/2005	Application #:	10195044	Filing Dt:	07/12/2002
Title:	ELECTRO CHEMICAL MECHANICAL POLISHING METHOD AND DEVICE FOR PLANARIZING SEMICONDUCTOR SURFACES

Patent #:	6682947	Issue Dt:	01/27/2004	Application #:	10195250	Filing Dt:	07/15/2002
Publication #:	US20040010763	Pub Dt:	01/15/2004
Title:	FEED FORWARD TESTING

Patent #:	6673200	Issue Dt:	01/06/2004	Application #:	10195775	Filing Dt:	07/12/2002
Title:	METHOD OF REDUCING PROCESS PLASMA DAMAGE USING OPTICAL SPECTROSCOPY

Patent #:	6787180	Issue Dt:	09/07/2004	Application #:	10196787	Filing Dt:	07/17/2002
Publication #:	US20020174829	Pub Dt:	11/28/2002
Title:	EXHAUST FLOW CONTROL SYSTEM

Patent #:	7477649	Issue Dt:	01/13/2009	Application #:	10196824	Filing Dt:	07/17/2002
Publication #:	US20040013123	Pub Dt:	01/22/2004
Title:	ACTIVE FIFO THRESHOLD ADJUSTMENT

Patent #:	6807655	Issue Dt:	10/19/2004	Application #:	10197956	Filing Dt:	07/16/2002
Title:	ADAPTIVE OFF TESTER SCREENING METHOD BASED ON INTRINSIC DIE PARAMETRIC MEASUREMENTS

Patent #:	6753255	Issue Dt:	06/22/2004	Application #:	10200469	Filing Dt:	07/18/2002
Title:	PROCESS AND APPARATUS FOR WAFER EDGE PROFILE CONTROL USING GAS FLOW CONTROL RING

Patent #:	6944791	Issue Dt:	09/13/2005	Application #:	10200470	Filing Dt:	07/18/2002
Publication #:	US20040015657	Pub Dt:	01/22/2004
Title:	METHOD OF HANDLING UNREADABLE BLOCKS DURING WRITE OF A RAID DEVICE

Patent #:	6645857	Issue Dt:	11/11/2003	Application #:	10201010	Filing Dt:	07/22/2002
Title:	KEY HOLE FILLING

Patent #:	7117283	Issue Dt:	10/03/2006	Application #:	10202521	Filing Dt:	07/24/2002
Publication #:	US20040019720	Pub Dt:	01/29/2004
Title:	MULTI-MASTER EXTENDED 12C PROTOCOL

Patent #:	6925519	Issue Dt:	08/02/2005	Application #:	10202774	Filing Dt:	07/25/2002
Publication #:	US20040019734	Pub Dt:	01/29/2004
Title:	AUTOMATIC TRANSLATION FROM SCSI COMMAND PROTOCOL TO ATA COMMAND PROTOCOL

Patent #:	7047335	Issue Dt:	05/16/2006	Application #:	10205063	Filing Dt:	07/25/2002
Publication #:	US20040019718	Pub Dt:	01/29/2004
Title:	METHOD FOR RECEIVING USER DEFINED FRAME INFORMATION STRUCTURE (FIS) TYPES IN A SERIAL-ATA (SATA) SYSTEM

Patent #:	6566268	Issue Dt:	05/20/2003	Application #:	10205229	Filing Dt:	07/25/2002
Title:	METHOD AND APPARATUS FOR PLANARIZING A WAFER SURFACE OF A SEMICONDUCTOR WAFER HAVING AN ELEVATED PORTION EXTENDING THEREFROM

Patent #:	7055068	Issue Dt:	05/30/2006	Application #:	10205265	Filing Dt:	07/25/2002
Publication #:	US20040019833	Pub Dt:	01/29/2004
Title:	METHOD FOR VALIDATING OPERATION OF A FIBRE LINK

Patent #:	7000142	Issue Dt:	02/14/2006	Application #:	10205680	Filing Dt:	07/25/2002
Publication #:	US20040019824	Pub Dt:	01/29/2004
Title:	MIRRORED EXTENSIONS TO A MULTIPLE DISK STORAGE SYSTEM

Patent #:	6816954	Issue Dt:	11/09/2004	Application #:	10207283	Filing Dt:	07/29/2002
Publication #:	US20040019755	Pub Dt:	01/29/2004
Title:	SYSTEM AND METHOD FOR TUNING RETRY PERFORMANCE

Patent #:	6764749	Issue Dt:	07/20/2004	Application #:	10207607	Filing Dt:	07/29/2002
Publication #:	US20040018448	Pub Dt:	01/29/2004
Title:	METHOD TO IMPROVE THE RESOLUTION OF A PHOTOLITHOGRAPHY SYSTEM BY USE OF A COUPLING LAYER BETWEEN THE PHOTO RESIST AND THE ARC

Patent #:	6934769	Issue Dt:	08/23/2005	Application #:	10207672	Filing Dt:	07/29/2002
Publication #:	US20040019706	Pub Dt:	01/29/2004
Title:	METHODS AND STRUCTURE FOR SCSI/IDE TRANSLATION IN A STORAGE SUBSYSTEM

Patent #:	6664816	Issue Dt:	12/16/2003	Application #:	10207943	Filing Dt:	07/30/2002
Title:	SIGNAL AMPLITUDE COMPARATOR

Patent #:	7123651	Issue Dt:	10/17/2006	Application #:	10209338	Filing Dt:	07/31/2002
Publication #:	US20040022308	Pub Dt:	02/05/2004
Title:	ADAPTABLE HYBRID AND SELECTION METHOD FOR ADSL MODEM DATA RATE IMPROVEMENT

Patent #:	6996659	Issue Dt:	02/07/2006	Application #:	10209467	Filing Dt:	07/30/2002
Publication #:	US20040024943	Pub Dt:	02/05/2004
Title:	GENERIC BRIDGE CORE

Patent #:	6641698	Issue Dt:	11/04/2003	Application #:	10210365	Filing Dt:	08/01/2002
Publication #:	US20020179248	Pub Dt:	12/05/2002
Title:	INTEGRATED CIRCUIT FABRICATION DUAL PLASMA PROCESS WITH SEPARATE INTRODUCTION OF DIFFERENT GASES INTO GAS FLOW

Patent #:	6931499	Issue Dt:	08/16/2005	Application #:	10210384	Filing Dt:	08/01/2002
Publication #:	US20040024977	Pub Dt:	02/05/2004
Title:	METHOD AND APPARATUS FOR COPYING DATA BETWEEN STORAGE VOLUMES OF STORAGE SYSTEMS

Patent #:	6653883	Issue Dt:	11/25/2003	Application #:	10210488	Filing Dt:	07/31/2002
Publication #:	US20020196067	Pub Dt:	12/26/2002
Title:	PROCESS, VOLTAGE AND TEMPERATURE INDEPENDENT CLOCK TREE DESKEW CIRCUITRY-TEMPORARY DRIVER METHOD

Patent #:	6857108	Issue Dt:	02/15/2005	Application #:	10210651	Filing Dt:	07/31/2002
Publication #:	US20040025119	Pub Dt:	02/05/2004
Title:	INTERACTIVE REPRESENTATION OF STRUCTURAL DEPENDENCIES IN SEMICONDUCTOR DESIGN FLOWS

Patent #:	6777314	Issue Dt:	08/17/2004	Application #:	10211914	Filing Dt:	08/02/2002
Publication #:	US20040023481	Pub Dt:	02/05/2004
Title:	METHOD OF FORMING ELECTROLYTIC CONTACT PADS INCLUDING LAYERS OF COPPER, NICKEL, AND GOLD

Patent #:	6928514	Issue Dt:	08/09/2005	Application #:	10212359	Filing Dt:	08/05/2002
Publication #:	US20040024962	Pub Dt:	02/05/2004
Title:	METHOD AND APPARATUS FOR TEAMING STORAGE CONTROLLERS

Patent #:	6700207	Issue Dt:	03/02/2004	Application #:	10212448	Filing Dt:	08/05/2002
Publication #:	US20040021232	Pub Dt:	02/05/2004
Title:	FLIP-CHIP BALL GRID ARRAY PACKAGE FOR ELECTROMIGRATION TESTING

Patent #:	6650155	Issue Dt:	11/18/2003	Application #:	10213761	Filing Dt:	08/07/2002
Title:	POWER-ON RESET CIRCUIT

Patent #:	7075462	Issue Dt:	07/11/2006	Application #:	10214043	Filing Dt:	08/07/2002
Publication #:	US20040028140	Pub Dt:	02/12/2004
Title:	SPEEDING UP VARIABLE LENGTH CODE DECODING ON GENERAL PURPOSE PROCESSORS

Patent #:	6747860	Issue Dt:	06/08/2004	Application #:	10214217	Filing Dt:	08/07/2002
Publication #:	US20040027107	Pub Dt:	02/12/2004
Title:	POWER-SUPPLY FEEDTHROUGH PROTECTION CIRCUIT FOR 5-VOLT FAILSAFE CMOS DRIVERS

Patent #:	6586291	Issue Dt:	07/01/2003	Application #:	10214618	Filing Dt:	08/08/2002
Title:	HIGH DENSITY MEMORY WITH STORAGE CAPACITOR

Patent #:	7062678	Issue Dt:	06/13/2006	Application #:	10214864	Filing Dt:	08/06/2002
Publication #:	US20040030955	Pub Dt:	02/12/2004
Title:	DIAGNOSTIC MEMORY INTERFACE TEST

Patent #:	6509762	Issue Dt:	01/21/2003	Application #:	10215397	Filing Dt:	08/08/2002
Title:	METHOD AND APPARATUS FOR MEASURING THE PHASE OF CAPTURED READ DATA

Patent #:	6642791	Issue Dt:	11/04/2003	Application #:	10215920	Filing Dt:	08/09/2002
Title:	SELF-BIASED AMPLIFIER CIRCUIT AND METHOD FOR SELF-BASING AMPLIFIER CIRCUIT

Patent #:	6569739	Issue Dt:	05/27/2003	Application #:	10216425	Filing Dt:	08/08/2002
Title:	METHOD OF REDUCING THE EFFECT OF IMPLANTATION DAMAGE TO SHALLOW TRENCH ISOLATION REGIONS DURING THE FORMATION OF VARIABLE THICKNESS GATE LAYERS

Patent #:	6567022	Issue Dt:	05/20/2003	Application #:	10217051	Filing Dt:	08/12/2002
Title:	MATCHING CALIBRATION FOR DUAL ANALOG-TO-DIGITAL CONVERTERS

Patent #:	7152193	Issue Dt:	12/19/2006	Application #:	10217601	Filing Dt:	08/13/2002
Publication #:	US20040034823	Pub Dt:	02/19/2004
Title:	EMBEDDED SEQUENCE CHECKING

Patent #:	6614269	Issue Dt:	09/02/2003	Application #:	10217785	Filing Dt:	08/13/2002
Title:	INTEGRATED POLYPHASE AMPLITUDE DETECTOR

Patent #:	6683551	Issue Dt:	01/27/2004	Application #:	10219638	Filing Dt:	08/15/2002
Title:	DIGITAL-TO-ANALOG CONVERTER AND METHOD OF OPERATION

Patent #:	6775818	Issue Dt:	08/10/2004	Application #:	10223931	Filing Dt:	08/20/2002
Publication #:	US20040040000	Pub Dt:	02/26/2004
Title:	DEVICE PARAMETER AND GATE PERFORMANCE SIMULATION BASED ON WAFER IMAGE PREDICTION

Patent #:	6802047	Issue Dt:	10/05/2004	Application #:	10224019	Filing Dt:	08/19/2002
Title:	CALCULATING RESISTANCE OF CONDUCTOR LAYER FOR INTEGRATED CIRCUIT DESIGN

Patent #:	6764389	Issue Dt:	07/20/2004	Application #:	10224025	Filing Dt:	08/20/2002
Title:	CONDITIONING BAR ASSEMBLY HAVING AN ABRASION MEMBER SUPPORTED ON A POLYCARBONATE MEMBER

Patent #:	6785871	Issue Dt:	08/31/2004	Application #:	10225909	Filing Dt:	08/21/2002
Publication #:	US20040040002	Pub Dt:	02/26/2004
Title:	AUTOMATIC RECOGNITION OF AN OPTICALLY PERIODIC STRUCTURE IN AN INTEGRATED CIRCUIT DESIGN

Patent #:	7148131	Issue Dt:	12/12/2006	Application #:	10226884	Filing Dt:	08/23/2002
Title:	METHOD FOR IMPLANTING IONS IN A SEMICONDUCTOR

Patent #:	7210063	Issue Dt:	04/24/2007	Application #:	10228390	Filing Dt:	08/27/2002
Publication #:	US20040044927	Pub Dt:	03/04/2004
Title:	PROGRAMMABLE DEVICE AND METHOD OF PROGRAMMING

Patent #:	7058854	Issue Dt:	06/06/2006	Application #:	10228559	Filing Dt:	08/27/2002
Publication #:	US20040044925	Pub Dt:	03/04/2004
Title:	AUTOMODE SELECT

Patent #:	6861310	Issue Dt:	03/01/2005	Application #:	10228859	Filing Dt:	08/27/2002
Publication #:	US20030006447	Pub Dt:	01/09/2003
Title:	CAPACITOR HAVING A TANTALUM LOWER ELECTRODE AND METHOD OF FORMING THE SAME

Patent #:	6781150	Issue Dt:	08/24/2004	Application #:	10229601	Filing Dt:	08/28/2002
Publication #:	US20040043656	Pub Dt:	03/04/2004
Title:	TEST STRUCTURE

Patent #:	7000045	Issue Dt:	02/14/2006	Application #:	10229745	Filing Dt:	08/28/2002
Publication #:	US20040044812	Pub Dt:	03/04/2004
Title:	BYTE-ENABLED TRANSFER FOR A DATA BUS HAVING FIXED-BYTE DATA TRANSFER

Patent #:	7154976	Issue Dt:	12/26/2006	Application #:	10230565	Filing Dt:	08/29/2002
Publication #:	US20040041947	Pub Dt:	03/04/2004
Title:	FREQUENCY CONTROLLER

Patent #:	6704810	Issue Dt:	03/09/2004	Application #:	10231331	Filing Dt:	08/27/2002
Publication #:	US20040044800	Pub Dt:	03/04/2004
Title:	METHOD FOR HANDLING PERSISTENT RESERVATION REGISTRATIONS IN A STORAGE DEVICE

Patent #:	7212961	Issue Dt:	05/01/2007	Application #:	10231641	Filing Dt:	08/30/2002
Publication #:	US20040044875	Pub Dt:	03/04/2004
Title:	INTERFACE FOR RAPID PROTOTYPING SYSTEM

Patent #:	7299427	Issue Dt:	11/20/2007	Application #:	10231643	Filing Dt:	08/30/2002
Publication #:	US20040044876	Pub Dt:	03/04/2004
Title:	RAPID PROTOTYPING SYSTEM

Patent #:	6748579	Issue Dt:	06/08/2004	Application #:	10231904	Filing Dt:	08/30/2002
Publication #:	US20040044983	Pub Dt:	03/04/2004
Title:	METHOD OF USING FILLLER METAL FOR IMPLEMENTING CHANGES IN AN INTEGRATED CIRCUIT DESIGN

Patent #:	7062525	Issue Dt:	06/13/2006	Application #:	10232001	Filing Dt:	08/30/2002
Title:	CIRCUIT AND METHOD FOR NORMALIZING AND ROUNDING FLOATING -POINT RESULTS AND PROCESSOR INCORPORATING THE CIRCUIT OR THE METHOD

Patent #:	7301906	Issue Dt:	11/27/2007	Application #:	10232051	Filing Dt:	08/30/2002
Publication #:	US20030117958	Pub Dt:	06/26/2003
Title:	METHODS AND STRUCTURES FOR IMPROVED BUFFER MANAGEMENT AND DYNAMIC ADAPTION OF FLOW CONTROL STATUS IN HIGH-SPEED COMMUNICATION NETWORKS

Patent #:	7013356	Issue Dt:	03/14/2006	Application #:	10232289	Filing Dt:	08/30/2002
Publication #:	US20040044813	Pub Dt:	03/04/2004
Title:	METHODS AND STRUCTURE FOR PRESERVING LOCK SIGNALS ON MULTIPLE BUSES COUPLED TO A MULTIPORTED DEVICE

Patent #:	6851098	Issue Dt:	02/01/2005	Application #:	10232423	Filing Dt:	08/28/2002
Publication #:	US20040044976	Pub Dt:	03/04/2004
Title:	STATIC TIMING ANALYSIS AND PERFORMANCE DIAGNOSTIC DISPLAY TOOL

Patent #:	6667703	Issue Dt:	12/23/2003	Application #:	10232968	Filing Dt:	08/30/2002
Title:	GAIN AND OFFSET CALIBRATION FOR MATCHING DIGITAL-TO-ANALOG CONVERTERS

Patent #:	6650266	Issue Dt:	11/18/2003	Application #:	10234014	Filing Dt:	09/03/2002
Title:	IMPROVED DIGITAL TO ANALOG CONVERTER USING CONTROL SIGNALS AND METHOD OF OPERATION

Patent #:	7362770	Issue Dt:	04/22/2008	Application #:	10236115	Filing Dt:	09/06/2002
Publication #:	US20040047369	Pub Dt:	03/11/2004
Title:	METHOD AND APPARATUS FOR USING AND COMBINING SUB-FRAME PROCESSING AND ADAPTIVE JITTER-BUFFERS FOR IMPROVED VOICE QUALITY IN VOICE -OVER-PACKET NETWORKS

Patent #:	6782525	Issue Dt:	08/24/2004	Application #:	10236207	Filing Dt:	09/05/2002
Publication #:	US20040049760	Pub Dt:	03/11/2004
Title:	WAFER PROCESS CRITICAL DIMENSION, ALIGNMENT, AND REGISTRATION ANALYSIS SIMULATION TOOL

Patent #:	7016041	Issue Dt:	03/21/2006	Application #:	10236226	Filing Dt:	09/06/2002
Publication #:	US20040046961	Pub Dt:	03/11/2004
Title:	RETICLE OVERLAY CORRECTION

Patent #:	7630456	Issue Dt:	12/08/2009	Application #:	10237768	Filing Dt:	09/09/2002
Publication #:	US20040047433	Pub Dt:	03/11/2004
Title:	METHOD AND/OR APPARATUS TO EFFICIENTLY TRANSMIT BROADBAND SERVICE CONTENT USING LOW DENSITY PARITY CODE BASED CODED MODULATION

Patent #:	6734560	Issue Dt:	05/11/2004	Application #:	10238073	Filing Dt:	09/09/2002
Publication #:	US20030064588	Pub Dt:	04/03/2003
Title:	DIAMOND BARRIER LAYER

Patent #:	7043703	Issue Dt:	05/09/2006	Application #:	10241317	Filing Dt:	09/11/2002
Publication #:	US20040049604	Pub Dt:	03/11/2004
Title:	ARCHITECTURE AND/OR METHOD FOR USING INPUT/OUTPUT AFFINITY REGION FOR FLEXIBLE USE OF HARD MACRO I/O BUFFERS

Patent #:	6670834	Issue Dt:	12/30/2003	Application #:	10241911	Filing Dt:	09/12/2002
Title:	DIGITAL LOCK DETECT FOR DITHERING PHASE LOCK LOOPS

Patent #:	6842042	Issue Dt:	01/11/2005	Application #:	10242165	Filing Dt:	09/11/2002
Publication #:	US20040046588	Pub Dt:	03/11/2004
Title:	GLOBAL CHIP INTERCONNECT

Patent #:	6885436	Issue Dt:	04/26/2005	Application #:	10243562	Filing Dt:	09/13/2002
Title:	OPTICAL ERROR MINIMIZATION IN A SEMICONDUCTOR MANUFACTURING APPARATUS

Patent #:	7017093	Issue Dt:	03/21/2006	Application #:	10245148	Filing Dt:	09/16/2002
Publication #:	US20040054815	Pub Dt:	03/18/2004
Title:	CIRCUIT AND/OR METHOD FOR AUTOMATED USE OF UNALLOCATED RESOURCES FOR A TRACE BUFFER APPLICATION

Patent #:	6855624	Issue Dt:	02/15/2005	Application #:	10245219	Filing Dt:	09/17/2002
Title:	LOW-LOSS ON-CHIP TRANSMISSION LINE FOR INTEGRATED CIRCUIT STRUCTURES AND METHOD OF MANUFACTURE

Patent #:	6894762	Issue Dt:	05/17/2005	Application #:	10246286	Filing Dt:	09/17/2002
Title:	DUAL SOURCE LITHOGRAPHY FOR DIRECT WRITE APPLICATION

Patent #:	7103528	Issue Dt:	09/05/2006	Application #:	10247996	Filing Dt:	09/19/2002
Publication #:	US20040059563	Pub Dt:	03/25/2004
Title:	EMULATED ATOMIC INSTRUCTION SEQUENCES IN A MULTIPROCESSOR SYSTEM

Patent #:	6544829	Issue Dt:	04/08/2003	Application #:	10251016	Filing Dt:	09/20/2002
Title:	POLYSILICON GATE SALICIDATION

Patent #:	7149340	Issue Dt:	12/12/2006	Application #:	10251082	Filing Dt:	09/20/2002
Publication #:	US20040057610	Pub Dt:	03/25/2004
Title:	MASK DEFECT ANALYSIS FOR BOTH HORIZONTAL AND VERTICAL PROCESSING EFFECTS

Patent #:	7003610	Issue Dt:	02/21/2006	Application #:	10251344	Filing Dt:	09/20/2002
Publication #:	US20040059855	Pub Dt:	03/25/2004
Title:	SYSTEM AND METHOD FOR HANDLING SHARED RESOURCE WRITES ARRIVING VIA NON-MASKABLE INTERRUPTS (NMI) IN SINGLE THREAD NON-MISSION CRITICAL SYSTEMS WITH LIMITED MEMORY SPACE

Patent #:	7078924	Issue Dt:	07/18/2006	Application #:	10251345	Filing Dt:	09/20/2002
Publication #:	US20040059975	Pub Dt:	03/25/2004
Title:	METHODOLOGY TO ACCURATELY TEST CLOCK TO SIGNAL VALID AND SLEW RATES OF PCI SIGNALS

Patent #:	6747473	Issue Dt:	06/08/2004	Application #:	10252488	Filing Dt:	09/23/2002
Publication #:	US20040059971	Pub Dt:	03/25/2004
Title:	DEVICE UNDER TEST INTERFACE CARD WITH ON-BOARD TESTING

Patent #:	6701495	Issue Dt:	03/02/2004	Application #:	10253006	Filing Dt:	09/23/2002
Title:	MODEL OF THE CONTACT REGION OF INTEGRATED CIRCUIT RESISTORS

Patent #:	6713394	Issue Dt:	03/30/2004	Application #:	10253158	Filing Dt:	09/24/2002
Publication #:	US20030017704	Pub Dt:	01/23/2003
Title:	PROCESS FOR PLANARIZATION OF INTEGRATED CIRCUIT STRUCTURE WHICH INHIBITS CRACKING OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL ADJACENT UNDERLYING RAISED STRUCTURES

Patent #:	7039169	Issue Dt:	05/02/2006	Application #:	10254185	Filing Dt:	09/25/2002
Publication #:	US20040057565	Pub Dt:	03/25/2004
Title:	DETECTION AND AUTHENTICATION OF MULTIPLE INTEGRATED RECEIVER DECODERS (IRDS) WITHIN A SUBSCRIBER DWELLING

Patent #:	6961786	Issue Dt:	11/01/2005	Application #:	10254309	Filing Dt:	09/25/2002
Publication #:	US20040057660	Pub Dt:	03/25/2004
Title:	FIBER LOOP LINKING/DETECTING

Patent #:	6810515	Issue Dt:	10/26/2004	Application #:	10254380	Filing Dt:	09/25/2002
Publication #:	US20040060012	Pub Dt:	03/25/2004
Title:	PROCESS OF RESTRUCTURING LOGICS IN ICS FOR SETUP AND HOLD TIME OPTIMIZATION

Patent #:	6849936	Issue Dt:	02/01/2005	Application #:	10254473	Filing Dt:	09/25/2002
Title:	SYSTEM AND METHOD FOR USING FILM DEPOSITION TECHNIQUES TO PROVIDE AN ANTENNA WITHIN AN INTEGRATED CIRCUIT PACKAGE

Patent #:	6760896	Issue Dt:	07/06/2004	Application #:	10254607	Filing Dt:	09/25/2002
Publication #:	US20040060027	Pub Dt:	03/25/2004
Title:	PROCESS LAYOUT OF BUFFER MODULES IN INTEGRATED CIRCUITS

100

Patent #:	6804811	Issue Dt:	10/12/2004	Application #:	10254616	Filing Dt:	09/25/2002
Publication #:	US20040060029	Pub Dt:	03/25/2004
Title:	PROCESS FOR LAYOUT OF MEMORY MATRICES IN INTEGRATED CIRCUITS

Assignor

LSI CORPORATION

Exec Dt:

08/14/2014

Assignee

AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

1 YISHUN AVENUE 7

SINGAPORE, SINGAPORE 768923

Correspondence name and address
	LATHAM & WATKINS LLP
	650 TOWN CENTER DRIVE, SUITE 2000
	COSTA MESA, CA 92626

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