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03/29/2005
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09/25/2002
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03/25/2004
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08/12/2003
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04/01/2004
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06/27/2006
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09/25/2002
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03/25/2004
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11/04/2003
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09/27/2002
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08/01/2006
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09/30/2002
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04/01/2004
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04/11/2006
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09/26/2002
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04/01/2004
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10/10/2006
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09/27/2002
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04/10/2003
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09/06/2005
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09/30/2002
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04/01/2004
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05/11/2004
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09/30/2002
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04/01/2004
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08/16/2005
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09/30/2002
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04/01/2004
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09/28/2004
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04/01/2004
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09/02/2003
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10/03/2002
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02/13/2003
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10/04/2002
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04/15/2004
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01/20/2004
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10/07/2002
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03/22/2005
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04/08/2004
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03/15/2005
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10/07/2002
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04/08/2004
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01/03/2006
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10/08/2002
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04/08/2004
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03/01/2005
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10/09/2002
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04/15/2004
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08/31/2004
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10267810
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10/09/2002
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04/15/2004
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04/06/2004
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10267814
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10/09/2002
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04/15/2004
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SUBSTRATE IMPEDANCE MEASUREMENT
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01/29/2008
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10268303
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10/09/2002
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04/15/2004
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INTELLIGENT RECORDING CONTROL SYSTEM
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05/09/2006
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10268361
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10/10/2002
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04/15/2004
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MULTI CHIP MODULE ASSEMBLY
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08/12/2003
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10/10/2002
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03/06/2003
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SHALLOW JUNCTION FORMATION
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08/24/2004
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10/15/2002
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04/15/2004
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06/29/2004
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10271919
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10/16/2002
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04/22/2004
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DIGITALLY-PROGRAMMABLE DELAY LINE FOR MULTI-PHASE CLOCK GENERATOR
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04/12/2005
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10/16/2002
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04/22/2004
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METHOD OF DELAY CALCULATION FOR VARIATION IN INTERCONNECT METAL PROCESS
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03/22/2005
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10/21/2002
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04/22/2004
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09/06/2005
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10/21/2002
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04/22/2004
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02/09/2010
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10/22/2002
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04/08/2004
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09/21/2004
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10/21/2002
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04/22/2004
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08/05/2003
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10/23/2002
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ELECTRONIC SUBSTRATE
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11/25/2003
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10/25/2002
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TOP GATED HEAT DISSIPATION
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09/30/2003
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10/25/2002
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03/27/2003
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INTEGRATED CAPACITOR AND FUSE
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05/18/2004
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10/28/2002
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04/29/2004
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03/07/2006
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10/28/2002
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11/29/2005
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10/28/2002
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MULTIPLE PORT SYSTEM AND METHOD FOR CONTROLLING THE SAME
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02/01/2005
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10/30/2002
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11/18/2003
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10/30/2002
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06/01/2004
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10/30/2002
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05/06/2004
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INTERLEAVED TERMINATION RING
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11/08/2005
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10/30/2002
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05/06/2004
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08/09/2005
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10/30/2002
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05/06/2004
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CONTEXT BASED ADAPTIVE BINARY ARITHMETIC CODEC ARCHITECTURE FOR HIGH QUALITY VIDEO COMPRESSION AND DECOMPRESSION
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04/26/2005
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10/31/2002
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05/06/2004
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05/02/2006
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10/31/2002
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01/22/2008
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10/31/2002
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05/06/2004
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07/25/2006
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11/04/2002
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08/15/2006
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11/03/2002
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05/06/2004
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03/16/2004
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11/05/2002
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05/11/2004
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11/06/2002
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05/06/2004
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10/12/2004
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11/07/2002
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05/13/2004
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CMOS LEVEL SHIFTERS USING NATIVE DEVICES
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11/01/2005
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10290019
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11/06/2002
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05/06/2004
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01/04/2005
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10290437
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11/06/2002
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01/31/2006
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11/07/2002
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09/13/2005
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11/08/2002
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05/13/2004
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09/05/2006
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10291982
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11/12/2002
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05/13/2004
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OPTIMIZING DEPTHS OF CIRCUITS FOR BOOLEAN FUNCTIONS
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01/11/2005
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11/12/2002
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05/13/2004
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03/22/2005
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10293631
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11/13/2002
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11/16/2004
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11/15/2002
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05/20/2004
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FEED FORWARD LEVELING
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05/11/2004
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10295592
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11/14/2002
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Title:
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ASYNCHRONOUS UP-DOWN COUNTER AND METHOD FOR OPERATING THE SAME
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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10298338
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Filing Dt:
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11/14/2002
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Title:
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ACTIVE HEAT SINK
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10298343
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Filing Dt:
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11/14/2002
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Publication #:
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Pub Dt:
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04/10/2003
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Title:
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METHOD OF COMMUNICATING ON A NETWORK
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10298971
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Filing Dt:
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11/18/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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TEST STRUCTURE
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Patent #:
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Issue Dt:
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08/22/2006
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Application #:
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10299270
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Filing Dt:
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11/19/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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DECOMPOSER FOR PARALLEL TURBO DECODING, PROCESS AND INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10299564
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Filing Dt:
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11/19/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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METHOD TO FIND BOOLEAN FUNCTION SYMMETRIES
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10301069
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Filing Dt:
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11/20/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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METHOD FOR REDUCING A PARASITIC GRAPH IN MOMENT COMPUTATION IN VLSI SYSTEMS
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10301099
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Filing Dt:
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11/20/2002
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Title:
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OSCILLATOR CIRCUIT WITH FLICKER NOISE SUPPRESSION AND METHOD FOR OPERATING THE SAME
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10301182
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Filing Dt:
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11/20/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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CHIP MANAGEMENT SYSTEM
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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10303540
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Filing Dt:
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11/25/2002
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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METHOD, SYSTEM AND PROGRAMMING LANGUAGE FOR DEVICE DIAGNOSTICS AND VALIDATION
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10303589
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Filing Dt:
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11/25/2002
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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MULTI-CORE COMMUNICATIONS MODULE, DATA COMMUNICATIONS SYSTEM INCORPORATING A MULTI-CORE COMMUNICATIONS MODULE, AND DATA COMMUNICATIONS PROCESS
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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10304289
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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METACORES: DESIGN AND OPTIMIZATION TECHNIQUES
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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10304631
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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METHOD OF REDUCING SILICONE OXYNITRIDE GATE INSULATOR THICKNESS IN SOME TRANSISTORS OF A HYBRID INTEGRATED CIRCUIT TO OBTAIN INCREASED DIFFERENTIAL IN GATE INSULATOR THICKNESS WITH OTHER TRANSISTORS OF THE HYBRID CIRCUIT
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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10304922
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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SERIAL DATA TRANSMITTER WITH BIT DOUBLING
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10304974
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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THICK METAL TOP LAYER
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10304994
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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INCREASED DATA AVAILABILITY IN RAID ARRAYS USING SMART DRIVES
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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10305638
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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METHOD AND/OR APPARATUS FOR STABILIZING THE FREQUENCY OF DIGITALLY SYNTHESIZED WAVEFORMS
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10305673
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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AUTOMATIC CALIBRATION OF A MASKING PROCESS SIMULATOR
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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10306064
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Filing Dt:
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11/27/2002
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Title:
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SOCKETLESS/BOARDLESS TEST INTERPOSER CARD
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Patent #:
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Issue Dt:
|
02/08/2005
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Application #:
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10306067
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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FIRST APPROXIMATION FOR OPC SIGNIFICANT SPEED-UP
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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10306237
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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06/17/2004
| | | | |
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Title:
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METHOD FOR PRE-EMPTIVE ARBITRATION
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10307018
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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FAILURE ANALYSIS VEHICLE
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10307625
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Filing Dt:
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12/02/2002
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Publication #:
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Pub Dt:
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06/03/2004
| | | | |
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Title:
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READ/MODIFY/WRITE REGISTERS
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Patent #:
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Issue Dt:
|
01/11/2005
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Application #:
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10307666
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Filing Dt:
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12/02/2002
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Publication #:
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Pub Dt:
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06/03/2004
| | | | |
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Title:
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DDR SDRAM MEMORY CONTROLLER WITH MULTIPLE DEPENDENCY REQUEST ARCHITECTURE AND INTELLIGENT REQUESTOR INTERFACE
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|
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Patent #:
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Issue Dt:
|
04/26/2005
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Application #:
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10308334
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Filing Dt:
|
12/03/2002
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Publication #:
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Pub Dt:
|
06/03/2004
| | | | |
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Title:
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MEMORY THAT ALLOWS SIMULTANEOUS READ REQUESTS
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|
|
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Patent #:
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Issue Dt:
|
03/02/2004
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Application #:
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10308557
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Filing Dt:
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12/03/2002
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Publication #:
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Pub Dt:
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12/25/2003
| | | | |
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Title:
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EFFECTIVE APPROXIMATED CALCULATION OF SMOOTH FUNCTIONS
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|
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Patent #:
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Issue Dt:
|
05/24/2005
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Application #:
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10313333
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Filing Dt:
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12/06/2002
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Publication #:
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Pub Dt:
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06/10/2004
| | | | |
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Title:
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PROCESS TO MINIMIZE POLYSILICON GATE DEPLETION AND DOPANT PENETRATION AND TO INCREASE CONDUCTIVITY
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10313399
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Filing Dt:
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12/06/2002
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Publication #:
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Pub Dt:
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06/26/2003
| | | | |
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Title:
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SWITCHING DEVICE COMPRISING LOCAL DECODING MEANS
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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10313786
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Filing Dt:
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12/06/2002
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Publication #:
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Pub Dt:
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06/26/2003
| | | | |
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Title:
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SWITCHING DEVICE COMPRISING A COMMON VOLTAGE REFERENCE PATH
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10315434
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Filing Dt:
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12/10/2002
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Publication #:
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Pub Dt:
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06/10/2004
| | | | |
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Title:
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APPARATUS AND METHOD FOR SHARING BOOT VOLUME AMONG SERVER BLADES
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10315480
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Filing Dt:
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12/09/2002
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Title:
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CONTAMINATION DISTRIBUTION APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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10315506
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Filing Dt:
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12/09/2002
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Publication #:
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Pub Dt:
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06/10/2004
| | | | |
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Title:
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DYNAMIC TRAFFIC-BASED PACKET ANALYSIS FOR FLOW CONTROL
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Patent #:
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Issue Dt:
|
11/15/2005
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Application #:
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10316101
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Filing Dt:
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12/09/2002
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Publication #:
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Pub Dt:
|
06/10/2004
| | | | |
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Title:
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METHOD FOR COMPOSING MEMORY ON PROGRAMMABLE PLATFORM DEVICES TO MEET VARIED MEMORY REQUIREMENTS WITH A FIXED SET OF RESOURCES
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Patent #:
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Issue Dt:
|
04/25/2006
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Application #:
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10316339
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Filing Dt:
|
12/11/2002
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Publication #:
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Pub Dt:
|
06/17/2004
| | | | |
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Title:
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METHOD AND APPARATUS FOR PERFORMING A HIGH SPEED BINARY SEARCH IN TIME CRITICAL ENVIRONMENTS
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Patent #:
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Issue Dt:
|
11/06/2007
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Application #:
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10316344
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Filing Dt:
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12/11/2002
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Publication #:
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Pub Dt:
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07/01/2004
| | | | |
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Title:
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MULTI-LEVEL REGISTER BANK BASED CONFIGURABLE ETHERNER FRAME PARSER
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|
|
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Patent #:
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Issue Dt:
|
05/09/2006
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Application #:
|
10316510
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Filing Dt:
|
12/11/2002
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Publication #:
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Pub Dt:
|
06/17/2004
| | | | |
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Title:
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RECONFIGURABLE MEMORY CONTROLLER
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Patent #:
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Issue Dt:
|
06/29/2004
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Application #:
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10316594
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Filing Dt:
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12/11/2002
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Publication #:
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Pub Dt:
|
06/17/2004
| | | | |
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Title:
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ESTIMATING FREE SPACE IN IC CHIPS
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|
|
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Patent #:
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Issue Dt:
|
02/14/2006
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Application #:
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10318232
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Filing Dt:
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12/12/2002
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Publication #:
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Pub Dt:
|
06/17/2004
| | | | |
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Title:
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HETEROGENEOUS MULTI-PROCESSOR REFERENCE DESIGN
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Patent #:
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Issue Dt:
|
06/27/2006
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Application #:
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10318623
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Filing Dt:
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12/13/2002
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Publication #:
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Pub Dt:
|
06/17/2004
| | | | |
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Title:
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AUTOMATED SELECTION AND PLACEMENT OF MEMORY DURING DESIGN OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
07/26/2005
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Application #:
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10318639
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Filing Dt:
|
12/13/2002
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Publication #:
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Pub Dt:
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06/17/2004
| | | | |
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Title:
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METHOD FOR CREATING DERIVATIVE INTEGRATED CIRCUIT LAYOUTS FOR RELATED PRODUCTS
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Patent #:
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Issue Dt:
|
10/14/2003
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Application #:
|
10318656
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Filing Dt:
|
12/12/2002
|
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Title:
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METHOD AND SYSTEM FOR CORRECTING QUANTIZATION LOSS DURING ANALOG TO DIGITAL TO ANALOG SIGNAL CONVERSION
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|
|
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Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
10318792
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Filing Dt:
|
12/13/2002
|
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Publication #:
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Pub Dt:
|
06/17/2004
| | | | |
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Title:
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FLEXIBLE TEMPLATE HAVING EMBEDDED GATE ARRAY AND COMPOSABLE MEMORY FOR INTEGRATED CIRCUITS
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