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12/06/2005
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04/18/2006
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08/18/2005
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07/29/2004
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12/14/2010
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06/02/2005
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10/11/2005
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01/30/2007
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06/09/2005
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12/20/2005
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06/09/2005
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06/06/2006
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06/09/2005
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08/05/2008
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12/05/2003
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08/01/2006
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12/05/2003
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06/09/2005
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12/28/2010
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06/09/2005
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03/04/2008
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06/17/2004
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03/20/2007
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05/16/2006
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06/09/2005
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06/09/2005
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08/01/2006
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06/23/2005
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08/19/2008
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12/09/2003
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06/09/2005
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06/28/2005
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06/16/2005
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03/18/2008
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12/10/2003
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06/16/2005
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04/22/2008
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12/10/2003
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06/16/2005
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12/12/2006
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12/11/2003
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04/17/2007
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12/11/2003
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06/16/2005
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PCI VALIDATION
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02/12/2008
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06/16/2005
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06/20/2006
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06/16/2005
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01/17/2006
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12/18/2003
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06/23/2005
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07/15/2008
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06/23/2005
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07/07/2005
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09/11/2007
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06/23/2005
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06/23/2005
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10/30/2007
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08/29/2006
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06/23/2005
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03/18/2008
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06/20/2006
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08/12/2004
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08/18/2005
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08/18/2005
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10/03/2006
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10780971
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Filing Dt:
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02/18/2004
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Pub Dt:
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08/18/2005
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Title:
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SYSTEMS AND METHODS FOR CACHE SYNCHRONIZATION BETWEEN REDUNDANT STORAGE CONTROLLERS
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10/11/2011
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10785273
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02/24/2004
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Publication #:
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Pub Dt:
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08/25/2005
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Title:
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METHOD AND APPARATUS FOR DETERMINING A SECOND PICTURE FOR TEMPORAL DIRECT-MODE BLOCK PREDICTION
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10/31/2006
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10793055
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Filing Dt:
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03/04/2004
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09/08/2005
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Title:
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CONDUCTOR STACK SHIFTING
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Patent #:
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Issue Dt:
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10/03/2006
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10794080
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Filing Dt:
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03/04/2004
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Title:
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DIGITAL PHASE LOCK LOOP
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Patent #:
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Issue Dt:
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08/16/2005
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10794225
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Filing Dt:
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03/05/2004
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Publication #:
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09/08/2005
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Title:
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FEATURE TARGETED INSPECTION
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Patent #:
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Issue Dt:
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06/12/2007
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10794418
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Filing Dt:
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08/26/2004
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Title:
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DIGITAL VISUAL INTERFACE
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09/04/2007
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10794683
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03/05/2004
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Pub Dt:
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09/08/2005
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Title:
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OPC BASED ILLUMINATION OPTIMIZATION WITH MASK ERROR CONSTRAINTS
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Patent #:
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Issue Dt:
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11/20/2007
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10799851
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Filing Dt:
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03/12/2004
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Publication #:
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Pub Dt:
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09/15/2005
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Title:
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PROCESS CONTROL DATA COLLECTION
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Issue Dt:
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01/29/2008
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10800219
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03/12/2004
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Pub Dt:
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09/15/2005
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Title:
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METHOD AND APPARATUS FOR VERIFYING THE POST-OPTICAL PROXIMITY CORRECTED MASK WAFER IMAGE SENSITIVITY TO RETICLE MANUFACTURING ERRORS
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07/01/2008
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10801310
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03/16/2004
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Pub Dt:
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10/13/2005
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Title:
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YIELD PROFILE MANIPULATOR
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Patent #:
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Issue Dt:
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09/30/2008
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10802114
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03/15/2004
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Pub Dt:
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02/10/2005
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Title:
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SYSTEM AND METHOD OF TRIBUTARY TIME-SPACE SWITCHING
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08/18/2009
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10803111
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03/16/2004
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Pub Dt:
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09/22/2005
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Title:
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SYSTEMS AND METHODS FOR TRANSPARENT MOVEMENT OF FILE SERVICES IN A CLUSTERED ENVIRONMENT
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Patent #:
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Issue Dt:
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10/30/2007
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10803301
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03/18/2004
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Publication #:
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Pub Dt:
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09/22/2005
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Title:
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METHODS AND STRUCTURE FOR IMPROVED TRANSFER RATE PERFORMANCE IN A SAS WIDE PORT ENVIRONMENT
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07/08/2008
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10803516
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03/17/2004
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Pub Dt:
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09/22/2005
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Title:
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METHOD AND APPARATUS FOR PERFORMING LOGICAL TRANSFORMATIONS FOR GLOBAL ROUTING
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07/25/2006
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10804980
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03/18/2004
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Publication #:
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Pub Dt:
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09/09/2004
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Title:
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METHOD FOR GROWING THIN FILMS
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Issue Dt:
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01/29/2008
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10807968
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03/24/2004
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Pub Dt:
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09/29/2005
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Title:
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CRC DATA PROTECTION SCHEME FOR NON-BLOCK-ORIENTED DATA
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09/26/2006
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10809939
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03/25/2004
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Pub Dt:
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11/04/2004
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Title:
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BROKEN SYMMETRY FOR OPTIMIZATION OF RESOURCE FABRIC IN A SEA-OF-PLATFORM ARCHITECTURE
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04/03/2007
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10810294
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03/26/2004
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Pub Dt:
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10/13/2005
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Title:
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MACRO CELL FOR INTEGRATED CIRCUIT PHYSICAL LAYER INTERFACE
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Patent #:
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Issue Dt:
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01/30/2007
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10817302
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04/02/2004
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Pub Dt:
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10/13/2005
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Title:
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DATA STORAGE SYSTEM RECOVERY FROM DISK FAILURE DURING SYSTEM OFF-LINE CONDITION
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11/17/2009
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10817419
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04/01/2004
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Pub Dt:
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10/06/2005
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Title:
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SYSTEM AND METHOD FOR IMPLEMENTING MULTIPLE INSTANTIATED CONFIGURABLE PERIPHERALS IN A CIRCUIT DESIGN
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02/27/2007
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10819254
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04/06/2004
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Pub Dt:
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10/13/2005
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Title:
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GENERIC METHOD AND APPARATUS FOR IMPLEMENTING SOURCE SYNCHRONOUS INTERFACE IN PLATFORM ASIC
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02/06/2007
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10819684
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04/06/2004
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Publication #:
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Pub Dt:
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10/13/2005
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Title:
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INTEGRATED CIRCUIT PACKAGE AND METHOD HAVING WIRE-BONDED INTRA-DIE ELECTRICAL CONNECTIONS
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Issue Dt:
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10/10/2006
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10820494
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04/07/2004
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Pub Dt:
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10/13/2005
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Title:
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METHOD AND APPARATUS FOR ESTABLISHING IMPROVED THERMAL COMMUNICATION BETWEEN A DIE AND A HEATSPREADER IN A SEMICONDUCTOR PACKAGE
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Issue Dt:
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12/09/2008
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10824152
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04/14/2004
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Pub Dt:
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10/20/2005
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Title:
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LOW OVERHEAD CONTEXT INITIALIZATIONS FOR ARITHMETIC VIDEO CODECS
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09/05/2006
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10824509
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04/14/2004
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Pub Dt:
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10/20/2005
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Title:
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PROCESS AND APPARATUS FOR CHARACTERIZING INTELLECTUAL PROPERTY FOR INTEGRATION INTO AN IC PLATFORM ENVIRONMENT
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09/18/2007
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10825342
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04/14/2004
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Pub Dt:
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04/28/2005
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Title:
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OPTIMIZED MIRROR DESIGN FOR OPTICAL DIRECT WRITE
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05/15/2007
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10828408
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Filing Dt:
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04/19/2004
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Pub Dt:
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10/20/2005
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Title:
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METHOD AND COMPUTER PROGRAM FOR VERIFYING AN INCREMENTAL CHANGE TO AN INTEGRATED CIRCUIT DESIGN
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03/15/2005
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10829408
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04/20/2004
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Pub Dt:
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10/07/2004
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Title:
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AUTOMATIC CALIBRATION OF A MASKING PROCESS SIMULATOR
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04/24/2007
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10830542
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04/23/2004
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Pub Dt:
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10/27/2005
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Title:
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PROCESS AND APPARATUS FOR PLACING CELLS IN AN IC FLOORPLAN
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05/15/2007
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10830739
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04/25/2004
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10/27/2005
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Title:
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PROCESS AND APPARATUS FOR MEMORY MAPPING
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10/20/2009
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10832226
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04/26/2004
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10/27/2005
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GATE-LEVEL NETLIST REDUCTION FOR SIMULATING TARGET MODULES OF A DESIGN
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11/20/2012
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10835936
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04/30/2004
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11/03/2005
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RESISTIVE VOLTAGE-DOWN REGULATOR FOR INTEGRATED CIRCUIT RECEIVERS
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06/10/2008
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10837454
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04/30/2004
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11/03/2005
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ECHO CANCELLER HAVING A FREQUENCY DOMAIN ACTIVE REGION LOCATION ESTIMATOR
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04/11/2006
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10837922
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05/03/2004
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11/24/2005
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Title:
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REAL TIME BINARY ARITHMETIC ENCODING
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Issue Dt:
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03/11/2008
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10838081
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05/03/2004
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11/17/2005
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Title:
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DISK DRIVE POWER CYCLE SCREENING METHOD AND APPARATUS FOR DATA STORAGE SYSTEM
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Issue Dt:
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09/01/2009
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10840534
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05/06/2004
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Pub Dt:
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11/10/2005
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Title:
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ASSURING CORRECT DATA ENTRY TO GENERATE SHELLS FOR A SEMICONDUCTOR PLATFORM
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01/24/2006
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10842879
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05/10/2004
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11/10/2005
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Title:
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METHOD OF ESTIMATING A LOCAL AVERAGE CROSSTALK VOLTAGE FOR A VARIABLE VOLTAGE OUTPUT RESISTANCE MODEL
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Issue Dt:
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08/01/2006
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10844664
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05/12/2004
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Pub Dt:
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11/17/2005
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Title:
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METHOD OF OPTIMIZING RTL CODE FOR MULTIPLEX STRUCTURES
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Issue Dt:
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04/15/2008
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10847691
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05/18/2004
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Pub Dt:
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11/24/2005
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Title:
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METHOD FOR CREATING A JTAG TAP CONTROLLER IN A SLICE FOR USE DURING CUSTOM INSTANCE CREATION TO AVOID THE NEED OF A BOUNDARY SCAN SYNTHESIS TOOL
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03/06/2007
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10847692
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05/18/2004
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Pub Dt:
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11/24/2005
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Title:
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HANDLING OF UNUSED COREWARE WITH EMBEDDED BOUNDARY SCAN CHAINS TO AVOID THE NEED OF A BOUNDARY SCAN SYNTHESIS TOOL DURING CUSTOM INSTANCE CREATION
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Issue Dt:
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04/04/2006
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10848979
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05/19/2004
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Pub Dt:
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11/24/2005
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Title:
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CHIP LEVEL CLOCK TREE DESKEW CIRCUIT
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Issue Dt:
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10/03/2006
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10848994
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Filing Dt:
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05/18/2004
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Pub Dt:
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11/24/2005
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Title:
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METHOD AND SYSTEM FOR UTILIZING AN ISOFOCAL CONTOUR TO PERFORM OPTICAL AND PROCESS CORRECTIONS
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Issue Dt:
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05/09/2006
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10852902
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05/25/2004
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Pub Dt:
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12/01/2005
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Title:
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BUILT-IN SELF TEST TECHNIQUE FOR PROGRAMMABLE IMPEDANCE DRIVERS FOR RAPIDCHIP AND ASIC DRIVERS
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Issue Dt:
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07/03/2007
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10853040
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Filing Dt:
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05/25/2004
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Pub Dt:
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12/15/2005
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Title:
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METHOD AND SYSTEM FOR HIGH BANDWIDTH FAULT TOLERANCE IN A STORAGE SUBSYSTEM
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Issue Dt:
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06/07/2005
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10853637
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Filing Dt:
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05/24/2004
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Title:
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METHOD AND CIRCUIT FOR MATCHING SENSE AMPLIFIER TRIGGER SIGNAL TIMING TO DATA BIT LINE SEPARATION TIMING IN A SELF-TIMED MEMORY ARRAY
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03/24/2009
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10855748
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05/27/2004
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Pub Dt:
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12/01/2005
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Title:
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APPARATUS METHOD AND SYSTEM FOR CHARACTERIZING A COMMUNICATION CHANNEL AND INCREASING DATA THROUGHPUT
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