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Reel/Frame:035390/0388   Pages: 247
Recorded: 04/03/2015
Attorney Dkt #:040981-0072
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5804
Page 31 of 59
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
1
Patent #:
7260700
Issue Dt:
08/21/2007
Application #:
10954708
Filing Dt:
09/30/2004
Publication #:
US20060085701
Pub Dt:
04/20/2006
Title:
METHOD AND APPARATUS FOR SEPARATING NATIVE, FUNCTIONAL AND TEST CONFIGURATIONS OF MEMORY
2
Patent #:
7272763
Issue Dt:
09/18/2007
Application #:
10954906
Filing Dt:
09/30/2004
Publication #:
US20060069968
Pub Dt:
03/30/2006
Title:
BUILT-IN SELF TEST CIRCUITRY FOR PROCESS MONITOR CIRCUIT FOR RAPIDCHIP AND ASIC DEVICES
3
Patent #:
7106074
Issue Dt:
09/12/2006
Application #:
10954907
Filing Dt:
09/30/2004
Publication #:
US20060066320
Pub Dt:
03/30/2006
Title:
TECHNIQUE FOR MEASUREMENT OF PROGRAMMABLE TERMINATION RESISTOR NETWORKS ON RAPIDCHIP AND ASIC DEVICES
4
Patent #:
NONE
Issue Dt:
Application #:
10954939
Filing Dt:
09/30/2004
Publication #:
US20060068054
Pub Dt:
03/30/2006
Title:
Technique for high-speed TDF testing on low cost testers using on-chip or off-chip circuitry for RapidChip and ASIC devices
5
Patent #:
7069178
Issue Dt:
06/27/2006
Application #:
10955168
Filing Dt:
09/29/2004
Publication #:
US20060074589
Pub Dt:
04/06/2006
Title:
METHOD OF PREDICTING QUIESCENT CURRENT VARIATION OF AN INTEGRATED CIRCUIT DIE FROM A PROCESS MONITOR DERATING FACTOR
6
Patent #:
7085177
Issue Dt:
08/01/2006
Application #:
10955663
Filing Dt:
09/30/2004
Publication #:
US20060067140
Pub Dt:
03/30/2006
Title:
MAXIMUM SWING THIN OXIDE LEVELSHIFTER
7
Patent #:
7283995
Issue Dt:
10/16/2007
Application #:
10956860
Filing Dt:
09/30/2004
Publication #:
US20060074878
Pub Dt:
04/06/2006
Title:
NQL - NETLIST QUERY LANGUAGE
8
Patent #:
7231623
Issue Dt:
06/12/2007
Application #:
10956862
Filing Dt:
09/30/2004
Publication #:
US20060074938
Pub Dt:
04/06/2006
Title:
NETLIST DATABASE
9
Patent #:
7176082
Issue Dt:
02/13/2007
Application #:
10959868
Filing Dt:
10/06/2004
Publication #:
US20050042818
Pub Dt:
02/24/2005
Title:
ANALOG CAPACITOR IN DUAL DAMASCENE PROCESS
10
Patent #:
8054857
Issue Dt:
11/08/2011
Application #:
10960170
Filing Dt:
10/07/2004
Publication #:
US20060078002
Pub Dt:
04/13/2006
Title:
TASK QUEUING METHODS AND SYSTEMS FOR TRANSMITTING FRAME INFORMATION OVER AN I/O INTERFACE
11
Patent #:
7257762
Issue Dt:
08/14/2007
Application #:
10960492
Filing Dt:
10/07/2004
Publication #:
US20060080589
Pub Dt:
04/13/2006
Title:
MEMORY INTERFACE WITH WRITE BUFFER AND ENCODER
12
Patent #:
7183791
Issue Dt:
02/27/2007
Application #:
10962262
Filing Dt:
10/11/2004
Publication #:
US20060076972
Pub Dt:
04/13/2006
Title:
RELIABILITY CIRCUIT FOR APPLYING AN AC STRESS SIGNAL OR DC MEASUREMENT TO A TRANSISTOR DEVICE
13
Patent #:
7179736
Issue Dt:
02/20/2007
Application #:
10966074
Filing Dt:
10/14/2004
Publication #:
US20060084267
Pub Dt:
04/20/2006
Title:
METHOD FOR FABRICATING PLANAR SEMICONDUCTOR WAFERS
14
Patent #:
7334172
Issue Dt:
02/19/2008
Application #:
10969086
Filing Dt:
10/20/2004
Publication #:
US20060085708
Pub Dt:
04/20/2006
Title:
TRANSITION FAULT DETECTION REGISTER WITH EXTENDED SHIFT MODE
15
Patent #:
7171638
Issue Dt:
01/30/2007
Application #:
10969745
Filing Dt:
10/20/2004
Publication #:
US20060085771
Pub Dt:
04/20/2006
Title:
METHOD OF SCREENING ASIC DEFECTS USING INDEPENDENT COMPONENT ANALYSIS OF QUIESCENT CURRENT MEASUREMENTS
16
Patent #:
7613856
Issue Dt:
11/03/2009
Application #:
10970211
Filing Dt:
10/21/2004
Publication #:
US20060088049
Pub Dt:
04/27/2006
Title:
ARBITRATING ACCESS FOR A PLURALITY OF DATA CHANNEL INPUTS WITH DIFFERENT CHARACTERISTICS
17
Patent #:
7936829
Issue Dt:
05/03/2011
Application #:
10971216
Filing Dt:
10/22/2004
Publication #:
US20060088110
Pub Dt:
04/27/2006
Title:
DRIVING MULTIPLE CONSECUTIVE BITS IN A SERIAL DATA STREAM AT MULTIPLE VOLTAGE LEVELS
18
Patent #:
7979833
Issue Dt:
07/12/2011
Application #:
10971911
Filing Dt:
10/23/2004
Publication #:
US20060101309
Pub Dt:
05/11/2006
Title:
DEBUGGING SIMULATION OF A CIRCUIT CORE USING PATTERN RECORDER, PLAYER & CHECKER
19
Patent #:
7259083
Issue Dt:
08/21/2007
Application #:
10971961
Filing Dt:
10/22/2004
Publication #:
US20060088990
Pub Dt:
04/27/2006
Title:
LOCAL INTERCONNECT MANUFACTURING PROCESS
20
Patent #:
7138792
Issue Dt:
11/21/2006
Application #:
10972892
Filing Dt:
10/25/2004
Publication #:
US20060087309
Pub Dt:
04/27/2006
Title:
PROGRAMMABLE POWER PERSONALITY CARD
21
Patent #:
7067223
Issue Dt:
06/27/2006
Application #:
10972898
Filing Dt:
10/25/2004
Publication #:
US20050112478
Pub Dt:
05/26/2005
Title:
ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
22
Patent #:
8355457
Issue Dt:
01/15/2013
Application #:
10973585
Filing Dt:
10/26/2004
Publication #:
US20060088117
Pub Dt:
04/27/2006
Title:
CORRECTION-CALCULATION ALGORITHM FOR ESTIMATION OF THE SIGNAL TO NOISE RATIO IN HIGH BIT RATE DMT MODULATION
23
Patent #:
7204920
Issue Dt:
04/17/2007
Application #:
10973851
Filing Dt:
10/25/2004
Publication #:
US20060086608
Pub Dt:
04/27/2006
Title:
CONTACT RING DESIGN FOR REDUCING BUBBLE AND ELECTROLYTE EFFECTS DURING ELECTROCHEMICAL PLATING IN MANUFACTURING
24
Patent #:
7860168
Issue Dt:
12/28/2010
Application #:
10974103
Filing Dt:
10/27/2004
Publication #:
US20060088106
Pub Dt:
04/27/2006
Title:
METHOD AND APPARATUS FOR IMPROVED INCREASED BIT-DEPTH DISPLAY FROM A TRANSFORM DECODER BY RETAINING ADDITIONAL INVERSE TRANSFORM BITS
25
Patent #:
7444560
Issue Dt:
10/28/2008
Application #:
10975315
Filing Dt:
10/28/2004
Publication #:
US20060095816
Pub Dt:
05/04/2006
Title:
TEST CLOCKING SCHEME
26
Patent #:
7181712
Issue Dt:
02/20/2007
Application #:
10975981
Filing Dt:
10/27/2004
Publication #:
US20060090145
Pub Dt:
04/27/2006
Title:
METHOD OF OPTIMIZING CRITICAL PATH DELAY IN AN INTEGRATED CIRCUIT DESIGN
27
Patent #:
7216323
Issue Dt:
05/08/2007
Application #:
10976518
Filing Dt:
10/29/2004
Publication #:
US20060095880
Pub Dt:
05/04/2006
Title:
PROCESS FOR DESIGNING BASE PLATFORMS FOR IC DESIGN TO PERMIT RESOURCE RECOVERY AND FLEXIBLE MACRO PLACEMENT, BASE PLATFORM FOR ICS, AND PROCESS OF CREATING ICS
28
Patent #:
7302654
Issue Dt:
11/27/2007
Application #:
10977386
Filing Dt:
10/29/2004
Publication #:
US20060095883
Pub Dt:
05/04/2006
Title:
METHOD OF AUTOMATING PLACE AND ROUTE CORRECTIONS FOR AN INTEGRATED CIRCUIT DESIGN FROM PHYSICAL DESIGN VALIDATION
29
Patent #:
7440497
Issue Dt:
10/21/2008
Application #:
10978755
Filing Dt:
11/01/2004
Publication #:
US20060093028
Pub Dt:
05/04/2006
Title:
SERIAL DATA LINK USING DECISION FEEDBACK EQUALIZATION
30
Patent #:
7996206
Issue Dt:
08/09/2011
Application #:
10980373
Filing Dt:
11/03/2004
Publication #:
US20060095630
Pub Dt:
05/04/2006
Title:
SERIAL ATTACHED SMALL COMPUTER SYSTEM INTERFACE (SAS) CONNECTION EMULATION FOR DIRECT ATTACHED SERIAL ADVANCED TECHNOLOGY ATTACHEMNT (SATA)
31
Patent #:
7074710
Issue Dt:
07/11/2006
Application #:
10980945
Filing Dt:
11/03/2004
Publication #:
US20060094246
Pub Dt:
05/04/2006
Title:
METHOD OF WAFER PATTERNING FOR REDUCING EDGE EXCLUSION ZONE
32
Patent #:
7414942
Issue Dt:
08/19/2008
Application #:
10981327
Filing Dt:
11/04/2004
Publication #:
US20050078586
Pub Dt:
04/14/2005
Title:
DIGITAL AUTOMATIC GAIN CONTROL OF A MULTILEVEL OPTICAL DISC READ SIGNAL
33
Patent #:
7380228
Issue Dt:
05/27/2008
Application #:
10984115
Filing Dt:
11/08/2004
Publication #:
US20060101363
Pub Dt:
05/11/2006
Title:
METHOD OF ASSOCIATING TIMING VIOLATIONS WITH CRITICAL STRUCTURES IN AN INTEGRATED CIRCUIT DESIGN
34
Patent #:
7148556
Issue Dt:
12/12/2006
Application #:
10984286
Filing Dt:
11/09/2004
Publication #:
US20060097349
Pub Dt:
05/11/2006
Title:
HIGH PERFORMANCE DIODE-IMPLANTED VOLTAGE-CONTROLLED POLY RESISTORS FOR MIXED-SIGNAL AND RF APPLICATIONS
35
Patent #:
8405435
Issue Dt:
03/26/2013
Application #:
10985289
Filing Dt:
11/10/2004
Publication #:
US20060097763
Pub Dt:
05/11/2006
Title:
DELAY LOCKED LOOP HAVING INTERNAL TEST PATH
36
Patent #:
7526587
Issue Dt:
04/28/2009
Application #:
10986732
Filing Dt:
11/12/2004
Publication #:
US20050186832
Pub Dt:
08/25/2005
Title:
DUAL PORT SERIAL ADVANCED TECHNOLOGY ATTACHMENT (SATA) DISK DRIVE
37
Patent #:
6967609
Issue Dt:
11/22/2005
Application #:
10987240
Filing Dt:
11/12/2004
Title:
METHOD AND APPARATUS FOR DYNAMICALLY BIASING SWITCHING ELEMENTS IN CURRENT-STEERING DAC
38
Patent #:
7366862
Issue Dt:
04/29/2008
Application #:
10987356
Filing Dt:
11/12/2004
Publication #:
US20060107011
Pub Dt:
05/18/2006
Title:
METHOD AND APPARATUS FOR SELF-ADJUSTING INPUT DELAY IN DDR-BASED MEMORY SYSTEMS
39
Patent #:
7181359
Issue Dt:
02/20/2007
Application #:
10988081
Filing Dt:
11/12/2004
Publication #:
US20060106563
Pub Dt:
05/18/2006
Title:
METHOD AND SYSTEM OF GENERIC IMPLEMENTATION OF SHARING TEST PINS WITH I/O CELLS
40
Patent #:
7457090
Issue Dt:
11/25/2008
Application #:
10988122
Filing Dt:
11/12/2004
Publication #:
US20060103999
Pub Dt:
05/18/2006
Title:
USE OF A KNOWN COMMON-MODE VOLTAGE FOR INPUT OVERVOLTAGE PROTECTION IN PSEUDO-DIFFERENTIAL RECEIVERS
41
Patent #:
7180360
Issue Dt:
02/20/2007
Application #:
10988156
Filing Dt:
11/12/2004
Publication #:
US20060103447
Pub Dt:
05/18/2006
Title:
METHOD AND APPARATUS FOR SUMMING DC VOLTAGES
42
Patent #:
7865880
Issue Dt:
01/04/2011
Application #:
10989698
Filing Dt:
11/16/2004
Publication #:
US20060106863
Pub Dt:
05/18/2006
Title:
SYSTEM AND/OR METHOD FOR IMPLEMENTING EFFICIENT TECHNIQUES FOR TESTING COMMON INFORMATION MODEL PROVIDERS
43
Patent #:
7207026
Issue Dt:
04/17/2007
Application #:
10990237
Filing Dt:
11/16/2004
Publication #:
US20060104145
Pub Dt:
05/18/2006
Title:
MEMORY TILING ARCHITECTURE
44
Patent #:
7155688
Issue Dt:
12/26/2006
Application #:
10990589
Filing Dt:
11/17/2004
Publication #:
US20060107247
Pub Dt:
05/18/2006
Title:
MEMORY GENERATION AND PLACEMENT
45
Patent #:
7396760
Issue Dt:
07/08/2008
Application #:
10991107
Filing Dt:
11/17/2004
Publication #:
US20060105564
Pub Dt:
05/18/2006
Title:
METHOD AND SYSTEM FOR REDUCING INTER-LAYER CAPACITANCE IN INTEGRATED CIRCUITS
46
Patent #:
7574353
Issue Dt:
08/11/2009
Application #:
10991844
Filing Dt:
11/18/2004
Publication #:
US20060106598
Pub Dt:
05/18/2006
Title:
TRANSMIT/RECEIVE DATA PATHS FOR VOICE-OVER-INTERNET (VOIP) COMMUNICATION SYSTEMS
47
Patent #:
7346742
Issue Dt:
03/18/2008
Application #:
10991903
Filing Dt:
11/18/2004
Publication #:
US20060107022
Pub Dt:
05/18/2006
Title:
METHODS AND STRUCTURE FOR BYPASSING MEMORY MANAGEMENT MAPPING AND TRANSLATION FEATURES
48
Patent #:
7305601
Issue Dt:
12/04/2007
Application #:
10992389
Filing Dt:
11/17/2004
Publication #:
US20060123294
Pub Dt:
06/08/2006
Title:
METHOD AND TEST APPARATUS FOR TESTING INTEGRATED CIRCUITS USING BOTH VALID AND INVALID TEST DATA
49
Patent #:
7146591
Issue Dt:
12/05/2006
Application #:
10992941
Filing Dt:
11/19/2004
Publication #:
US20060112361
Pub Dt:
05/25/2006
Title:
METHOD OF SELECTING CELLS IN LOGIC RESTRUCTURING
50
Patent #:
7257791
Issue Dt:
08/14/2007
Application #:
10992999
Filing Dt:
11/19/2004
Publication #:
US20060112363
Pub Dt:
05/25/2006
Title:
MULTIPLE BUFFER INSERTION IN GLOBAL ROUTING
51
Patent #:
7370139
Issue Dt:
05/06/2008
Application #:
10993283
Filing Dt:
11/19/2004
Publication #:
US20060112216
Pub Dt:
05/25/2006
Title:
METHODS AND STRUCTURES FOR EFFICIENT STORAGE OF TASK FILE INFORMATION IN SERIAL ATA ENVIRONMENTS
52
Patent #:
7189498
Issue Dt:
03/13/2007
Application #:
10993603
Filing Dt:
11/19/2004
Publication #:
US20050153246
Pub Dt:
07/14/2005
Title:
PROCESS AND APPARATUS FOR GENERATING A STRONG PHASE SHIFT OPTICAL PATTERN FOR USE IN AN OPTICAL DIRECT WRITE LITHOGRAPHY PROCESS
53
Patent #:
7213223
Issue Dt:
05/01/2007
Application #:
10994114
Filing Dt:
11/19/2004
Publication #:
US20060112158
Pub Dt:
05/25/2006
Title:
METHOD OF ESTIMATING A TOTAL PATH DELAY IN AN INTEGRATED CIRCUIT DESIGN WITH STOCHASTICALLY WEIGHTED CONSERVATISM
54
Patent #:
7434180
Issue Dt:
10/07/2008
Application #:
10995777
Filing Dt:
11/23/2004
Publication #:
US20060112376
Pub Dt:
05/25/2006
Title:
VIRTUAL DATA REPRESENTATION THROUGH SELECTIVE BIDIRECTIONAL TRANSLATION
55
Patent #:
7305634
Issue Dt:
12/04/2007
Application #:
10996074
Filing Dt:
11/23/2004
Publication #:
US20060109462
Pub Dt:
05/25/2006
Title:
METHOD TO SELECTIVELY IDENTIFY AT RISK DIE BASED ON LOCATION WITHIN THE RETICLE
56
Patent #:
7830964
Issue Dt:
11/09/2010
Application #:
10997006
Filing Dt:
11/24/2004
Publication #:
US20060109912
Pub Dt:
05/25/2006
Title:
METHOD AND/OR APPARATUS FOR PARSING COMPRESSED VIDEO BITSTREAMS
57
Patent #:
7315993
Issue Dt:
01/01/2008
Application #:
10999468
Filing Dt:
11/30/2004
Publication #:
US20060117281
Pub Dt:
06/01/2006
Title:
VERIFICATION OF RRAM TILING NETLIST
58
Patent #:
7283385
Issue Dt:
10/16/2007
Application #:
10999481
Filing Dt:
11/30/2004
Publication #:
US20060136775
Pub Dt:
06/22/2006
Title:
RRAM COMMUNICATION SYSTEM
59
Patent #:
7216278
Issue Dt:
05/08/2007
Application #:
10999493
Filing Dt:
11/30/2004
Publication #:
US20060156088
Pub Dt:
07/13/2006
Title:
METHOD AND BIST ARCHITECTURE FOR FAST MEMORY TESTING IN PLATFORM-BASED INTEGRATED CIRCUIT
60
Patent #:
7308633
Issue Dt:
12/11/2007
Application #:
10999720
Filing Dt:
11/30/2004
Publication #:
US20060129874
Pub Dt:
06/15/2006
Title:
MASTER CONTROLLER ARCHITECTURE
61
Patent #:
7630565
Issue Dt:
12/08/2009
Application #:
10999825
Filing Dt:
11/30/2004
Publication #:
US20060114985
Pub Dt:
06/01/2006
Title:
PARALLEL VIDEO ENCODER WITH WHOLE PICTURE DEBLOCKING AND/OR WHOLE PICTURE COMPRESSED AS A SINGLE SLICE
62
Patent #:
7200826
Issue Dt:
04/03/2007
Application #:
11000104
Filing Dt:
11/30/2004
Publication #:
US20060117284
Pub Dt:
06/01/2006
Title:
RRAM MEMORY TIMING LEARNING TOOL
63
Patent #:
7095483
Issue Dt:
08/22/2006
Application #:
11000772
Filing Dt:
12/01/2004
Publication #:
US20050078289
Pub Dt:
04/14/2005
Title:
PROCESS INDEPENDENT ALIGNMENT MARKS
64
Patent #:
7493577
Issue Dt:
02/17/2009
Application #:
11002576
Filing Dt:
12/01/2004
Publication #:
US20060117292
Pub Dt:
06/01/2006
Title:
AUTOMATIC RECOGNITION OF GEOMETRIC POINTS IN A TARGET IC DESIGN FOR OPC MASK QUALITY CALCULATION
65
Patent #:
7424696
Issue Dt:
09/09/2008
Application #:
11003309
Filing Dt:
12/03/2004
Publication #:
US20060123376
Pub Dt:
06/08/2006
Title:
POWER MESH FOR MULTIPLE FREQUENCY OPERATION OF SEMICONDUCTOR PRODUCTS
66
Patent #:
7246336
Issue Dt:
07/17/2007
Application #:
11004309
Filing Dt:
12/03/2004
Publication #:
US20060123369
Pub Dt:
06/08/2006
Title:
RAMPTIME PROPAGATION ON DESIGNS WITH CYCLES
67
Patent #:
7321254
Issue Dt:
01/22/2008
Application #:
11004415
Filing Dt:
12/03/2004
Publication #:
US20060119420
Pub Dt:
06/08/2006
Title:
ON-CHIP AUTOMATIC PROCESS VARIATION, SUPPLY VOLTAGE VARIATION, AND TEMPERATURE DEVIATION (PVT) COMPENSATION METHOD
68
Patent #:
7424690
Issue Dt:
09/09/2008
Application #:
11005690
Filing Dt:
12/07/2004
Publication #:
US20060123377
Pub Dt:
06/08/2006
Title:
INTERCONNECT INTEGRITY VERIFICATION
69
Patent #:
7242074
Issue Dt:
07/10/2007
Application #:
11005765
Filing Dt:
12/06/2004
Publication #:
US20060118908
Pub Dt:
06/08/2006
Title:
REDUCED CAPACITANCE RESISTORS
70
Patent #:
7373626
Issue Dt:
05/13/2008
Application #:
11006349
Filing Dt:
12/06/2004
Publication #:
US20060123281
Pub Dt:
06/08/2006
Title:
METHOD AND TIMING HARNESS FOR SYSTEM LEVEL STATIC TIMING ANALYSIS
71
Patent #:
7420616
Issue Dt:
09/02/2008
Application #:
11006479
Filing Dt:
12/07/2004
Publication #:
US20080007613
Pub Dt:
01/10/2008
Title:
VIDEO ENCODER WITH REPEAT FIELD TO REPEAT FRAME CONVERSION
72
Patent #:
7246337
Issue Dt:
07/17/2007
Application #:
11007039
Filing Dt:
12/08/2004
Publication #:
US20060123373
Pub Dt:
06/08/2006
Title:
DENSITY DRIVEN LAYOUT FOR RRAM CONFIGURATION MODULE
73
Patent #:
7619272
Issue Dt:
11/17/2009
Application #:
11007392
Filing Dt:
12/07/2004
Publication #:
US20060118919
Pub Dt:
06/08/2006
Title:
BI-AXIAL TEXTURING OF HIGH-K DIELECTRIC FILMS TO REDUCE LEAKAGE CURRENTS
74
Patent #:
7285145
Issue Dt:
10/23/2007
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Title:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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Assignor
1
LSI CORPORATION
Exec Dt:
08/14/2014
Assignee
1
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
1 YISHUN AVENUE 7
SINGAPORE, SINGAPORE 768923
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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