skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:035390/0388   Pages: 247
Recorded: 04/03/2015
Attorney Dkt #:040981-0072
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5804
Page 8 of 59
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
1
Patent #:
Issue Dt:
08/31/1999
Application #:
08942991
Filing Dt:
10/02/1997
Title:
USE OF ABRASIVE TAPE CONVEYING ASSEMBLIES FOR CONDITIONING POLISHING PADS
2
Patent #:
Issue Dt:
04/27/1999
Application #:
08943371
Filing Dt:
10/03/1997
Title:
ON-CHIP MISALIGNMENT INDICATION
3
Patent #:
Issue Dt:
04/25/2000
Application #:
08944247
Filing Dt:
10/06/1997
Title:
METHOD AND APPARATUS FOR AGITATING AN ETCHANT
4
Patent #:
Issue Dt:
08/22/2000
Application #:
08947271
Filing Dt:
10/08/1997
Title:
DOMINO SCAN ARCHITECTURE AND DOMINO SCAN FLIP-FLOP FOR THE TESTING OF DOMINO AND HYBRID CMOS CIRCUITS
5
Patent #:
Issue Dt:
09/14/1999
Application #:
08947742
Filing Dt:
10/09/1997
Title:
PROCESS FOR FORMING SELF-ALIGNED METAL SILICIDE CONTACTS FOR MOS STRUCTURE USING SINGLE SILICIDE-FORMING STEP
6
Patent #:
Issue Dt:
11/09/1999
Application #:
08948920
Filing Dt:
10/10/1997
Title:
RECONFIGURABLE BUILT-IN SELF TEST CIRCUIT
7
Patent #:
Issue Dt:
08/24/1999
Application #:
08949737
Filing Dt:
10/14/1997
Title:
METHOD TO CHECK FOR BURST LIMITING IN ERROR CORRECTING SYSTEMS
8
Patent #:
Issue Dt:
10/26/1999
Application #:
08949738
Filing Dt:
10/14/1997
Title:
HIGH-SPEED CHIEN SEARCH LOGIC
9
Patent #:
Issue Dt:
11/20/2001
Application #:
08949875
Filing Dt:
10/14/1997
Publication #:
Pub Dt:
11/15/2001
Title:
RECORDABLE DVD DISK WITH VIDEO COMPRESSION SOFTWARE INCLUDED IN A READ-ONLY SECTOR
10
Patent #:
Issue Dt:
01/01/2002
Application #:
08950379
Filing Dt:
10/14/1997
Title:
MOTION ESTIMATION ENGINE
11
Patent #:
Issue Dt:
05/09/2000
Application #:
08951530
Filing Dt:
10/16/1997
Title:
SYSTEM FOR SENDING DATA FROM-AND-TO A COMPUTER MONITOR USING A HIGH SPEED SERIAL LINE
12
Patent #:
Issue Dt:
07/04/2000
Application #:
08951896
Filing Dt:
10/16/1997
Title:
ENHANCED RECEIVING CHIP FOR A COMPUTER MONITOR
13
Patent #:
Issue Dt:
12/14/1999
Application #:
08953184
Filing Dt:
10/17/1997
Title:
ESD PROTECTION FOR HIGH VOLTAGE LEVEL INPUT FOR ANALOG APPLICATION
14
Patent #:
Issue Dt:
08/01/2000
Application #:
08954006
Filing Dt:
10/20/1997
Title:
METHOD FOR IMPROVED GATE OXIDE INTEGRITY ON BULK SILICON
15
Patent #:
Issue Dt:
04/13/1999
Application #:
08954791
Filing Dt:
10/21/1997
Title:
APPARATUS FOR RAPID THERMAL PROCESSING OF A WAFER
16
Patent #:
Issue Dt:
04/27/1999
Application #:
08955384
Filing Dt:
10/21/1997
Title:
METHOD OF FORMING A LAYER AND SEMICONDUCTOR SUBSTRATE
17
Patent #:
Issue Dt:
10/26/1999
Application #:
08955929
Filing Dt:
10/22/1997
Title:
SEMICONDUCTOR DEVICE AND FABRICATION METHOD WHICH ADVANTAGEOUSLY COMBINE WIRE BONDING AND TAB TECHNIQUES TO INCREASE INTEGRATED CIRCUIT I/O PAD DENSITY
18
Patent #:
Issue Dt:
10/24/2000
Application #:
08956874
Filing Dt:
10/23/1997
Title:
SYSTEM AND METHOD FOR REPRESENTING A SYSTEM LEVEL RTL DESIGN USING HDL INDEPENDENT OBJECTS AND TRANSLATION TO SYNTHESIZABLE RTL CODE
19
Patent #:
Issue Dt:
01/25/2000
Application #:
08957692
Filing Dt:
10/24/1997
Title:
NITROGEN IMPLANTED POLYSILICON GATE FOR MOSFET GATE OXIDE HARDENING
20
Patent #:
Issue Dt:
09/21/1999
Application #:
08958775
Filing Dt:
10/27/1997
Title:
BUILT IN SELF REPAIR FOR DRAMS USING ON-CHIP TEMPERATURE SENSING AND HEATING
21
Patent #:
Issue Dt:
12/07/1999
Application #:
08958776
Filing Dt:
10/27/1997
Title:
VACUUM ASSISTED UNDERFILL PROCESS AND APPARATUS FOR SEMICONDUCTOR PACKAGE FABRICATION
22
Patent #:
Issue Dt:
10/05/1999
Application #:
08960925
Filing Dt:
10/30/1997
Title:
SHIMMING SUBSTRATE HOLDER ASSEMBLIES TO PRODUCE MORE UNIFORMLY POLISHED SUBSTRATE SURFACES
23
Patent #:
Issue Dt:
09/28/1999
Application #:
08960969
Filing Dt:
10/30/1997
Title:
CONDITIONING CMP POLISHING PAD USING A HIGH PRESSURE FLUID
24
Patent #:
Issue Dt:
06/20/2000
Application #:
08961150
Filing Dt:
10/30/1997
Title:
BI-DIRECTIONAL ASYNCHRONOUS TRANSFER SCHEME USING A SINGLE HANDSHAKE
25
Patent #:
Issue Dt:
08/08/2000
Application #:
08961163
Filing Dt:
10/30/1997
Title:
AUTOMATIC RANGING APPARATUS AND METHOD FOR PRECISE INTEGRATED CIRCUIT CURRENT MEASUREMENTS
26
Patent #:
Issue Dt:
06/27/2000
Application #:
08961206
Filing Dt:
10/30/1997
Title:
ASYNCHRONOUS TRANSFER SCHEME USING MULTIPLE CHANNELS
27
Patent #:
Issue Dt:
06/13/2000
Application #:
08961382
Filing Dt:
10/30/1997
Title:
MODIFIED CARRIER FILMS TO PRODUCE MORE UNIFORMLY POLISHED SUBSTRATE SURFACES
28
Patent #:
Issue Dt:
08/22/2000
Application #:
08961383
Filing Dt:
10/30/1997
Title:
EFFECTIVE PAD CONDITIONING
29
Patent #:
Issue Dt:
03/21/2000
Application #:
08962890
Filing Dt:
11/14/1997
Title:
DATA SAMPLING AND RECOVER IN A PHASE-LOCKED LOOP (PLL)
30
Patent #:
Issue Dt:
09/12/2000
Application #:
08963553
Filing Dt:
11/03/1997
Title:
SEMICONDUCTOR DIE METAL LAYOUT FOR FLIP CHIP PACKAGING
31
Patent #:
Issue Dt:
10/26/1999
Application #:
08963813
Filing Dt:
11/04/1997
Title:
"SEMICONDUCTOR DEVICE AND FABRICATION METHOD EMPLOYING A PALLADIUM -PLATED HEAT SPREADER SUBSTRATE"
32
Patent #:
Issue Dt:
12/07/1999
Application #:
08964784
Filing Dt:
11/05/1997
Title:
PARALLEL PROCESSING OF INTEGRATED CIRCUIT PIN ARRIVAL TIMES
33
Patent #:
Issue Dt:
09/18/2001
Application #:
08964997
Filing Dt:
11/05/1997
Publication #:
Pub Dt:
09/06/2001
Title:
MODIFYING TIMING GRAPH TO AVOID GIVEN SET OF PATHS
34
Patent #:
Issue Dt:
09/28/1999
Application #:
08965127
Filing Dt:
11/06/1997
Title:
ANALOGUE TO DIGITAL CONVERTER WITH ADAPTIVE SAMPLE TIMING BASED ON STATISTICS OF SAMPLE VALUES
35
Patent #:
Issue Dt:
02/22/2000
Application #:
08965128
Filing Dt:
11/06/1997
Title:
DIFFERENTIAL OUTPUT CIRCUIT
36
Patent #:
Issue Dt:
03/07/2000
Application #:
08965129
Filing Dt:
11/06/1997
Title:
DRIVER CIRCUITS
37
Patent #:
Issue Dt:
02/22/2000
Application #:
08966637
Filing Dt:
11/10/1997
Title:
PLASMA-ENHANCED OXIDE PROCESS OPTIMIZATION AND MATERIAL AND APPARATUS THEREFOR
38
Patent #:
Issue Dt:
01/30/2001
Application #:
08967150
Filing Dt:
11/10/1997
Title:
RESISTOR MIRROR
39
Patent #:
Issue Dt:
07/21/1998
Application #:
08967267
Filing Dt:
11/07/1997
Title:
A PIPELINED CPU WITH INSTRUCTION FETCH EXECUTION AND WRITE BACK STAGES
40
Patent #:
Issue Dt:
12/26/2000
Application #:
08967545
Filing Dt:
11/12/1997
Title:
INTEGRATED CIRCUIT HAVING EMBEDDED MEMORY WITH ELECTROMAGNETIC SHIELD
41
Patent #:
Issue Dt:
12/29/1998
Application #:
08969100
Filing Dt:
11/13/1997
Title:
DUAL-LOOP PHASE-LOCKED LOOP
42
Patent #:
Issue Dt:
04/25/2000
Application #:
08969275
Filing Dt:
11/13/1997
Title:
DUAL-LOOP PLL WITH ADAPTIVE TIME CONSTANT REDUCTION ON FIRST LOOP
43
Patent #:
Issue Dt:
09/18/2001
Application #:
08969401
Filing Dt:
11/13/1997
Title:
FREQUENCY DECODER DATABANK FOR PHASE-LOCKED LOOP
44
Patent #:
Issue Dt:
11/09/1999
Application #:
08971428
Filing Dt:
11/17/1997
Title:
SIGNAL PROCESSING SCHEME UTILIZING OVERSAMPLED SWITCHED CAPACITOR FILTER
45
Patent #:
Issue Dt:
11/30/1999
Application #:
08971769
Filing Dt:
11/17/1997
Title:
METHOD AND APPARATUS FOR MAKING ELECTRICAL INTERCONNECTIONS BETWEEN LAYERS OF AN IC PACKAGE
46
Patent #:
Issue Dt:
11/02/1999
Application #:
08972231
Filing Dt:
11/18/1997
Title:
TESTING ESD PROTECTION SCHEMES IN SEMICONDUCTOR INTEGRATED CIRCUITS
47
Patent #:
Issue Dt:
04/03/2001
Application #:
08974846
Filing Dt:
11/20/1997
Title:
IDDQ TEST SOLUTION FOR LARGE ASICS
48
Patent #:
Issue Dt:
09/12/2000
Application #:
08975025
Filing Dt:
11/20/1997
Title:
REMOVAL OF A HEAT SPREADER FROM AN INTEGRATED CIRCUIT PACKAGE TO PERMIT TESTING OF THE INTEGRATED CIRCUIT AND OTHER ELEMENTS OF THE PACKAGE
49
Patent #:
Issue Dt:
11/30/1999
Application #:
08976033
Filing Dt:
11/21/1997
Title:
METHOD AND COMPOSITION FOR REDUCING GATE OXIDE DAMAGE DURING RF SPUTTER CLEAN
50
Patent #:
Issue Dt:
03/28/2000
Application #:
08978979
Filing Dt:
11/26/1997
Title:
IMPROVED ELECTRO-STATIC DISCHARGE PROTECTION OF CMOS INTEGRATED CIRCUITS
51
Patent #:
Issue Dt:
03/21/2000
Application #:
08982263
Filing Dt:
12/01/1997
Title:
N-PORT ALGORITHM FOR DISABLING A NODE WITH A NETWORK DURING RESET
52
Patent #:
Issue Dt:
08/10/1999
Application #:
08984003
Filing Dt:
12/03/1997
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT CORE PROBING FOR FAILURE ANALYSIS
53
Patent #:
Issue Dt:
01/04/2000
Application #:
08984447
Filing Dt:
12/03/1997
Title:
SYSTEM FOR VERIFYING THE EFFECTIVENESS OF A RAM BIST CONTROLLER'S ABILITY TO DETECT FAULTS IN A RAM MEMORY USING STATES INDICATING BY FAULT SEVERITY INFORMATION
54
Patent #:
Issue Dt:
08/01/2000
Application #:
08986537
Filing Dt:
12/08/1997
Title:
PROBE POINTS AND MARKERS FOR CRITCAL PATHS AND INTEGRATED CIRCUITS
55
Patent #:
Issue Dt:
11/17/1998
Application #:
08986753
Filing Dt:
12/08/1997
Title:
PHYSICAL DESIGN AUTOMATION SYSTEM AND METHOD USING MONOTONICALLY IMPROVING LINEAR CLUSTERIZATION
56
Patent #:
Issue Dt:
10/09/2001
Application #:
08987495
Filing Dt:
12/09/1997
Title:
COMPRESSED VIDEO EDITOR WITH TRANSITION BUFFER MATCHER
57
Patent #:
Issue Dt:
11/23/1999
Application #:
08987858
Filing Dt:
12/09/1997
Title:
NOVEL DEVICE FOR POLE SPLITTING IN AMPLIFIERS
58
Patent #:
Issue Dt:
05/09/2000
Application #:
08990315
Filing Dt:
12/15/1997
Title:
PROCESS FOR ABRASIVE REMOVAL OF COPPER FROM THE BACK SURFACE OF A SILICON SUBSTRATE
59
Patent #:
Issue Dt:
12/19/2000
Application #:
08991397
Filing Dt:
12/16/1997
Title:
METHOD OF FORMING THIN POLYGATES FOR SUB QUARTER MICRON CMOS PROCESS
60
Patent #:
Issue Dt:
10/17/2000
Application #:
08991419
Filing Dt:
12/16/1997
Title:
PHYSICAL DESIGN AUTOMATION SYSTEM AND PROCESS FOR DESIGNING INTEGRATED CIRCUIT CHIPS USING MULTIWAY PARTITIONING WITH CONSTRAINTS
61
Patent #:
Issue Dt:
01/22/2002
Application #:
08991715
Filing Dt:
12/16/1997
Publication #:
Pub Dt:
11/22/2001
Title:
SERIAL DATA TRANSCEIVER INCLUDING ELEMENTS WHICH FACILITATE FUNCTIONAL TESTING REQUIRING ACCESS TO ONLY THE SERIAL DATA PORTS, AND AN ASSOCIATED TEST METHOD
62
Patent #:
Issue Dt:
07/31/2001
Application #:
08991785
Filing Dt:
12/12/1997
Title:
OPTICAL PROXIMITY CORRECTION METHOD AND APPARATUS
63
Patent #:
Issue Dt:
03/27/2001
Application #:
08991906
Filing Dt:
12/16/1997
Title:
APPARATUS AND METHOD FOR TESTING THE ABILITY OF A PAIR OF SERIAL DATA TRANSCEIVERS TO TRANSMIT SERIAL DATA AT ONE FREQUENCY AND TO RECEIVE SERIAL DATA AT ANOTHER FREQUENCY
64
Patent #:
Issue Dt:
01/04/2000
Application #:
08994139
Filing Dt:
12/19/1997
Title:
DYNAMICALLY VARIABLE LENGTH CPU PIPELINE FOR EFFICIENTLY EXECUTING TWO INSTRUCTION SETS
65
Patent #:
Issue Dt:
10/17/2000
Application #:
08994430
Filing Dt:
12/19/1997
Title:
PERIPHERAL PARTITIONING AND TREE DECOMPOSITION FOR PARTIAL SCAN
66
Patent #:
Issue Dt:
07/04/2000
Application #:
08994634
Filing Dt:
12/19/1997
Title:
METHOD AND APPARATUS FOR SYNCHRONIZATION OF CODE IN REDUNDANT CONTROLLERS IN A SWAPPABLE ENVIRONMENT
67
Patent #:
Issue Dt:
08/15/2000
Application #:
08995213
Filing Dt:
12/19/1997
Title:
METHOD FOR MAPPING IN DYNAMICALLY ADDRESSED STORAGE SUBSYSTEMS
68
Patent #:
Issue Dt:
05/23/2000
Application #:
08995260
Filing Dt:
12/19/1997
Title:
APPARATUS AND METHOD FOR ELECTRICAL DETERMINATION OF DELAMINATION AT ONE OR MORE INTERFACES WITHIN A SEMICONDUCTOR WAFER
69
Patent #:
Issue Dt:
04/17/2001
Application #:
08995875
Filing Dt:
12/22/1997
Title:
SILICIDE ENCAPSULATION OF POLYSILICON GATE AND INTERCONNECT
70
Patent #:
Issue Dt:
05/15/2001
Application #:
08995950
Filing Dt:
12/22/1997
Title:
BANDWIDTH OPTIMIZATION CACHE
71
Patent #:
Issue Dt:
12/07/1999
Application #:
08996528
Filing Dt:
12/23/1997
Title:
METHOD AND APPARATUS FOR SYNCHRONIZING DATA TRANSFER
72
Patent #:
Issue Dt:
03/07/2000
Application #:
08996730
Filing Dt:
12/23/1997
Title:
METHOD AND APPARATUS FOR SYNCHRONIZING DATA TRANSFER
73
Patent #:
Issue Dt:
12/26/2000
Application #:
08996970
Filing Dt:
12/23/1997
Title:
USING MULTIPLE HIGH SPEED SERIAL LINES TO TRANSMIT HIGH DATA RATES WHILE COMPENSATING FOR OVERALL SKEW
74
Patent #:
Issue Dt:
05/04/1999
Application #:
08997242
Filing Dt:
12/23/1997
Title:
REPROGRAMMABLE ADDRESS SELECTOR FOR AN EMBEDDED DRAM
75
Patent #:
Issue Dt:
04/20/1999
Application #:
08997366
Filing Dt:
12/23/1997
Title:
REPROGRAMMABLE ADDRESSING PROCESS FOR EMBEDDED DRAM
76
Patent #:
Issue Dt:
05/25/1999
Application #:
08997503
Filing Dt:
12/23/1997
Title:
ELECTRICALLY SELECTABLE REDUNDANT COMPONENTS FOR AN EMBEDDED DRAM
77
Patent #:
Issue Dt:
09/05/2000
Application #:
08997906
Filing Dt:
12/24/1997
Title:
INFORMATION STORAGE SYSTEMS UTILIZING MEDIA WITH OPTICALLY-DIFFERENTIATED DATA SITES
78
Patent #:
Issue Dt:
10/12/1999
Application #:
08998924
Filing Dt:
07/11/1997
Title:
VOCAL PITCH CORRECTOR
79
Patent #:
Issue Dt:
10/17/2000
Application #:
08999160
Filing Dt:
12/30/1997
Title:
AUTOMATED MULTI-TRACK TRANSFERS
80
Patent #:
Issue Dt:
04/27/2004
Application #:
09000532
Filing Dt:
12/30/1997
Title:
XOR CIRCUIT
81
Patent #:
Issue Dt:
08/06/2002
Application #:
09000582
Filing Dt:
12/30/1997
Title:
METHOD AND APPARATUS FOR STREAMING DATA IN A DATA PROCESSING SYSTEM
82
Patent #:
Issue Dt:
08/15/2000
Application #:
09000681
Filing Dt:
12/30/1997
Title:
HOST ADAPTER DMA CONTROLLER WITH AUTOMATED HOST REPLY CAPABILITY
83
Patent #:
Issue Dt:
04/11/2000
Application #:
09000688
Filing Dt:
12/30/1997
Title:
DRIVE MECHANISM FOR ROTATING STORAGE MEDIA
84
Patent #:
Issue Dt:
11/02/1999
Application #:
09000738
Filing Dt:
12/30/1997
Title:
METHOD AND APPARATUS FOR TRANSFERRING DATA ON A VOLTAGE BIASED DATA LINE
85
Patent #:
Issue Dt:
08/22/2000
Application #:
09001062
Filing Dt:
12/30/1997
Title:
DUAL OUTPUT COMPARATOR FOR OPERATING OVER A WIDE COMMON MODE RANGE
86
Patent #:
Issue Dt:
07/04/2000
Application #:
09001097
Filing Dt:
12/30/1997
Title:
ADJUSTABLE BIASING VOLTAGE FOR A BUS LINE AND ASSOCIATED METHOD
87
Patent #:
Issue Dt:
08/22/2000
Application #:
09001393
Filing Dt:
12/31/1997
Title:
LOW BANDWIDTH, TWO-CANDIDATE MOTION ESTIMATION FOR INTERLACED VIDEO
88
Patent #:
Issue Dt:
06/27/2000
Application #:
09004748
Filing Dt:
01/08/1998
Title:
METHOD AND APPARATUS FOR FAST DECODING OF A REED-SOLOMON CODE
89
Patent #:
Issue Dt:
08/03/1999
Application #:
09005056
Filing Dt:
01/09/1998
Title:
VIEWING ENTITY RELATIONSHIP DIAGRAMS USING HYPERLINKS
90
Patent #:
Issue Dt:
03/11/2003
Application #:
09005364
Filing Dt:
01/09/1998
Title:
METHOD AND APPARATUS FOR USING ACROSS WAFER BACK PRESSURE DIFFERENTIALS TO INFLUENCE THE PERFORMANCE OF CHEMICAL MECHANICAL POLISHING
91
Patent #:
Issue Dt:
08/29/2000
Application #:
09005491
Filing Dt:
01/12/1998
Title:
AN INTEGRATED CIRCUIT PACKAGE HAVING A STIFFENER DIMENSIONED TO RECEIVE HEAT TRANSFERRED LATERALLY FROM THE INTEGRATED CIRCUIT
92
Patent #:
Issue Dt:
09/05/2000
Application #:
09006760
Filing Dt:
01/14/1998
Title:
REPEAT FIELD DETECTION USING CHECKERBOARD PATTERN
93
Patent #:
Issue Dt:
10/26/1999
Application #:
09006761
Filing Dt:
01/14/1998
Title:
VIDEO SYNCHRONIZATION
94
Patent #:
Issue Dt:
03/21/2000
Application #:
09006784
Filing Dt:
01/14/1998
Title:
MULTIPLE SIZED DIE
95
Patent #:
Issue Dt:
10/17/2000
Application #:
09006918
Filing Dt:
01/13/1998
Title:
FORMATION OF HIGH-VOLTAGE AND LOW-VOLTAGE DEVICES ON A SEMICONDUCTOR SUBSTRATE
96
Patent #:
Issue Dt:
02/13/2001
Application #:
09007242
Filing Dt:
01/14/1998
Title:
IMPROVED METHOD OF SELECTING AND SYNTHESIZING METAL INTERCONNECT WIRES IN INTEGRATED CIRCUITS
97
Patent #:
Issue Dt:
09/05/2000
Application #:
09007258
Filing Dt:
01/14/1998
Title:
LAYOUT ARCHITECTURE FOR CORE I/O BUFFER
98
Patent #:
Issue Dt:
05/30/2000
Application #:
09007407
Filing Dt:
01/15/1998
Title:
DYNAMIC LOGIC ELEMENT HAVING NON-INVASIVE SCAN CHAIN INSERTION
99
Patent #:
Issue Dt:
12/18/2001
Application #:
09007490
Filing Dt:
01/15/1998
Title:
SERIAL DATA TRANSCEIVER ARCHITECTURE AND TEST METHOD FOR MEASURING THE AMOUNT OF JITTER WITHIN A SERIAL DATA STREAM
100
Patent #:
Issue Dt:
03/28/2000
Application #:
09007912
Filing Dt:
01/16/1998
Title:
SYSTEM AND METHOD FOR PC-RELATIVE ADDRESS GENERATION IN A MICROPROCESSOR WITH A PIPELINE ARCHITECTURE
Assignor
1
Exec Dt:
08/14/2014
Assignee
1
1 YISHUN AVENUE 7
SINGAPORE, SINGAPORE 768923
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

Search Results as of: 05/14/2024 12:09 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT