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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:035508/0113   Pages: 23
Recorded: 04/27/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 144
Page 1 of 2
Pages: 1 2
1
Patent #:
Issue Dt:
08/04/2009
Application #:
11261873
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/03/2007
Title:
INTEGRATED CIRCUIT USING COMPLEMENTARY JUNCTION FIELD EFFECT TRANSISTOR AND MOS TRANSISTOR IN SILICON AND SILICON ALLOYS
2
Patent #:
Issue Dt:
07/14/2009
Application #:
11450112
Filing Dt:
06/09/2006
Publication #:
Pub Dt:
12/13/2007
Title:
SELF ALIGNED GATE JFET STRUCTURE AND METHOD
3
Patent #:
Issue Dt:
01/05/2010
Application #:
11451886
Filing Dt:
06/12/2006
Publication #:
Pub Dt:
12/13/2007
Title:
SCALABLE PROCESS AND STRUCTURE FOR JFET FOR SMALL AND DECREASING LINE WIDTHS
4
Patent #:
Issue Dt:
09/22/2009
Application #:
11452442
Filing Dt:
06/13/2006
Publication #:
Pub Dt:
11/15/2007
Title:
CIRCUIT CONFIGURATIONS HAVING FOUR TERMINAL JFET DEVICES
5
Patent #:
Issue Dt:
12/15/2009
Application #:
11484402
Filing Dt:
07/11/2006
Publication #:
Pub Dt:
01/17/2008
Title:
OXIDE ISOLATED METAL SILICON-GATE JFET
6
Patent #:
Issue Dt:
01/12/2010
Application #:
11495908
Filing Dt:
07/28/2006
Publication #:
Pub Dt:
11/15/2007
Title:
LEVEL SHIFTING CIRCUIT HAVING JUNCTION FIELD EFFECT TRANSISTORS
7
Patent #:
Issue Dt:
07/07/2009
Application #:
11502172
Filing Dt:
08/10/2006
Publication #:
Pub Dt:
02/14/2008
Title:
JFET WITH BUILT IN BACK GATE IN EITHER SOI OR BULK SILICON
8
Patent #:
Issue Dt:
06/29/2010
Application #:
11515252
Filing Dt:
09/01/2006
Publication #:
Pub Dt:
02/21/2008
Title:
JUNCTION FIELD EFFECT TRANSISTOR INPUT BUFFER LEVEL SHIFTING CIRCUIT
9
Patent #:
Issue Dt:
04/28/2009
Application #:
11590265
Filing Dt:
10/31/2006
Publication #:
Pub Dt:
05/01/2008
Title:
SEMICONDUCTOR DEVICE, DESIGN METHOD AND STRUCTURE
10
Patent #:
Issue Dt:
01/06/2009
Application #:
11635004
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
06/07/2007
Title:
METHOD OF PRODUCING AND OPERATING A LOW POWER JUNCTION FIELD EFFECT TRANSISTOR
11
Patent #:
Issue Dt:
04/06/2010
Application #:
11693441
Filing Dt:
03/29/2007
Publication #:
Pub Dt:
10/02/2008
Title:
SYSTEM AND METHOD FOR DETECTING MULTIPLE MATCHES
12
Patent #:
Issue Dt:
01/12/2010
Application #:
11743973
Filing Dt:
05/03/2007
Publication #:
Pub Dt:
11/06/2008
Title:
TRANSISTOR PROVIDING DIFFERENT THRESHOLD VOLTAGES AND METHOD OF FABRICATION THEREOF
13
Patent #:
Issue Dt:
04/28/2009
Application #:
11744080
Filing Dt:
05/03/2007
Publication #:
Pub Dt:
11/06/2008
Title:
JFET DEVICE WITH IMPROVED OFF-STATE LEAKAGE CURRENT AND METHOD OF FABRICATION
14
Patent #:
Issue Dt:
04/28/2009
Application #:
11744120
Filing Dt:
05/03/2007
Publication #:
Pub Dt:
11/06/2008
Title:
JFET DEVICE WITH VIRTUAL SOURCE AND DRAIN LINK REGIONS AND METHOD OF FABRICATION
15
Patent #:
Issue Dt:
11/18/2008
Application #:
11744617
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
METHOD FOR APPLYING A STRESS LAYER TO A SEMICONDUCTOR DEVICE AND DEVICE FORMED THEREFROM
16
Patent #:
Issue Dt:
05/12/2009
Application #:
11744660
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
SEMICONDUCTOR DEVICE HAVING STRAIN-INDUCING SUBSTRATE AND FABRICATION METHODS THEREOF
17
Patent #:
Issue Dt:
06/01/2010
Application #:
11799305
Filing Dt:
05/01/2007
Publication #:
Pub Dt:
11/06/2008
Title:
CONTENT ADDRESSABLE MEMORY CELL INCLUDING A JUNCTION FIELD EFFECT TRANSISTOR
18
Patent #:
Issue Dt:
06/01/2010
Application #:
11799571
Filing Dt:
05/01/2007
Publication #:
Pub Dt:
11/06/2008
Title:
IMAGE SENSING CELL, DEVICE, METHOD OF OPERATION, AND METHOD OF MANUFACTURE
19
Patent #:
Issue Dt:
04/06/2010
Application #:
11799572
Filing Dt:
05/01/2007
Publication #:
Pub Dt:
11/06/2008
Title:
SEMICONDUCTOR DEVICE STORAGE CELL STRUCTURE, METHOD OF OPERATION, AND METHOD OF MANUFACTURE
20
Patent #:
Issue Dt:
12/15/2009
Application #:
11804132
Filing Dt:
05/17/2007
Publication #:
Pub Dt:
11/20/2008
Title:
JUNCTION FIELD EFFECT DYNAMIC RANDOM ACCESS MEMORY CELL AND CONTENT ADDRESSABLE MEMORY CELL
21
Patent #:
Issue Dt:
03/16/2010
Application #:
11818388
Filing Dt:
06/14/2007
Publication #:
Pub Dt:
12/18/2008
Title:
SEMICONDUCTOR DEVICE INCLUDING A BIAS VOLTAGE GENERATOR
22
Patent #:
Issue Dt:
05/10/2011
Application #:
11824737
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
COMMON DATA LINE SIGNALING AND METHOD
23
Patent #:
Issue Dt:
12/08/2009
Application #:
11888977
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
02/05/2009
Title:
SWITCHING CIRCUITS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES
24
Patent #:
Issue Dt:
07/27/2010
Application #:
11903296
Filing Dt:
09/21/2007
Publication #:
Pub Dt:
04/03/2008
Title:
CIRCUIT AND METHOD FOR GENERATING ELECTRICAL SOLITONS WITH JUNCTION FIELD EFFECT TRANSISTORS
25
Patent #:
Issue Dt:
06/22/2010
Application #:
11958032
Filing Dt:
12/17/2007
Publication #:
Pub Dt:
06/18/2009
Title:
SWAPPED-BODY RAM ARCHITECTURE
26
Patent #:
Issue Dt:
03/30/2010
Application #:
11960452
Filing Dt:
12/19/2007
Publication #:
Pub Dt:
06/25/2009
Title:
SYSTEM AND METHOD FOR ROUTING CONNECTIONS
27
Patent #:
Issue Dt:
01/19/2010
Application #:
12033487
Filing Dt:
02/19/2008
Publication #:
Pub Dt:
08/20/2009
Title:
METHOD TO FABRICATE GATE ELECTRODES
28
Patent #:
Issue Dt:
07/05/2011
Application #:
12113118
Filing Dt:
04/30/2008
Publication #:
Pub Dt:
11/06/2008
Title:
DOUBLE GATE JFET WITH REDUCED AREA CONSUMPTION AND FABRICATION METHOD THEREFOR
29
Patent #:
Issue Dt:
08/10/2010
Application #:
12114183
Filing Dt:
05/02/2008
Publication #:
Pub Dt:
11/06/2008
Title:
SEMICONDUCTOR DEVICE HAVING A FIN STRUCTURE AND FABRICATION METHOD THEREOF
30
Patent #:
Issue Dt:
10/18/2011
Application #:
12115991
Filing Dt:
05/06/2008
Publication #:
Pub Dt:
11/12/2009
Title:
SYSTEM AND METHOD FOR ROUTING CONNECTIONS WITH IMPROVED INTERCONNECT THICKNESS
31
Patent #:
Issue Dt:
05/04/2010
Application #:
12156565
Filing Dt:
06/02/2008
Publication #:
Pub Dt:
12/03/2009
Title:
PROGRAMMABLE SWITCH CIRCUIT AND METHOD, METHOD OF MANUFACTURE, AND DEVICES AND SYSTEMS INCLUDING THE SAME
32
Patent #:
Issue Dt:
07/06/2010
Application #:
12171906
Filing Dt:
07/11/2008
Title:
VOLTAGE-LEVEL TRANSLATOR
33
Patent #:
Issue Dt:
06/22/2010
Application #:
12173405
Filing Dt:
07/15/2008
Title:
CURRENT-LIMITED OUTPUT BUFFER
34
Patent #:
Issue Dt:
10/20/2009
Application #:
12178291
Filing Dt:
07/23/2008
Title:
SEMICONDUCTOR DEVICE HAVING STRAIN-INDUCING SUBSTRATE AND FABRICATION METHODS THEREOF
35
Patent #:
Issue Dt:
05/04/2010
Application #:
12178404
Filing Dt:
07/23/2008
Title:
JFET DEVICE WITH IMPROVED OFF-STATE LEAKAGE CURRENT AND METHOD OF FABRICATION
36
Patent #:
Issue Dt:
08/10/2010
Application #:
12180158
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
JUNCTION FIELD EFFECT TRANSISTOR USING A SILICON ON INSULATOR ARCHITECTURE
37
Patent #:
Issue Dt:
10/11/2011
Application #:
12194651
Filing Dt:
08/20/2008
Publication #:
Pub Dt:
03/05/2009
Title:
DYNAMIC RANDOM ACCESS MEMORY HAVING JUNCTION FIELD EFFECT TRANSISTOR CELL ACCESS DEVICE
38
Patent #:
Issue Dt:
03/30/2010
Application #:
12195725
Filing Dt:
08/21/2008
Title:
LEVEL-SHIFTING CIRCUIT WITH BIPOLAR JUNCTION TRANSISTOR
39
Patent #:
Issue Dt:
03/30/2010
Application #:
12235164
Filing Dt:
09/22/2008
Publication #:
Pub Dt:
01/15/2009
Title:
SELF ALIGNED GATE JFET STRUCTURE AND METHOD
40
Patent #:
Issue Dt:
03/30/2010
Application #:
12263854
Filing Dt:
11/03/2008
Publication #:
Pub Dt:
03/05/2009
Title:
INTEGRATED CIRCUIT USING COMPLEMENTARY JUNCTION FIELD EFFECT TRANSISTOR AND MOS TRANSISTOR IN SILICON AND SILICON ALLOYS
41
Patent #:
Issue Dt:
01/12/2010
Application #:
12270964
Filing Dt:
11/14/2008
Publication #:
Pub Dt:
03/19/2009
Title:
JFET WITH BUILT IN BACK GATE IN EITHER SOI OR BULK SILICON
42
Patent #:
Issue Dt:
05/11/2010
Application #:
12276574
Filing Dt:
11/24/2008
Publication #:
Pub Dt:
06/04/2009
Title:
METHOD OF FORMING AN OXIDE ISOLATED METAL SILICON-GATE JFET
43
Patent #:
Issue Dt:
11/30/2010
Application #:
12284037
Filing Dt:
09/18/2008
Title:
MEMORY CELL INCLUDING AN EMITTER FOLLOWER AND EMITTER FOLLOWER SENSING SCHEME AND METHOD OF READING DATA THEREFROM
44
Patent #:
Issue Dt:
05/17/2011
Application #:
12316944
Filing Dt:
12/17/2008
Title:
JUNCTION FIELD EFFECT TRANSISTOR (JFET) STRUCTURE HAVING TOP-TO-BOTTOM GATE TIE AND METHOD OF MANUFACTURE
45
Patent #:
Issue Dt:
09/13/2011
Application #:
12326415
Filing Dt:
12/02/2008
Publication #:
Pub Dt:
06/03/2010
Title:
A METHOD FOR MANUFACTURING A JUNCTION FIELD EFFECT TRANSISTOR HAVING A DOUBLE GATE
46
Patent #:
Issue Dt:
12/07/2010
Application #:
12339584
Filing Dt:
12/19/2008
Title:
METHOD AND APPARATUS FOR IMPROVING SRAM WRITE OPERATIONS
47
Patent #:
Issue Dt:
06/28/2011
Application #:
12339618
Filing Dt:
12/19/2008
Title:
METHOD AND APPARATUS FOR IMPROVING SRAM WRITE OPERATIONS
48
Patent #:
Issue Dt:
06/15/2010
Application #:
12349747
Filing Dt:
01/07/2009
Title:
ADVANCED JFET WITH RELIABLE CHANNEL CONTROL AND METHOD OF MANUFACTURE
49
Patent #:
Issue Dt:
11/30/2010
Application #:
12363796
Filing Dt:
02/02/2009
Publication #:
Pub Dt:
05/28/2009
Title:
TRANSISTOR PROVIDING DIFFERENT THRESHOLD VOLTAGES AND METHOD OF FABRICATION THEREOF
50
Patent #:
Issue Dt:
12/07/2010
Application #:
12366791
Filing Dt:
02/06/2009
Title:
SEMICONDUCTOR DEVICE WITH MULTIPLE TRANSISTORS FORMED IN A PARTIALLY DEPLETED SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
51
Patent #:
Issue Dt:
09/06/2011
Application #:
12369169
Filing Dt:
02/11/2009
Title:
METHOD FOR PROVIDING TEMPERATURE UNIFORMITY OF RAPID THERMAL ANNEALING
52
Patent #:
Issue Dt:
06/28/2011
Application #:
12380490
Filing Dt:
02/26/2009
Publication #:
Pub Dt:
08/27/2009
Title:
SEMICONDUCTOR DEVICE, DESIGN METHOD AND STRUCTURE
53
Patent #:
Issue Dt:
06/21/2011
Application #:
12380497
Filing Dt:
02/26/2009
Publication #:
Pub Dt:
08/13/2009
Title:
SEMICONDUCTOR DEVICE, DESIGN METHOD AND STRUCTURE
54
Patent #:
Issue Dt:
03/29/2011
Application #:
12492320
Filing Dt:
06/26/2009
Publication #:
Pub Dt:
12/17/2009
Title:
INTEGRATED CIRCUIT USING COMPLEMENTARY JUNCTION FIELD EFFECT TRANSISTOR AND MOS TRANSISTOR IN SILICON AND SILICON ALLOYS
55
Patent #:
Issue Dt:
09/28/2010
Application #:
12506848
Filing Dt:
07/21/2009
Publication #:
Pub Dt:
11/12/2009
Title:
CIRCUIT CONFIGURATIONS HAVING FOUR TERMINAL JFET DEVICES
56
Patent #:
Issue Dt:
09/25/2012
Application #:
12708497
Filing Dt:
02/18/2010
Publication #:
Pub Dt:
03/31/2011
Title:
ELECTRONIC DEVICES AND SYSTEMS, AND METHODS FOR MAKING AND USING THE SAME
57
Patent #:
Issue Dt:
07/26/2011
Application #:
12861659
Filing Dt:
08/23/2010
Publication #:
Pub Dt:
12/16/2010
Title:
CIRCUIT CONFIGURATIONS HAVING FOUR TERMINAL DEVICES
58
Patent #:
Issue Dt:
02/19/2013
Application #:
12895657
Filing Dt:
09/30/2010
Publication #:
Pub Dt:
04/05/2012
Title:
METHOD FOR MINIMIZING DEFECTS IN A SEMICONDUCTOR SUBSTRATE DUE TO ION IMPLANTATION
59
Patent #:
Issue Dt:
02/19/2013
Application #:
12895695
Filing Dt:
09/30/2010
Publication #:
Pub Dt:
04/05/2012
Title:
METHOD FOR REDUCING PUNCH-THROUGH IN A TRANSISTOR DEVICE
60
Patent #:
Issue Dt:
10/14/2014
Application #:
12895730
Filing Dt:
09/30/2010
Publication #:
Pub Dt:
04/05/2012
Title:
METHOD FOR MINIMIZING DEFECTS IN A SEMICONDUCTOR SUBSTRATE DUE TO ION IMPLANTATION
61
Patent #:
NONE
Issue Dt:
Application #:
12895785
Filing Dt:
09/30/2010
Publication #:
Pub Dt:
04/07/2011
Title:
Advanced Transistors with Threshold Voltage Set Dopant Structures
62
Patent #:
Issue Dt:
04/16/2013
Application #:
12895813
Filing Dt:
09/30/2010
Publication #:
Pub Dt:
05/26/2011
Title:
ADVANCED TRANSISTORS WITH PUNCH THROUGH SUPPRESSION
63
Patent #:
Issue Dt:
10/29/2013
Application #:
12960266
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
12/22/2011
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATION THEREOF WITH MIXED METAL TYPES
64
Patent #:
Issue Dt:
03/26/2013
Application #:
12960289
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS
65
Patent #:
Issue Dt:
09/10/2013
Application #:
12971884
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
10/13/2011
Title:
LOW POWER SEMICONDUCTOR TRANSISTOR STRUCTURE AND METHOD OF FABRICATION THEREOF
66
Patent #:
Issue Dt:
06/24/2014
Application #:
12971955
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
12/22/2011
Title:
TRANSISTOR WITH THRESHOLD VOLTAGE SET NOTCH AND METHOD OF FABRICATION THEREOF
67
Patent #:
Issue Dt:
06/11/2013
Application #:
13030939
Filing Dt:
02/18/2011
Title:
DIGITAL CIRCUITS HAVING IMPROVED TRANSISTORS, AND METHODS THEREFOR
68
Patent #:
Issue Dt:
09/03/2013
Application #:
13039986
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
09/06/2012
Title:
SEMICONDUCTOR STRUCTURE WITH IMPROVED CHANNEL STACK AND METHOD FOR FABRICATION THEREOF
69
Patent #:
Issue Dt:
03/19/2013
Application #:
13071399
Filing Dt:
03/24/2011
Publication #:
Pub Dt:
09/27/2012
Title:
ANALOG CIRCUITS HAVING IMPROVED TRANSISTORS, AND METHODS THEREFOR
70
Patent #:
Issue Dt:
03/31/2015
Application #:
13167625
Filing Dt:
06/23/2011
Publication #:
Pub Dt:
12/27/2012
Title:
CIRCUIT DEVICES AND METHODS HAVING ADJUSTABLE TRANSISTOR BODY BIAS
71
Patent #:
Issue Dt:
09/11/2012
Application #:
13218600
Filing Dt:
08/26/2011
Publication #:
Pub Dt:
12/15/2011
Title:
JUNCTION FIELD EFFECT TRANSISTOR HAVING A DOUBLE GATE STRUCTURE
72
Patent #:
Issue Dt:
12/03/2013
Application #:
13336434
Filing Dt:
12/23/2011
Title:
CIRCUITS AND METHODS FOR MEASURING CIRCUIT ELEMENTS IN AN INTEGRATED CIRCUIT DEVICE
73
Patent #:
Issue Dt:
08/02/2016
Application #:
13407527
Filing Dt:
02/28/2012
Title:
METHOD FOR FABRICATING MULTIPLE TRANSISTOR DEVICES ON A SUBSTRATE WITH VARYING THRESHOLD VOLTAGES
74
Patent #:
Issue Dt:
01/14/2014
Application #:
13459971
Filing Dt:
04/30/2012
Title:
MULTIPLE TRANSISTOR TYPES FORMED IN A COMMON EPITAXIAL LAYER BY DIFFERENTIAL OUT-DIFFUSION FROM A DOPED UNDERLAYER
75
Patent #:
Issue Dt:
04/07/2015
Application #:
13469249
Filing Dt:
05/11/2012
Title:
SEMICONDUCTOR STRUCTURE WITH SUBSTITUTIONAL BORON AND METHOD FOR FABRICATION THEREOF
76
Patent #:
Issue Dt:
08/05/2014
Application #:
13469598
Filing Dt:
05/11/2012
Title:
MONITORING AND MEASUREMENT OF THIN FILM LAYERS
77
Patent #:
Issue Dt:
08/19/2014
Application #:
13471353
Filing Dt:
05/14/2012
Title:
INTEGRATED CIRCUIT DEVICES AND METHODS
78
Patent #:
Issue Dt:
10/29/2013
Application #:
13473403
Filing Dt:
05/16/2012
Title:
REDUCING OR ELIMINATING PRE-AMORPHIZATION IN TRANSISTOR MANUFACTURE
79
Patent #:
Issue Dt:
07/15/2014
Application #:
13482394
Filing Dt:
05/29/2012
Title:
METHOD FOR SUBSTRATE PRESERVATION DURING TRANSISTOR FABRICATION
80
Patent #:
Issue Dt:
05/27/2014
Application #:
13489824
Filing Dt:
06/06/2012
Title:
CMOS GATE STACK STRUCTURES AND PROCESSES
81
Patent #:
Issue Dt:
09/24/2013
Application #:
13553593
Filing Dt:
07/19/2012
Publication #:
Pub Dt:
11/29/2012
Title:
ELECTRONIC DEVICES AND SYSTEMS, AND METHODS FOR MAKING AND USING THE SAME
82
Patent #:
Issue Dt:
06/10/2014
Application #:
13553902
Filing Dt:
07/20/2012
Title:
ANALOG TRANSISTOR
83
Patent #:
Issue Dt:
06/10/2014
Application #:
13559554
Filing Dt:
07/26/2012
Title:
ELECTRONIC DEVICE WITH CONTROLLED THRESHOLD VOLTAGE
84
Patent #:
Issue Dt:
12/24/2013
Application #:
13591767
Filing Dt:
08/22/2012
Title:
CMOS STRUCTURES AND PROCESSES BASED ON SELECTIVE THINNING
85
Patent #:
Issue Dt:
02/04/2014
Application #:
13592122
Filing Dt:
08/22/2012
Title:
PORTING A CIRCUIT DESIGN FROM A FIRST SEMICONDUCTOR PROCESS TO A SECOND SEMICONDUCTOR PROCESS
86
Patent #:
Issue Dt:
01/28/2014
Application #:
13600647
Filing Dt:
08/31/2012
Title:
SEMICONDUCTOR STRUCTURE WITH REDUCED JUNCTION LEAKAGE AND METHOD OF FABRICATION THEREOF
87
Patent #:
Issue Dt:
12/10/2013
Application #:
13616053
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
01/24/2013
Title:
ELECTRONIC DEVICES AND SYSTEMS, AND METHODS FOR MAKING AND USING THE SAME
88
Patent #:
Issue Dt:
12/10/2013
Application #:
13616859
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
01/24/2013
Title:
ELECTRONIC DEVICES AND SYSTEMS, AND METHODS FOR MAKING AND USING THE SAME
89
Patent #:
Issue Dt:
04/29/2014
Application #:
13621698
Filing Dt:
09/17/2012
Title:
Tools and Methods for Yield-Aware Semiconductor Manufacturing Process Target Generation
90
Patent #:
Issue Dt:
08/18/2015
Application #:
13622194
Filing Dt:
09/18/2012
Title:
SEMICONDUCTOR DEVICES WITH DOPANT MIGRATION SUPPRESSION AND METHOD OF FABRICATION THEREOF
91
Patent #:
Issue Dt:
02/18/2014
Application #:
13624449
Filing Dt:
09/21/2012
Title:
MULTIPLE TRANSISTOR TYPES FORMED IN A COMMON EPITAXIAL LAYER BY DIFFERENTIAL OUT-DIFFUSION FROM A DOPED UNDERLAYER
92
Patent #:
Issue Dt:
01/12/2016
Application #:
13646506
Filing Dt:
10/05/2012
Title:
ANALOG CIRCUITS HAVING IMPROVED INSULATED GATE TRANSISTORS, AND METHODS THEREFOR
93
Patent #:
Issue Dt:
08/26/2014
Application #:
13668063
Filing Dt:
11/02/2012
Title:
BODY BIAS CIRCUITS AND METHODS
94
Patent #:
Issue Dt:
11/25/2014
Application #:
13708983
Filing Dt:
12/08/2012
Title:
TIPLESS TRANSISTORS, SHORT-TIP TRANSISTORS, AND METHODS AND CIRCUITS THEREFOR
95
Patent #:
Issue Dt:
08/26/2014
Application #:
13716080
Filing Dt:
12/14/2012
Title:
MEMORY CIRCUITS AND METHODS OF MAKING AND DESIGNING THE SAME
96
Patent #:
Issue Dt:
11/11/2014
Application #:
13725152
Filing Dt:
12/21/2012
Title:
TRANSISTOR HAVING REDUCED JUNCTION LEAKAGE AND METHODS OF FORMING THEREOF
97
Patent #:
Issue Dt:
03/03/2015
Application #:
13747268
Filing Dt:
01/22/2013
Title:
CIRCUITS AND DEVICES FOR GENERATING BI-DIRECTIONAL BODY BIAS VOLTAGES, AND METHODS THEREFOR
98
Patent #:
Issue Dt:
11/04/2014
Application #:
13748418
Filing Dt:
01/23/2013
Title:
PROCESS FOR MANUFACTURE OF INTEGRATED CIRCUITS WITH DIFFERENT CHANNEL DOPING TRANSISTOR ARCHITECTURES AND DEVICES THEREFROM
99
Patent #:
Issue Dt:
07/28/2015
Application #:
13755887
Filing Dt:
01/31/2013
Title:
Integrated Circuits Having a Plurality of High-K Metal Gate FETs with Various Combinations of Channel Foundation Structure and Gate Stack Structure and Methods of Making Same
100
Patent #:
Issue Dt:
10/22/2013
Application #:
13770313
Filing Dt:
02/19/2013
Publication #:
Pub Dt:
06/27/2013
Title:
SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS
Assignor
1
Exec Dt:
03/03/2015
Assignee
1
2000 MIZONO, TADO-CHO
KUWANA, MIE 511-0118, JAPAN
Correspondence name and address
BRADLEY P. WILLIAMS
2001 ROSS AVE. SUITE 600
BAKER BOTTS LLP
DALLAS, TX 75201

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