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Patent Assignment Details
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Reel/Frame:035623/0001   Pages: 181
Recorded: 05/08/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4024
Page 20 of 41
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
1
Patent #:
Issue Dt:
10/24/2006
Application #:
10356775
Filing Dt:
01/31/2003
Publication #:
Pub Dt:
07/31/2003
Title:
RESIST FOR PHOTOLITHOGRAPHY HAVING REACTIVE GROUPS FOR SUBSEQUENT MODIFICATION OF THE RESIST STRUCTURES
2
Patent #:
Issue Dt:
12/28/2004
Application #:
10356791
Filing Dt:
01/31/2003
Publication #:
Pub Dt:
08/21/2003
Title:
FLUORINE-CONTAINING PHOTORESIST HAVING REACTIVE ANCHORS FOR CHEMICAL AMPLIFICATION AND IMPROVED COPOLYMERIZATION PROPERTIES
3
Patent #:
Issue Dt:
12/28/2004
Application #:
10356921
Filing Dt:
01/30/2003
Publication #:
Pub Dt:
09/11/2003
Title:
METHOD OF CHECKING ELECTRICAL CONNECTIONS BETWEEN A MEMORY MODULE AND A SEMICONDUCTOR MEMORY CHIP
4
Patent #:
Issue Dt:
03/01/2005
Application #:
10358581
Filing Dt:
02/05/2003
Publication #:
Pub Dt:
08/05/2004
Title:
VOLTAGE DOWN CONVERTER FOR LOW VOLTAGE OPERATION
5
Patent #:
Issue Dt:
02/24/2004
Application #:
10358953
Filing Dt:
02/04/2003
Publication #:
Pub Dt:
07/24/2003
Title:
APPARATUS AND METHOD FOR POPULATING TRANSPORT TAPES
6
Patent #:
Issue Dt:
12/30/2003
Application #:
10360456
Filing Dt:
02/06/2003
Publication #:
Pub Dt:
08/07/2003
Title:
MEMORY MODULE WITH IMPROVED ELECTRICAL PROPERTIES
7
Patent #:
Issue Dt:
12/05/2006
Application #:
10361989
Filing Dt:
02/11/2003
Publication #:
Pub Dt:
08/12/2004
Title:
ANTIFUSE PROGRAMMING WITH RELAXED UPPER CURRENT LIMIT
8
Patent #:
Issue Dt:
09/07/2004
Application #:
10364014
Filing Dt:
02/10/2003
Publication #:
Pub Dt:
08/21/2003
Title:
ADDRESSING DEVICE FOR SELECTING REGULAR AND REDUNDANT ELEMENTS
9
Patent #:
Issue Dt:
09/20/2005
Application #:
10364716
Filing Dt:
02/11/2003
Publication #:
Pub Dt:
08/19/2004
Title:
SELF ALIGNMENT SYSTEM FOR COMPLEMENT CLOCKS
10
Patent #:
Issue Dt:
05/04/2004
Application #:
10364819
Filing Dt:
02/11/2003
Publication #:
Pub Dt:
08/21/2003
Title:
METHOD OF PATTERNING FERROELECTRIC LAYERS
11
Patent #:
Issue Dt:
05/25/2004
Application #:
10366149
Filing Dt:
02/13/2003
Publication #:
Pub Dt:
08/14/2003
Title:
CARBON-GRADED LAYER FOR IMPROVED ADHESION OF LOW-K DIELECTRICS TO SILICON SUBSTRATES
12
Patent #:
Issue Dt:
06/21/2005
Application #:
10368073
Filing Dt:
02/18/2003
Publication #:
Pub Dt:
07/31/2003
Title:
METHOD FOR WAFER POSITION DATA RETRIEVAL IN SEMICONDUCTOR WAFER MANUFACTURING
13
Patent #:
Issue Dt:
11/23/2004
Application #:
10368081
Filing Dt:
02/18/2003
Publication #:
Pub Dt:
08/21/2003
Title:
INTEGRATED MEMORY AND METHOD FOR OPERATING AN INTEGRATED MEMORY
14
Patent #:
Issue Dt:
03/22/2005
Application #:
10368330
Filing Dt:
02/18/2003
Publication #:
Pub Dt:
08/21/2003
Title:
METHOD FOR GENERATING TEST SIGNALS FOR AN INTEGRATED CIRCUIT AND TEST LOGIC UNIT
15
Patent #:
Issue Dt:
07/27/2004
Application #:
10368333
Filing Dt:
02/18/2003
Publication #:
Pub Dt:
08/21/2003
Title:
INTEGRATED DYNAMIC MEMORY WITH CONTROL CIRCUIT FOR CONTROLLING A REFRESH MODE OF MEMORY CELLS, AND METHOD FOR DRIVING THE MEMORY
16
Patent #:
Issue Dt:
12/21/2004
Application #:
10368334
Filing Dt:
02/18/2003
Publication #:
Pub Dt:
08/21/2003
Title:
METHOD FOR CHECKING AN INTEGRATED ELECTRICAL CIRCUIT
17
Patent #:
Issue Dt:
02/28/2006
Application #:
10370857
Filing Dt:
02/20/2003
Publication #:
Pub Dt:
08/21/2003
Title:
METHOD FOR FORMING A HARD MASK IN A LAYER ON A PLANAR DEVICE
18
Patent #:
Issue Dt:
05/18/2004
Application #:
10370858
Filing Dt:
02/20/2003
Publication #:
Pub Dt:
08/21/2003
Title:
METHOD FOR FABRICATING A COMPONENT, AND COMPONENT HAVING A METAL LAYER AND AN INSULATION LAYER
19
Patent #:
Issue Dt:
11/09/2004
Application #:
10372983
Filing Dt:
02/24/2003
Publication #:
Pub Dt:
08/21/2003
Title:
LOW-TEMPERATURE PROCESSING OF A FERROELECTRIC STRONTIUM BISMUTH TANTALATE LAYER, AND FABRICATION OF FERROELECTRIC COMPONENTS USING THE LAYER
20
Patent #:
Issue Dt:
09/13/2005
Application #:
10372989
Filing Dt:
02/24/2003
Publication #:
Pub Dt:
07/07/2005
Title:
METHOD FOR FABRICATING A P-CHANNEL FIELD-EFFECT TRANSISTOR ON A SEMICONDUCTOR SUBSTRATE
21
Patent #:
Issue Dt:
10/12/2004
Application #:
10374657
Filing Dt:
02/26/2003
Publication #:
Pub Dt:
11/27/2003
Title:
LATENCY TIME SWITCH FOR AN S-DRAM
22
Patent #:
Issue Dt:
01/27/2009
Application #:
10374916
Filing Dt:
02/26/2003
Publication #:
Pub Dt:
09/18/2003
Title:
APPARATUS AND METHOD FOR MONITORING A STATE, IN PARTICULAR OF A FUSE
23
Patent #:
Issue Dt:
12/28/2004
Application #:
10375529
Filing Dt:
02/27/2003
Publication #:
Pub Dt:
09/18/2003
Title:
METHOD AND DEVICE FOR DEPOSITING THIN LAYERS VIA ALD/CVD PROCESSES IN COMBINATION WITH RAPID THERMAL PROCESSES
24
Patent #:
Issue Dt:
01/02/2007
Application #:
10375531
Filing Dt:
02/27/2003
Publication #:
Pub Dt:
09/04/2003
Title:
LITHOGRAPHIC PROCESS FOR REDUCING THE LATERAL CHROMIUM STRUCTURE LOSS IN PHOTOMASK PRODUCTION USING CHEMICALLY AMPLIFIED RESISTS
25
Patent #:
Issue Dt:
03/28/2006
Application #:
10375532
Filing Dt:
02/27/2003
Publication #:
Pub Dt:
03/04/2004
Title:
PROCESS FOR INCREASING THE ETCH RESISTANCE AND FOR REDUCING THE HOLE AND TRENCH WIDTH OF A PHOTORESIST STRUCTURE USING SOLVENT SYSTEMS OF LOW POLARITY
26
Patent #:
Issue Dt:
09/20/2005
Application #:
10376408
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
MEMORY DEVICE AND METHOD OF READING DATA FROM A MEMORY CELL
27
Patent #:
Issue Dt:
05/22/2007
Application #:
10376904
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/04/2003
Title:
RESIST FOR ELECTRON BEAM LITHOGRAPHY AND A PROCESS FOR PRODUCING PHOTOMASKS USING ELECTRON BEAM LITHOGRAPHY
28
Patent #:
Issue Dt:
08/17/2004
Application #:
10377348
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/18/2003
Title:
METHOD AND MAGAZINE DEVICE FOR TESTING SEMICONDUCTOR DEVICES
29
Patent #:
Issue Dt:
09/07/2004
Application #:
10377349
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
08/28/2003
Title:
ADAPTER APPARATUS FOR MEMORY MODULES
30
Patent #:
Issue Dt:
12/21/2004
Application #:
10377350
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
08/28/2003
Title:
METHOD FOR FABRICATING A MEMORY CELL
31
Patent #:
Issue Dt:
05/10/2005
Application #:
10377893
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
08/28/2003
Title:
POLYMER MATERIAL HAVING A LOW GLASS TRANSITION TEMPERATURE FOR USE IN CHEMICALLY AMPLIFIED PHOTORESISTS FOR SEMICONDUCTOR PRODUCTION
32
Patent #:
Issue Dt:
09/21/2004
Application #:
10378101
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
08/14/2003
Title:
METHOD FOR FABRICATING A MEMORY CELL
33
Patent #:
Issue Dt:
04/06/2004
Application #:
10378244
Filing Dt:
03/03/2003
Publication #:
Pub Dt:
09/04/2003
Title:
METHOD FOR FILLING DEPRESSIONS ON A SEMICONDUCTOR WAFER
34
Patent #:
Issue Dt:
07/05/2005
Application #:
10378472
Filing Dt:
03/03/2003
Publication #:
Pub Dt:
09/09/2004
Title:
DEEP POWER DOWN SWITCH FOR MEMORY DEVICE
35
Patent #:
Issue Dt:
01/25/2005
Application #:
10383191
Filing Dt:
03/06/2003
Publication #:
Pub Dt:
09/09/2004
Title:
MICROELECTRONIC CAPACITOR STRUCTURE WITH RADIAL CURRENT FLOW
36
Patent #:
Issue Dt:
11/30/2004
Application #:
10384860
Filing Dt:
03/10/2003
Publication #:
Pub Dt:
09/16/2004
Title:
CURRENT MODE LOGIC (CML) CIRCUIT CONCEPT FOR A VARIABLE DELAY ELEMENT
37
Patent #:
Issue Dt:
08/03/2004
Application #:
10385000
Filing Dt:
03/10/2003
Publication #:
Pub Dt:
09/25/2003
Title:
METHOD FOR PRODUCING A SHALLOW TRENCH ISOLATION FOR N- AND P- CHANNEL FIELD-EFFECT TRANSISTORS IN A SEMICONDUCTOR MODULE
38
Patent #:
Issue Dt:
02/20/2007
Application #:
10386147
Filing Dt:
03/11/2003
Publication #:
Pub Dt:
01/08/2004
Title:
DIFFERENTAL CURRENT SOURCE FOR GENERATING DRAM REFRESH SIGNAL
39
Patent #:
Issue Dt:
10/26/2004
Application #:
10386150
Filing Dt:
03/11/2003
Publication #:
Pub Dt:
02/05/2004
Title:
LIMITER FOR REFRESH SIGNAL PERIOD IN DRAM
40
Patent #:
Issue Dt:
10/26/2004
Application #:
10386880
Filing Dt:
03/12/2003
Publication #:
Pub Dt:
09/16/2004
Title:
METHOD TO FILL DEEP TRENCH STRUCTURES WITH VOID-FREE POLYSILICON OR SILICON
41
Patent #:
Issue Dt:
01/13/2015
Application #:
10386974
Filing Dt:
03/12/2003
Publication #:
Pub Dt:
09/16/2004
Title:
Multiple delay locked loop integration system and method
42
Patent #:
Issue Dt:
06/21/2005
Application #:
10387435
Filing Dt:
03/14/2003
Publication #:
Pub Dt:
09/16/2004
Title:
SELF TRIMMING VOLTAGE GENERATOR
43
Patent #:
Issue Dt:
11/16/2004
Application #:
10387733
Filing Dt:
03/13/2003
Publication #:
Pub Dt:
09/16/2004
Title:
CIRCUIT FOR TRANSFORMING A DIFFERENTIAL MODE SIGNAL INTO A SINGLE ENDED SIGNAL WITH REDUCED STANDBY CURRENT CONSUMPTION
44
Patent #:
Issue Dt:
10/26/2004
Application #:
10387993
Filing Dt:
03/13/2003
Publication #:
Pub Dt:
09/16/2004
Title:
CIRCUIT TECHNIQUE FOR COLUMN REDUNDANCY FUSE LATCHES
45
Patent #:
Issue Dt:
03/23/2004
Application #:
10388026
Filing Dt:
03/13/2003
Publication #:
Pub Dt:
08/28/2003
Title:
TESTING DEVICE AND METHOD FOR ESTABLISHING THE POSITION OF A NOTCH OR BUMP ON A DISK
46
Patent #:
Issue Dt:
11/30/2004
Application #:
10389558
Filing Dt:
03/14/2003
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD AND ARRANGEMENT FOR GENERATING ULTRAPURE STEAM
47
Patent #:
Issue Dt:
02/13/2007
Application #:
10389580
Filing Dt:
03/14/2003
Publication #:
Pub Dt:
09/18/2003
Title:
TEST METHOD AND TEST APPARATUS FOR AN ELECTRONIC MODULE
48
Patent #:
Issue Dt:
10/18/2005
Application #:
10389782
Filing Dt:
03/17/2003
Publication #:
Pub Dt:
11/27/2003
Title:
INTEGRATED CIRCUIT AND METHOD FOR CONTROLLING A POWER SUPPLY THEREOF
49
Patent #:
Issue Dt:
06/15/2004
Application #:
10390865
Filing Dt:
03/17/2003
Publication #:
Pub Dt:
09/25/2003
Title:
METHOD FOR FABRICATING A TRENCH CAPACITOR
50
Patent #:
Issue Dt:
02/08/2005
Application #:
10391850
Filing Dt:
03/19/2003
Publication #:
Pub Dt:
09/23/2004
Title:
CIRCUIT FOR TRANSFORMING A SINGLE ENDED SIGNAL INTO A DIFFERENTIAL MODE SIGNAL
51
Patent #:
Issue Dt:
07/20/2004
Application #:
10393525
Filing Dt:
03/20/2003
Publication #:
Pub Dt:
02/12/2004
Title:
DUTY-CYCLE CORRECTION CIRCUIT
52
Patent #:
Issue Dt:
01/25/2005
Application #:
10394779
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
09/23/2004
Title:
CML (CURRENT MODE LOGIC) OCD (OFF CHIP DRIVER) - ODT (ON DIE TERMINATION) CIRCUIT FOR BIDIRECTIONAL DATA TRANSMISSION
53
Patent #:
Issue Dt:
11/30/2004
Application #:
10394932
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD FOR PRODUCING A HORIZONTAL INSULATION LAYER ON A CONDUCTIVE MATERIAL IN A TRENCH
54
Patent #:
Issue Dt:
05/23/2006
Application #:
10395428
Filing Dt:
03/24/2003
Publication #:
Pub Dt:
12/25/2003
Title:
SEMICONDUCTOR MEMORY CELL AND SEMICONDUCTOR MEMORY DEVICE
55
Patent #:
Issue Dt:
09/07/2004
Application #:
10395457
Filing Dt:
03/24/2003
Publication #:
Pub Dt:
09/25/2003
Title:
SEMICONDUCTOR MEMORY CELL AND SEMICONDUCTOR MEMORY DEVICE
56
Patent #:
Issue Dt:
03/29/2005
Application #:
10396841
Filing Dt:
03/25/2003
Publication #:
Pub Dt:
11/27/2003
Title:
ELECTRONIC COMPONENT WITH A SEMICONDUCTOR CHIP, METHOD OF PRODUCING AN ELECTRONIC COMPONENT AND A PANEL WITH A PLURALITY OF ELECTRONIC COMPONENTS
57
Patent #:
Issue Dt:
09/20/2005
Application #:
10396966
Filing Dt:
03/25/2003
Publication #:
Pub Dt:
10/02/2003
Title:
REGISTER FOR THE PARALLEL-SERIAL CONVERSION OF DATA
58
Patent #:
Issue Dt:
05/10/2005
Application #:
10397761
Filing Dt:
03/26/2003
Publication #:
Pub Dt:
09/30/2004
Title:
TRENCH ISOLATION EMPLOYING A DOPED OXIDE TRENCH FILL
59
Patent #:
Issue Dt:
08/01/2006
Application #:
10399985
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
01/22/2004
Title:
METHOD FOR FABRICATING AN INTEGRATED CIRCUIT
60
Patent #:
Issue Dt:
05/30/2006
Application #:
10401185
Filing Dt:
03/27/2003
Publication #:
Pub Dt:
10/02/2003
Title:
INSTALLATION FOR PROCESSING A SEMICONDUCTOR WAFER AND METHOD FOR OPERATING THE INSTALLATION
61
Patent #:
Issue Dt:
09/14/2004
Application #:
10401187
Filing Dt:
03/27/2003
Publication #:
Pub Dt:
10/02/2003
Title:
ELECTRICAL COMPONENT WITH A CONTACT AND METHOD FOR FORMING A CONTACT ON A SEMICONDUCTOR MATERIAL
62
Patent #:
Issue Dt:
02/22/2005
Application #:
10401193
Filing Dt:
03/27/2003
Publication #:
Pub Dt:
09/25/2003
Title:
VEHICLE FOR TRANSPORTING A SEMICONDUCTOR DEVICE CARRIER TO A SEMICONDUCTOR PROCESSING TOOL
63
Patent #:
Issue Dt:
11/01/2005
Application #:
10402811
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
10/02/2003
Title:
METHOD FOR PRODUCING A SEMICONDUCTOR WAFER, SEMICONDUCTOR CHIP, AND INTERMEDIATE SEMICONDUCTOR PRODUCT
64
Patent #:
Issue Dt:
11/30/2004
Application #:
10403880
Filing Dt:
03/31/2003
Publication #:
Pub Dt:
09/25/2003
Title:
CONFIGURATION FOR POLISHING DISK-SHAPED OBJECTS
65
Patent #:
Issue Dt:
09/06/2005
Application #:
10404561
Filing Dt:
04/02/2003
Publication #:
Pub Dt:
10/07/2004
Title:
METHOD AND SYSTEM FOR MANUFACTURING DRAMS WITH REDUCED SELF-REFRESH CURRENT REQUIREMENTS
66
Patent #:
Issue Dt:
11/02/2004
Application #:
10406019
Filing Dt:
04/02/2003
Publication #:
Pub Dt:
10/07/2004
Title:
MEMORY DEVICE AND METHOD OF OUTPUTTING DATA FROM A MEMORY DEVICE
67
Patent #:
Issue Dt:
01/25/2005
Application #:
10406320
Filing Dt:
04/04/2003
Publication #:
Pub Dt:
10/07/2004
Title:
USE OF REDUNDANT MEMORY CELLS TO MANUFACTURE COST EFFICIENT DRAMS WITH REDUCED SELF REFRESH CURRENT CAPABILITY
68
Patent #:
Issue Dt:
01/11/2005
Application #:
10406888
Filing Dt:
04/04/2003
Publication #:
Pub Dt:
10/07/2004
Title:
METHOD OF REDUCING PITCH ON SEMICONDUCTOR WAFER
69
Patent #:
Issue Dt:
09/18/2007
Application #:
10408339
Filing Dt:
04/07/2003
Publication #:
Pub Dt:
10/07/2004
Title:
ADHESION LAYER FOR PT ON SIO2
70
Patent #:
Issue Dt:
10/11/2005
Application #:
10408806
Filing Dt:
04/07/2003
Publication #:
Pub Dt:
12/11/2003
Title:
METHOD FOR COMPENSATING FOR SCATTER/REFLECTION EFFECTS IN PARTICLE BEAM LITHOGRAPHY
71
Patent #:
Issue Dt:
05/16/2006
Application #:
10409012
Filing Dt:
04/08/2003
Publication #:
Pub Dt:
10/09/2003
Title:
INTEGRATED MEMORY HAVING A MEMORY CELL ARRAY CONTAINING A PLURALITY OF MEMORY BANKS, AND CIRCUIT CONFIGURATION HAVING AN INTEGRATED MEMORY
72
Patent #:
Issue Dt:
02/10/2004
Application #:
10410383
Filing Dt:
04/09/2003
Publication #:
Pub Dt:
10/09/2003
Title:
CIRCUIT CONFIGURATION FOR CONVERTING LOGIC SIGNAL LEVELS
73
Patent #:
Issue Dt:
04/13/2004
Application #:
10410933
Filing Dt:
04/10/2003
Publication #:
Pub Dt:
10/23/2003
Title:
DRIVE CIRCUIT AND CONTROL METHOD
74
Patent #:
Issue Dt:
11/30/2004
Application #:
10411728
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/14/2004
Title:
SCANNING TIP ORIENTATION ADJUSTMENT METHOD FOR ATOMIC FORCE MICROSCOPY
75
Patent #:
Issue Dt:
03/15/2005
Application #:
10413505
Filing Dt:
04/14/2003
Publication #:
Pub Dt:
12/11/2003
Title:
TARGETED DEPOSITION OF NANOTUBES
76
Patent #:
Issue Dt:
02/13/2007
Application #:
10413812
Filing Dt:
04/15/2003
Publication #:
Pub Dt:
12/04/2003
Title:
METHOD AND CONFIGURATION FOR REINFORCEMENT OF A DIELECTRIC LAYER AT DEFECTS BY SELF-ALIGNING AND SELF-LIMITING ELECTROCHEMICAL CONVERSION OF A SUBSTRATE MATERIAL
77
Patent #:
Issue Dt:
08/24/2004
Application #:
10413814
Filing Dt:
04/15/2003
Publication #:
Pub Dt:
10/16/2003
Title:
METHOD AND DEVICE FOR GENERATING A REFERENCE VOLTAGE
78
Patent #:
Issue Dt:
09/14/2004
Application #:
10414836
Filing Dt:
04/16/2003
Publication #:
Pub Dt:
10/16/2003
Title:
CIRCUIT CONFIGURATION WITH SIGNAL LINES FOR SERIALLY TRANSMITTING A PLURALITY OF BIT GROUPS
79
Patent #:
Issue Dt:
08/10/2004
Application #:
10414837
Filing Dt:
04/16/2003
Publication #:
Pub Dt:
10/16/2003
Title:
SEMICONDUCTOR ASSEMBLY WITH A SEMICONDUCTOR MODULE
80
Patent #:
Issue Dt:
08/02/2005
Application #:
10416674
Filing Dt:
10/16/2003
Publication #:
Pub Dt:
03/25/2004
Title:
Method for fabricating an integrated semiconductor component
81
Patent #:
Issue Dt:
10/19/2004
Application #:
10418734
Filing Dt:
04/17/2003
Publication #:
Pub Dt:
10/21/2004
Title:
FERAM MEMORY DEVICE
82
Patent #:
Issue Dt:
01/24/2006
Application #:
10419596
Filing Dt:
04/21/2003
Publication #:
Pub Dt:
10/23/2003
Title:
SEMICONDUCTOR CIRCUIT AND INITIALIZATION METHOD
83
Patent #:
Issue Dt:
10/02/2007
Application #:
10422580
Filing Dt:
04/24/2003
Publication #:
Pub Dt:
10/30/2003
Title:
METHOD FOR NUMERICALLY SIMULATING AN ELECTRICAL CIRCUIT
84
Patent #:
Issue Dt:
06/19/2007
Application #:
10423812
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
11/20/2003
Title:
CIRCUIT CONFIGURATION AND METHOD FOR TRANSMITTING DIGITAL SIGNALS
85
Patent #:
Issue Dt:
10/26/2004
Application #:
10424039
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
11/27/2003
Title:
APPARATUS FOR PATTERNING A SEMICONDUCTOR WAFER
86
Patent #:
Issue Dt:
12/21/2004
Application #:
10424173
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
10/02/2003
Title:
PROCESS AND DEVICE FOR CLEANING A SEMICONDUCTOR WAFER
87
Patent #:
Issue Dt:
04/12/2005
Application #:
10424174
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
10/09/2003
Title:
CONFIGURATION FOR TRANSPORTING A SEMICONDUCTOR WAFER CARRIER
88
Patent #:
Issue Dt:
07/05/2005
Application #:
10424347
Filing Dt:
04/28/2003
Publication #:
Pub Dt:
01/22/2004
Title:
SYSTEM AND METHOD FOR THE FUNCTIONAL TESTING OF SEMICONDUCTOR MEMORY CHIPS
89
Patent #:
Issue Dt:
09/19/2006
Application #:
10424376
Filing Dt:
04/28/2003
Publication #:
Pub Dt:
02/12/2004
Title:
METHODS FOR PRODUCING A DIELECTRIC, DIELECTRIC HAVING SELF-GENERATING PORES, MONOMER FOR POROUS DIELECTRICS, PROCESS FOR PREPARING POLY-O-HYDROXYAMIDES, PROCESS FOR PREPARING POLYBENZOXAZOLES, AND PROCESSES FOR PRODUCING AN ELECTRONIC COMPONENT
90
Patent #:
Issue Dt:
09/12/2006
Application #:
10424507
Filing Dt:
04/28/2003
Publication #:
Pub Dt:
12/09/2004
Title:
METHOD FOR FABRICATING A PATTERNED LAYER ON A SEMICONDUCTOR SUBSTRATE
91
Patent #:
Issue Dt:
02/13/2007
Application #:
10425002
Filing Dt:
04/28/2003
Publication #:
Pub Dt:
03/18/2004
Title:
READING EXTENDED DATA BURST FROM MEMORY
92
Patent #:
Issue Dt:
11/14/2006
Application #:
10425224
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
11/04/2004
Title:
METHOD AND APPARATUS FOR MASKING KNOWN FAILS DURING MEMORY TESTS READOUTS
93
Patent #:
Issue Dt:
03/28/2006
Application #:
10425233
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
10/30/2003
Title:
PROCESS FOR PRODUCING HARD MASKS
94
Patent #:
Issue Dt:
11/23/2004
Application #:
10425280
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
01/15/2004
Title:
RAM MEMORY CIRCUIT AND METHOD FOR CONTROLLING THE SAME
95
Patent #:
Issue Dt:
03/15/2005
Application #:
10425460
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
12/11/2003
Title:
SURFACE-FUNCTIONALIZED INORGANIC SEMICONDUCTOR PARTICLES AS ELECTRICAL SEMICONDUCTORS FOR MICROELECTRONICS APPLICATIONS
96
Patent #:
Issue Dt:
10/11/2005
Application #:
10425461
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
02/12/2004
Title:
METHOD FOR PATTERNING CERAMIC LAYERS
97
Patent #:
Issue Dt:
07/11/2006
Application #:
10425817
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
11/04/2004
Title:
CRITICAL DIMENSION CONTROL OF PRINTED FEATURES USING NON-PRINTING FILL PATTERNS
98
Patent #:
Issue Dt:
03/28/2006
Application #:
10425995
Filing Dt:
04/30/2003
Publication #:
Pub Dt:
11/04/2004
Title:
CONTINUOUS TEST FLOW METHOD AND APPARATUS
99
Patent #:
Issue Dt:
12/21/2004
Application #:
10426011
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
03/18/2004
Title:
SIGNAL GENERATOR FOR CHARGE PUMP IN AN INTEGRATED CIRCUIT
100
Patent #:
Issue Dt:
08/02/2005
Application #:
10427962
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
11/04/2004
Title:
SEMICONDUCTOR DEVICE WITH PEROVSKITE CAPACITOR
Assignor
1
Exec Dt:
10/09/2014
Assignee
1
AM CAMPEON 1-12
NEUBIBERG, GERMANY 85579
Correspondence name and address
CPA GLOBAL LIMITED
LIBERATION HOUSE
CASTLE STREET
ST HELIER, JE1 1BL JERSEY

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