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Reel/Frame:035623/0001   Pages: 181
Recorded: 05/08/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4024
Page 32 of 41
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
1
Patent #:
7191085
Issue Dt:
03/13/2007
Application #:
11214481
Filing Dt:
08/29/2005
Publication #:
US20060049844
Pub Dt:
03/09/2006
Title:
METHOD FOR TESTING AN ELECTRIC CIRCUIT
2
Patent #:
7428673
Issue Dt:
09/23/2008
Application #:
11214482
Filing Dt:
08/29/2005
Publication #:
US20060053354
Pub Dt:
03/09/2006
Title:
TEST METHOD FOR DETERMINING THE WIRE CONFIGURATION FOR CIRCUIT CARRIERS WITH COMPONENTS ARRANGED THEREON
3
Patent #:
7281184
Issue Dt:
10/09/2007
Application #:
11215389
Filing Dt:
08/30/2005
Publication #:
US20060048032
Pub Dt:
03/02/2006
Title:
TEST SYSTEM AND METHOD FOR TESTING A CIRCUIT
4
Patent #:
7352219
Issue Dt:
04/01/2008
Application #:
11215442
Filing Dt:
08/30/2005
Publication #:
US20070046351
Pub Dt:
03/01/2007
Title:
DUTY CYCLE CORRECTOR
5
Patent #:
7279946
Issue Dt:
10/09/2007
Application #:
11215779
Filing Dt:
08/30/2005
Publication #:
US20070046346
Pub Dt:
03/01/2007
Title:
CLOCK CONTROLLER WITH INTEGRATED DLL AND DCC
6
Patent #:
7229928
Issue Dt:
06/12/2007
Application #:
11216524
Filing Dt:
08/31/2005
Publication #:
US20070049052
Pub Dt:
03/01/2007
Title:
METHOD FOR PROCESSING A LAYERED STACK IN THE PRODUCTION OF A SEMICONDUCTOR DEVICE
7
Patent #:
7393756
Issue Dt:
07/01/2008
Application #:
11216527
Filing Dt:
08/31/2005
Publication #:
US20060051931
Pub Dt:
03/09/2006
Title:
METHOD FOR FABRICATING A TRENCH ISOLATION STRUCTURE HAVING A HIGH ASPECT RATIO
8
Patent #:
7428689
Issue Dt:
09/23/2008
Application #:
11217081
Filing Dt:
08/30/2005
Publication #:
US20070061671
Pub Dt:
03/15/2007
Title:
DATA MEMORY SYSTEM AND METHOD FOR TRANSFERRING DATA INTO A DATA MEMORY
9
Patent #:
7403055
Issue Dt:
07/22/2008
Application #:
11217086
Filing Dt:
08/31/2005
Publication #:
US20070047375
Pub Dt:
03/01/2007
Title:
DUTY CYCLE DETECTOR WITH FIRST AND SECOND OSCILLATING SIGNALS
10
Patent #:
7416976
Issue Dt:
08/26/2008
Application #:
11217122
Filing Dt:
08/31/2005
Publication #:
US20070048993
Pub Dt:
03/01/2007
Title:
METHOD OF FORMING CONTACTS USING AUXILIARY STRUCTURES
11
Patent #:
7259607
Issue Dt:
08/21/2007
Application #:
11217676
Filing Dt:
09/02/2005
Publication #:
US20060049862
Pub Dt:
03/09/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY WITH CLOCK GENERATION
12
Patent #:
7279881
Issue Dt:
10/09/2007
Application #:
11218740
Filing Dt:
09/06/2005
Publication #:
US20060049817
Pub Dt:
03/09/2006
Title:
INTEGRATED CIRCUIT FOR REGULATING A VOLTAGE GENERATOR
13
Patent #:
7206238
Issue Dt:
04/17/2007
Application #:
11218913
Filing Dt:
09/01/2005
Publication #:
US20060056266
Pub Dt:
03/16/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY COMPRISING AT LEAST ONE WORD LINE AND METHOD
14
Patent #:
7398444
Issue Dt:
07/08/2008
Application #:
11220332
Filing Dt:
09/06/2005
Publication #:
US20060059397
Pub Dt:
03/16/2006
Title:
LOOP-BACK METHOD FOR MEASURING THE INTERFACE TIMING OF SEMICONDUCTOR DEVICES WITH THE AID OF SIGNATURES AND/OR PARITY METHODS
15
Patent #:
7569878
Issue Dt:
08/04/2009
Application #:
11220920
Filing Dt:
09/08/2005
Publication #:
US20060054958
Pub Dt:
03/16/2006
Title:
FABRICATING A MEMORY CELL ARRAY
16
Patent #:
7301192
Issue Dt:
11/27/2007
Application #:
11222273
Filing Dt:
09/08/2005
Publication #:
US20060076602
Pub Dt:
04/13/2006
Title:
DRAM CELL PAIR AND DRAM MEMORY CELL ARRAY
17
Patent #:
7257013
Issue Dt:
08/14/2007
Application #:
11222282
Filing Dt:
09/08/2005
Publication #:
US20070058417
Pub Dt:
03/15/2007
Title:
METHOD FOR WRITING DATA INTO A MEMORY CELL OF A CONDUCTIVE BRIDGING RANDOM ACCESS MEMORY, MEMORY CIRCUIT AND CBRAM MEMORY CIRCUIT
18
Patent #:
7763513
Issue Dt:
07/27/2010
Application #:
11222540
Filing Dt:
09/09/2005
Publication #:
US20070057301
Pub Dt:
03/15/2007
Title:
INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURE
19
Patent #:
7442609
Issue Dt:
10/28/2008
Application #:
11222613
Filing Dt:
09/09/2005
Publication #:
US20060110884
Pub Dt:
05/25/2006
Title:
METHOD OF MANUFACTURING A TRANSISTOR AND A METHOD OF FORMING A MEMORY DEVICE WITH ISOLATION TRENCHES
20
Patent #:
7345295
Issue Dt:
03/18/2008
Application #:
11223146
Filing Dt:
09/12/2005
Publication #:
US20060076549
Pub Dt:
04/13/2006
Title:
SEMICONDUCTOR MEMORY
21
Patent #:
7863149
Issue Dt:
01/04/2011
Application #:
11223800
Filing Dt:
09/09/2005
Publication #:
US20060079049
Pub Dt:
04/13/2006
Title:
METHOD FOR FABRICATING A CAPACITOR
22
Patent #:
7678408
Issue Dt:
03/16/2010
Application #:
11223801
Filing Dt:
09/09/2005
Publication #:
US20070059946
Pub Dt:
03/15/2007
Title:
METHOD FOR COMPENSATING FILM HEIGHT MODULATIONS IN SPIN COATING OF A RESIST FILM LAYER
23
Patent #:
7414896
Issue Dt:
08/19/2008
Application #:
11225465
Filing Dt:
09/13/2005
Publication #:
US20070058447
Pub Dt:
03/15/2007
Title:
TECHNIQUE TO SUPPRESS BITLINE LEAKAGE CURRENT
24
Patent #:
7397684
Issue Dt:
07/08/2008
Application #:
11226447
Filing Dt:
09/15/2005
Publication #:
US20070058408
Pub Dt:
03/15/2007
Title:
SEMICONDUCTOR MEMORY ARRAY WITH SERIAL CONTROL/ADDRESS BUS
25
Patent #:
7411843
Issue Dt:
08/12/2008
Application #:
11226448
Filing Dt:
09/15/2005
Publication #:
US20070058409
Pub Dt:
03/15/2007
Title:
SEMICONDUCTOR MEMORY ARRANGEMENT WITH BRANCHED CONTROL AND ADDRESS BUS
26
Patent #:
7475187
Issue Dt:
01/06/2009
Application #:
11226457
Filing Dt:
09/15/2005
Publication #:
US20070073942
Pub Dt:
03/29/2007
Title:
HIGH-SPEED INTERFACE CIRCUIT FOR SEMICONDUCTOR MEMORY CHIPS AND MEMORY SYSTEM INCLUDING THE SAME
27
Patent #:
7339841
Issue Dt:
03/04/2008
Application #:
11227099
Filing Dt:
09/16/2005
Publication #:
US20070064505
Pub Dt:
03/22/2007
Title:
TEST MODE METHOD AND APPARATUS FOR INTERNAL MEMORY TIMING SIGNALS
28
Patent #:
7355898
Issue Dt:
04/08/2008
Application #:
11227429
Filing Dt:
09/16/2005
Publication #:
US20060067147
Pub Dt:
03/30/2006
Title:
INTEGRATED CIRCUIT AND METHOD FOR READING FROM RESISTANCE MEMORY CELLS
29
Patent #:
7263019
Issue Dt:
08/28/2007
Application #:
11227585
Filing Dt:
09/15/2005
Publication #:
US20070058470
Pub Dt:
03/15/2007
Title:
SERIAL PRESENCE DETECT FUNCTIONALITY ON MEMORY COMPONENT
30
Patent #:
7307895
Issue Dt:
12/11/2007
Application #:
11227714
Filing Dt:
09/15/2005
Publication #:
US20060064620
Pub Dt:
03/23/2006
Title:
SELF TEST FOR THE PHASE ANGLE OF THE DATA READ CLOCK SIGNAL DQS
31
Patent #:
7242228
Issue Dt:
07/10/2007
Application #:
11227987
Filing Dt:
09/15/2005
Publication #:
US20070057714
Pub Dt:
03/15/2007
Title:
METHOD AND DEVICE FOR GENERATING AN OUTPUT SIGNAL HAVING A PREDETERMINED PHASE SHIFT WITH RESPECT TO AN INPUT SIGNAL
32
Patent #:
7295477
Issue Dt:
11/13/2007
Application #:
11229003
Filing Dt:
09/16/2005
Publication #:
US20070064499
Pub Dt:
03/22/2007
Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR WRITING DATA INTO THE SEMICONDUCTOR MEMORY DEVICE
33
Patent #:
7199625
Issue Dt:
04/03/2007
Application #:
11230896
Filing Dt:
09/20/2005
Publication #:
US20070063748
Pub Dt:
03/22/2007
Title:
DELAY LOCKED LOOP STRUCTURE PROVIDING FIRST AND SECOND LOCKED CLOCK SIGNALS
34
Patent #:
7346885
Issue Dt:
03/18/2008
Application #:
11233927
Filing Dt:
09/23/2005
Publication #:
US20060070018
Pub Dt:
03/30/2006
Title:
METHOD FOR PRODUCING A MASK LAYOUT AVOIDING IMAGING ERRORS FOR A MASK
35
Patent #:
7423281
Issue Dt:
09/09/2008
Application #:
11234375
Filing Dt:
09/26/2005
Publication #:
US20070069273
Pub Dt:
03/29/2007
Title:
MICROELECTRONIC DEVICE WITH A PLURALITY OF STORAGE ELEMENTS IN SERIAL CONNECTION AND METHOD OF PRODUCING THE SAME
36
Patent #:
7304899
Issue Dt:
12/04/2007
Application #:
11234383
Filing Dt:
09/26/2005
Publication #:
US20060067107
Pub Dt:
03/30/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY
37
Patent #:
7767562
Issue Dt:
08/03/2010
Application #:
11235330
Filing Dt:
09/26/2005
Publication #:
US20060024930
Pub Dt:
02/02/2006
Title:
METHOD OF IMPLANTING USING A SHADOW EFFECT
38
Patent #:
7266027
Issue Dt:
09/04/2007
Application #:
11235540
Filing Dt:
09/27/2005
Publication #:
US20060120176
Pub Dt:
06/08/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY WITH TEST CIRCUIT
39
Patent #:
7313033
Issue Dt:
12/25/2007
Application #:
11236933
Filing Dt:
09/28/2005
Publication #:
US20070070683
Pub Dt:
03/29/2007
Title:
RANDOM ACCESS MEMORY INCLUDING FIRST AND SECOND VOLTAGE SOURCES
40
Patent #:
7573741
Issue Dt:
08/11/2009
Application #:
11236970
Filing Dt:
09/28/2005
Publication #:
US20060109869
Pub Dt:
05/25/2006
Title:
METHOD AND CIRCUIT ARRANGEMENTS FOR ADJUSTING SIGNAL PROPAGATION TIMES IN A MEMORY SYSTEM
41
Patent #:
7298174
Issue Dt:
11/20/2007
Application #:
11237398
Filing Dt:
09/28/2005
Publication #:
US20060071689
Pub Dt:
04/06/2006
Title:
CIRCUIT AND METHOD FOR GENERATING AN OUTPUT SIGNAL
42
Patent #:
7254073
Issue Dt:
08/07/2007
Application #:
11238116
Filing Dt:
09/29/2005
Publication #:
US20070070681
Pub Dt:
03/29/2007
Title:
MEMORY DEVICE HAVING AN ARRAY OF RESISTIVE MEMORY CELLS
43
Patent #:
7693247
Issue Dt:
04/06/2010
Application #:
11238331
Filing Dt:
09/26/2005
Publication #:
US20070071156
Pub Dt:
03/29/2007
Title:
PHASE LOCKED LOOP HAVING REDUCED INHERENT NOISE
44
Patent #:
7388667
Issue Dt:
06/17/2008
Application #:
11240026
Filing Dt:
09/30/2005
Publication #:
US20070076191
Pub Dt:
04/05/2007
Title:
OPTICAL DETERMINATION OF RESISTIVITY OF PHASE CHANGE MATERIALS
45
Patent #:
7266032
Issue Dt:
09/04/2007
Application #:
11240333
Filing Dt:
09/30/2005
Publication #:
US20070076504
Pub Dt:
04/05/2007
Title:
MEMORY DEVICE HAVING LOW VPP CURRENT CONSUMPTION
46
Patent #:
7190605
Issue Dt:
03/13/2007
Application #:
11240659
Filing Dt:
09/30/2005
Publication #:
US20070076462
Pub Dt:
04/05/2007
Title:
SEMICONDUCTOR MEMORY AND METHOD FOR OPERATING A SEMICONDUCTOR MEMORY COMPRISING A PLURALITY OF MEMORY CELLS
47
Patent #:
7405986
Issue Dt:
07/29/2008
Application #:
11240981
Filing Dt:
09/29/2005
Publication #:
US20070070745
Pub Dt:
03/29/2007
Title:
REDUNDANT WORDLINE DEACTIVATION SCHEME
48
Patent #:
7375999
Issue Dt:
05/20/2008
Application #:
11241592
Filing Dt:
09/29/2005
Publication #:
US20070070754
Pub Dt:
03/29/2007
Title:
LOW EQUALIZED SENSE-AMP FOR TWIN CELL DRAMS
49
Patent #:
7203127
Issue Dt:
04/10/2007
Application #:
11241601
Filing Dt:
09/29/2005
Publication #:
US20070070788
Pub Dt:
03/29/2007
Title:
APPARATUS AND METHOD FOR DYNAMICALLY CONTROLLING DATA TRANSFER IN MEMORY DEVICE
50
Patent #:
7342829
Issue Dt:
03/11/2008
Application #:
11241817
Filing Dt:
09/30/2005
Publication #:
US20070076464
Pub Dt:
04/05/2007
Title:
MEMORY DEVICE AND METHOD FOR OPERATING A MEMORY DEVICE
51
Patent #:
7244638
Issue Dt:
07/17/2007
Application #:
11241820
Filing Dt:
09/30/2005
Publication #:
US20070075335
Pub Dt:
04/05/2007
Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF PRODUCTION
52
Patent #:
7642158
Issue Dt:
01/05/2010
Application #:
11241878
Filing Dt:
09/30/2005
Publication #:
US20070075381
Pub Dt:
04/05/2007
Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF PRODUCTION
53
Patent #:
7385837
Issue Dt:
06/10/2008
Application #:
11241879
Filing Dt:
09/30/2005
Publication #:
US20060083050
Pub Dt:
04/20/2006
Title:
NONVOLATILE MEMORY CELL AND METHODS FOR OPERATING A NONVOLATILE MEMORY CELL
54
Patent #:
7415581
Issue Dt:
08/19/2008
Application #:
11242149
Filing Dt:
10/04/2005
Publication #:
US20070076004
Pub Dt:
04/05/2007
Title:
SEMICONDUCTOR MEMORY CHIP
55
Patent #:
7221615
Issue Dt:
05/22/2007
Application #:
11242150
Filing Dt:
10/04/2005
Publication #:
US20070076508
Pub Dt:
04/05/2007
Title:
SEMICONDUCTOR MEMORY CHIP
56
Patent #:
7330053
Issue Dt:
02/12/2008
Application #:
11244856
Filing Dt:
10/06/2005
Publication #:
US20060076979
Pub Dt:
04/13/2006
Title:
PRESTAGE FOR AN OFF-CHIP DRIVER (OCD)
57
Patent #:
7248536
Issue Dt:
07/24/2007
Application #:
11245455
Filing Dt:
10/06/2005
Publication #:
US20060083100
Pub Dt:
04/20/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY AND METHOD FOR OPERATING AN INTEGRATED SEMICONDUCTOR MEMORY
58
Patent #:
7237211
Issue Dt:
06/26/2007
Application #:
11248605
Filing Dt:
10/12/2005
Publication #:
US20060080624
Pub Dt:
04/13/2006
Title:
METHOD FOR REDUCING THE EVALUATION OUTLAY IN THE MONITORING OF LAYOUT CHANGES FOR SEMICONDUCTOR CHIPS
59
Patent #:
7193919
Issue Dt:
03/20/2007
Application #:
11249773
Filing Dt:
10/12/2005
Publication #:
US20060087902
Pub Dt:
04/27/2006
Title:
SELECTIVE BANK REFRESH
60
Patent #:
7390742
Issue Dt:
06/24/2008
Application #:
11251594
Filing Dt:
10/14/2005
Publication #:
US20060121257
Pub Dt:
06/08/2006
Title:
METHOD FOR PRODUCING A REWIRING PRINTED CIRCUIT BOARD
61
Patent #:
7663248
Issue Dt:
02/16/2010
Application #:
11251602
Filing Dt:
10/14/2005
Publication #:
US20060102998
Pub Dt:
05/18/2006
Title:
FLIP-CHIP COMPONENT
62
Patent #:
7330391
Issue Dt:
02/12/2008
Application #:
11251678
Filing Dt:
10/17/2005
Publication #:
US20070086258
Pub Dt:
04/19/2007
Title:
MEMORY HAVING DIRECTED AUTO-REFRESH
63
Patent #:
7433261
Issue Dt:
10/07/2008
Application #:
11251683
Filing Dt:
10/17/2005
Publication #:
US20070086266
Pub Dt:
04/19/2007
Title:
DIRECTED AUTO-REFRESH FOR A DYNAMIC RANDOM ACCESS MEMORY
64
Patent #:
7426012
Issue Dt:
09/16/2008
Application #:
11252211
Filing Dt:
10/18/2005
Publication #:
US20060082748
Pub Dt:
04/20/2006
Title:
EXPOSURE DEVICE FOR IMMERSION LITHOGRAPHY AND METHOD FOR MONITORING PARAMETERS OF AN EXPOSURE DEVICE FOR IMMERSION LITHOGRAPHY
65
Patent #:
7211355
Issue Dt:
05/01/2007
Application #:
11252476
Filing Dt:
10/18/2005
Publication #:
US20060037939
Pub Dt:
02/23/2006
Title:
METHOD FOR PRODUCING PHASE SHIFTER MASKS
66
Patent #:
7371657
Issue Dt:
05/13/2008
Application #:
11252878
Filing Dt:
10/19/2005
Publication #:
US20070087516
Pub Dt:
04/19/2007
Title:
METHOD FOR FORMING AN ISOLATING TRENCH WITH A DIELECTRIC MATERIAL
67
Patent #:
7345948
Issue Dt:
03/18/2008
Application #:
11253715
Filing Dt:
10/20/2005
Publication #:
US20070091710
Pub Dt:
04/26/2007
Title:
CLOCK CIRCUIT FOR SEMICONDUCTOR MEMORIES
68
Patent #:
7324396
Issue Dt:
01/29/2008
Application #:
11253727
Filing Dt:
10/20/2005
Publication #:
US20070091699
Pub Dt:
04/26/2007
Title:
SENSE AMPLIFIER ORGANIZATION FOR TWIN CELL MEMORY DEVICES
69
Patent #:
7401270
Issue Dt:
07/15/2008
Application #:
11253728
Filing Dt:
10/20/2005
Publication #:
US20070113121
Pub Dt:
05/17/2007
Title:
REPAIR OF SEMICONDUCTOR MEMORY DEVICE VIA EXTERNAL COMMAND
70
Patent #:
7184339
Issue Dt:
02/27/2007
Application #:
11253807
Filing Dt:
10/20/2005
Publication #:
US20060087900
Pub Dt:
04/27/2006
Title:
SEMI-CONDUCTOR COMPONENT, AS WELL AS A PROCESS FOR THE IN-OR OUTPUT OF TEST DATA
71
Patent #:
7415649
Issue Dt:
08/19/2008
Application #:
11253813
Filing Dt:
10/20/2005
Publication #:
US20060253756
Pub Dt:
11/09/2006
Title:
SEMI-CONDUCTOR COMPONENT TEST DEVICE WITH SHIFT REGISTER, AND SEMI-CONDUCTOR COMPONENT TEST PROCEDURE
72
Patent #:
7421629
Issue Dt:
09/02/2008
Application #:
11253814
Filing Dt:
10/20/2005
Publication #:
US20060107155
Pub Dt:
05/18/2006
Title:
SEMI-CONDUCTOR COMPONENT TEST DEVICE, IN PARTICULAR DATA BUFFER COMPONENT WITH SEMI-CONDUCTOR COMPONENT TEST DEVICE, AS WELL AS SEMI-CONDUCTOR COMPONENT TEST PROCEDURE
73
Patent #:
7402490
Issue Dt:
07/22/2008
Application #:
11253939
Filing Dt:
10/19/2005
Publication #:
US20060091448
Pub Dt:
05/04/2006
Title:
CHARGE-TRAPPING MEMORY DEVICE AND METHODS FOR OPERATING AND MANUFACTURING THE CELL
74
Patent #:
7326612
Issue Dt:
02/05/2008
Application #:
11256676
Filing Dt:
10/21/2005
Publication #:
US20060110872
Pub Dt:
05/25/2006
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE
75
Patent #:
7360139
Issue Dt:
04/15/2008
Application #:
11257401
Filing Dt:
10/25/2005
Publication #:
US20060156149
Pub Dt:
07/13/2006
Title:
SEMICONDUCTOR COMPONENT, ARRANGEMENT AND METHOD FOR CHARACTERIZING A TESTER FOR SEMICONDUCTOR COMPONENTS
76
Patent #:
7514362
Issue Dt:
04/07/2009
Application #:
11258367
Filing Dt:
10/26/2005
Publication #:
US20060091476
Pub Dt:
05/04/2006
Title:
INTEGRATED CIRCUIT INCLUDING SUB-LITHOGRAPHIC STRUCTURES
77
Patent #:
7471569
Issue Dt:
12/30/2008
Application #:
11259318
Filing Dt:
10/26/2005
Publication #:
US20060285412
Pub Dt:
12/21/2006
Title:
MEMORY HAVING PARITY ERROR CORRECTION
78
Patent #:
7587655
Issue Dt:
09/08/2009
Application #:
11259376
Filing Dt:
10/26/2005
Publication #:
US20070091711
Pub Dt:
04/26/2007
Title:
METHOD OF TRANSFERRING SIGNALS BETWEEN A MEMORY DEVICE AND A MEMORY CONTROLLER
79
Patent #:
7149134
Issue Dt:
12/12/2006
Application #:
11259703
Filing Dt:
10/26/2005
Publication #:
US20060050574
Pub Dt:
03/09/2006
Title:
MEMORY DEVICE WITH COLUMN SELECT BEING VARIABLY DELAYED
80
Patent #:
7615770
Issue Dt:
11/10/2009
Application #:
11260346
Filing Dt:
10/27/2005
Publication #:
US20070096248
Pub Dt:
05/03/2007
Title:
INTEGRATED CIRCUIT HAVING AN INSULATED MEMORY
81
Patent #:
7245544
Issue Dt:
07/17/2007
Application #:
11260499
Filing Dt:
10/28/2005
Publication #:
US20060092736
Pub Dt:
05/04/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY DEVICE INCLUDING SENSE AMPLIFIERS
82
Patent #:
7411439
Issue Dt:
08/12/2008
Application #:
11260506
Filing Dt:
10/27/2005
Publication #:
US20060103446
Pub Dt:
05/18/2006
Title:
DRIVER CIRCUIT WITH REDUCED JITTER BETWEEN CIRCUIT DOMAINS
83
Patent #:
7248530
Issue Dt:
07/24/2007
Application #:
11261912
Filing Dt:
10/31/2005
Publication #:
US20060109705
Pub Dt:
05/25/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY DEVICE
84
Patent #:
7396482
Issue Dt:
07/08/2008
Application #:
11262420
Filing Dt:
10/28/2005
Publication #:
US20070099429
Pub Dt:
05/03/2007
Title:
POST EXPOSURE RESIST BAKE
85
Patent #:
7269093
Issue Dt:
09/11/2007
Application #:
11264060
Filing Dt:
10/31/2005
Publication #:
US20070097779
Pub Dt:
05/03/2007
Title:
GENERATING A SAMPLING CLOCK SIGNAL IN A COMMUNICATION BLOCK OF A MEMORY DEVICE
86
Patent #:
7417245
Issue Dt:
08/26/2008
Application #:
11265372
Filing Dt:
11/02/2005
Publication #:
US20070096162
Pub Dt:
05/03/2007
Title:
PHASE CHANGE MEMORY HAVING MULTILAYER THERMAL INSULATION
87
Patent #:
7973384
Issue Dt:
07/05/2011
Application #:
11265377
Filing Dt:
11/02/2005
Publication #:
US20070097739
Pub Dt:
05/03/2007
Title:
PHASE CHANGE MEMORY CELL INCLUDING MULTIPLE PHASE CHANGE MATERIAL PORTIONS
88
Patent #:
7330378
Issue Dt:
02/12/2008
Application #:
11266477
Filing Dt:
11/04/2005
Publication #:
US20060120139
Pub Dt:
06/08/2006
Title:
INPUTTING AND OUTPUTTING OPERATING PARAMETERS FOR AN INTEGRATED SEMICONDUCTOR MEMORY DEVICE
89
Patent #:
7330387
Issue Dt:
02/12/2008
Application #:
11267572
Filing Dt:
11/07/2005
Publication #:
US20060109727
Pub Dt:
05/25/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY DEVICE
90
Patent #:
7463507
Issue Dt:
12/09/2008
Application #:
11269898
Filing Dt:
11/09/2005
Publication #:
US20070103971
Pub Dt:
05/10/2007
Title:
MEMORY DEVICE WITH A PLURALITY OF MEMORY CELLS, IN PARTICULAR PCM MEMORY CELLS, AND METHOD FOR OPERATING SUCH A MEMORY CELL DEVICE
91
Patent #:
7366047
Issue Dt:
04/29/2008
Application #:
11270178
Filing Dt:
11/09/2005
Publication #:
US20070104005
Pub Dt:
05/10/2007
Title:
METHOD AND APPARATUS FOR REDUCING STANDBY CURRENT IN A DYNAMIC RANDOM ACCESS MEMORY DURING SELF REFRESH
92
Patent #:
7300855
Issue Dt:
11/27/2007
Application #:
11270294
Filing Dt:
11/09/2005
Publication #:
US20060105553
Pub Dt:
05/18/2006
Title:
REVERSIBLE OXIDATION PROTECTION OF MICROCOMPONENTS
93
Patent #:
7420399
Issue Dt:
09/02/2008
Application #:
11271015
Filing Dt:
11/10/2005
Publication #:
US20070103216
Pub Dt:
05/10/2007
Title:
DUTY CYCLE CORRECTOR
94
Patent #:
7293250
Issue Dt:
11/06/2007
Application #:
11272023
Filing Dt:
11/14/2005
Publication #:
US20070109903
Pub Dt:
05/17/2007
Title:
METHOD OF MODELING PHYSICAL LAYOUT OF AN ELECTRONIC COMPONENT IN CHANNEL SIMULATION
95
Patent #:
7457170
Issue Dt:
11/25/2008
Application #:
11273058
Filing Dt:
11/14/2005
Publication #:
US20070109887
Pub Dt:
05/17/2007
Title:
MEMORY DEVICE THAT PROVIDES TEST RESULTS TO MULTIPLE OUTPUT PADS
96
Patent #:
7544270
Issue Dt:
06/09/2009
Application #:
11273244
Filing Dt:
11/14/2005
Publication #:
US20070111339
Pub Dt:
05/17/2007
Title:
APPARATUS FOR PROCESSING A SUBSTRATE
97
Patent #:
7411815
Issue Dt:
08/12/2008
Application #:
11273248
Filing Dt:
11/14/2005
Publication #:
US20070109840
Pub Dt:
05/17/2007
Title:
MEMORY WRITE CIRCUIT
98
Patent #:
7348279
Issue Dt:
03/25/2008
Application #:
11273261
Filing Dt:
11/15/2005
Publication #:
US20060110903
Pub Dt:
05/25/2006
Title:
METHOD OF MAKING AN INTEGRATED CIRCUIT, INCLUDING FORMING A CONTACT
99
Patent #:
7372749
Issue Dt:
05/13/2008
Application #:
11274059
Filing Dt:
11/14/2005
Publication #:
US20060126407
Pub Dt:
06/15/2006
Title:
METHODS FOR REPAIRING AND FOR OPERATING A MEMORY COMPONENT
100
Patent #:
7323357
Issue Dt:
01/29/2008
Application #:
11280864
Filing Dt:
11/17/2005
Publication #:
US20070111333
Pub Dt:
05/17/2007
Title:
METHOD FOR MANUFACTURING A RESISTIVELY SWITCHING MEMORY CELL AND MEMORY DEVICE BASED THEREON
Assignor
1
QIMONDA AG
Exec Dt:
10/09/2014
Assignee
1
INFINEON TECHNOLOGIES AG
AM CAMPEON 1-12
NEUBIBERG, GERMANY 85579
Correspondence name and address
CPA GLOBAL LIMITED
LIBERATION HOUSE
CASTLE STREET
ST HELIER, JE1 1BL JERSEY

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