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Patent Assignment Details
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Reel/Frame:035623/0001   Pages: 181
Recorded: 05/08/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4024
Page 34 of 41
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
1
Patent #:
Issue Dt:
09/01/2009
Application #:
11362960
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
07/06/2006
Title:
INTEGRATED CIRCUIT COMPRISING AN ORGANIC SEMICONDUCTOR, AND METHOD FOR THE PRODUCTION OF AN INTEGRATED CIRCUIT
2
Patent #:
Issue Dt:
04/08/2008
Application #:
11363263
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/31/2006
Title:
FIELD EFFECT TRANSISTOR WITH GATE SPACER STRUCTURE AND LOW-RESISTANCE CHANNEL COUPLING
3
Patent #:
Issue Dt:
07/23/2013
Application #:
11363494
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
METHOD OF FABRICATING AN INTEGRATED ELECTRONIC CIRCUIT WITH PROGRAMMABLE RESISTANCE CELLS
4
Patent #:
Issue Dt:
05/20/2008
Application #:
11364365
Filing Dt:
03/01/2006
Publication #:
Pub Dt:
09/07/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY HAVING SENSE AMPLIFIERS SELECTIVELY ACTIVATED AT DIFFERENT TIMING
5
Patent #:
Issue Dt:
01/12/2010
Application #:
11364770
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/10/2006
Title:
SEMICONDUCTOR MODULE FOR MAKING ELECTRICAL CONTACT WITH A CONNECTION DEVICE VIA A REWIRING DEVICE
6
Patent #:
Issue Dt:
04/22/2008
Application #:
11366151
Filing Dt:
03/02/2006
Publication #:
Pub Dt:
09/06/2007
Title:
PHASE CHANGE MEMORY FABRICATED USING SELF-ALIGNED PROCESSING
7
Patent #:
Issue Dt:
01/29/2008
Application #:
11366370
Filing Dt:
03/02/2006
Publication #:
Pub Dt:
10/04/2007
Title:
PHASE CHANGE MEMORY FABRICATED USING SELF-ALIGNED PROCESSING
8
Patent #:
Issue Dt:
02/24/2009
Application #:
11366706
Filing Dt:
03/02/2006
Publication #:
Pub Dt:
10/04/2007
Title:
PHASE CHANGE MEMORY FABRICATED USING SELF-ALIGNED PROCESSING
9
Patent #:
Issue Dt:
03/11/2008
Application #:
11367731
Filing Dt:
03/03/2006
Publication #:
Pub Dt:
08/10/2006
Title:
CAPACITORLESS 1-TRANSISTOR DRAM CELL AND FABRICATION METHOD
10
Patent #:
Issue Dt:
03/11/2008
Application #:
11368266
Filing Dt:
03/03/2006
Publication #:
Pub Dt:
09/06/2007
Title:
METHODS FOR GENERATING A REFERENCE VOLTAGE AND FOR READING A MEMORY CELL AND CIRCUIT CONFIGURATIONS IMPLEMENTING THE METHODS
11
Patent #:
Issue Dt:
01/12/2010
Application #:
11368267
Filing Dt:
03/03/2006
Publication #:
Pub Dt:
10/12/2006
Title:
BUFFER COMPONENT FOR A MEMORY MODULE, AND A MEMORY MODULE AND A MEMORY SYSTEM HAVING SUCH BUFFER COMPONENT
12
Patent #:
Issue Dt:
11/04/2008
Application #:
11369275
Filing Dt:
03/07/2006
Publication #:
Pub Dt:
09/13/2007
Title:
MEMORY DEVICE AND METHOD FOR OPERATING SUCH A MEMORY DEVICE
13
Patent #:
Issue Dt:
01/06/2009
Application #:
11370172
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
09/13/2007
Title:
INTEGRATED SEMICONDUCTOR MEMORY DEVICE
14
Patent #:
Issue Dt:
11/10/2009
Application #:
11370559
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
07/13/2006
Title:
MULTICHIP PACKAGE WITH CLOCK FREQUENCY ADJUSTMENT
15
Patent #:
Issue Dt:
09/18/2007
Application #:
11371237
Filing Dt:
03/09/2006
Publication #:
Pub Dt:
09/13/2007
Title:
METHOD FOR DETERMINING AN EDGE PROFILE OF A VOLUME OF A PHOTORESIST AFTER A DEVELOPMENT PROCESS
16
Patent #:
Issue Dt:
05/20/2008
Application #:
11371743
Filing Dt:
03/09/2006
Publication #:
Pub Dt:
07/06/2006
Title:
METHOD FOR PRODUCING SEMICONDUCTOR MEMORY DEVICES AND INTEGRATED MEMORY DEVICE
17
Patent #:
Issue Dt:
12/25/2007
Application #:
11372470
Filing Dt:
03/09/2006
Publication #:
Pub Dt:
09/21/2006
Title:
DEVICE AND METHOD FOR TESTING AN ELECTRICAL CIRCUIT
18
Patent #:
Issue Dt:
07/29/2008
Application #:
11372738
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/28/2006
Title:
CIRCUIT FOR DATA BIT INVERSION
19
Patent #:
Issue Dt:
12/22/2009
Application #:
11372754
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
10/12/2006
Title:
DEVICE AND METHOD FOR TESTING AN ELECTRIC CIRCUIT
20
Patent #:
Issue Dt:
05/27/2008
Application #:
11373080
Filing Dt:
03/09/2006
Publication #:
Pub Dt:
07/13/2006
Title:
SELF-ALIGNED V0-CONTACT FOR CELL SIZE REDUCTION
21
Patent #:
Issue Dt:
09/25/2007
Application #:
11374391
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
09/28/2006
Title:
CONTACTING DEVICE, TESTING METHOD AND CORRESPONDING PRODUCTION METHOD
22
Patent #:
Issue Dt:
04/21/2009
Application #:
11374413
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
09/13/2007
Title:
MEMORY CIRCUIT, METHOD FOR OPERATING A MEMORY CIRCUIT, MEMORY DEVICE AND METHOD FOR PRODUCING A MEMORY DEVICE
23
Patent #:
Issue Dt:
06/05/2007
Application #:
11374990
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/28/2006
Title:
CLOCK SIGNAL INPUT/OUTPUT DEVICE FOR CORRECTING CLOCK SIGNALS
24
Patent #:
Issue Dt:
09/09/2008
Application #:
11375365
Filing Dt:
03/14/2006
Publication #:
Pub Dt:
09/20/2007
Title:
Integrated Circuit Having A Memory Cell
25
Patent #:
Issue Dt:
04/08/2008
Application #:
11375994
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
01/11/2007
Title:
SEMICONDUCTOR MEMORY COMPONENT AND METHOD FOR TESTING SEMICONDUCTOR MEMORY COMPONENTS HAVING A RESTRICTED MEMORY AREA (PARTIAL GOOD MEMORIES)
26
Patent #:
Issue Dt:
06/03/2008
Application #:
11376447
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
11/09/2006
Title:
SEMICONDUCTOR MEMORY COMPONENT AND METHOD FOR TESTING SEMICONDUCTOR MEMORY COMPONENTS
27
Patent #:
Issue Dt:
02/16/2010
Application #:
11376645
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
HARD MASK LAYER STACK AND A METHOD OF PATTERNING
28
Patent #:
Issue Dt:
01/06/2009
Application #:
11378201
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
09/20/2007
Title:
INTERGRATED CIRCUIT INCLUDING RESISTIVITY CHANGING MATERIAL ELEMENT
29
Patent #:
Issue Dt:
11/17/2009
Application #:
11382231
Filing Dt:
05/08/2006
Publication #:
Pub Dt:
12/14/2006
Title:
CONTROLLABLE DELAY DEVICE
30
Patent #:
Issue Dt:
04/14/2009
Application #:
11384811
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
03/22/2007
Title:
METHOD AND DEVICE FOR TRANSMISSION OF ADJUSTMENT INFORMATION FOR DATA INTERFACE DRIVERS FOR A RAM MODULE
31
Patent #:
Issue Dt:
04/22/2008
Application #:
11385340
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
09/27/2007
Title:
PARALLEL READ FOR FRONT END COMPRESSION MODE
32
Patent #:
Issue Dt:
04/08/2008
Application #:
11386043
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
10/19/2006
Title:
DEVICE IN A MEMORY CIRCUIT FOR DEFINITION OF WAITING TIMES
33
Patent #:
Issue Dt:
09/18/2007
Application #:
11386048
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
09/27/2007
Title:
MEMORY WITH A TEMPERATURE SENSOR, DYNAMIC MEMORY AND MEMORY WITH A CLOCK UNIT AND METHOD OF SENSING A TEMPERATURE OF A MEMORY
34
Patent #:
Issue Dt:
11/25/2008
Application #:
11386176
Filing Dt:
03/22/2006
Publication #:
Pub Dt:
10/18/2007
Title:
FINDING A DATA PATTERN IN A MEMORY
35
Patent #:
Issue Dt:
08/19/2008
Application #:
11386360
Filing Dt:
03/22/2006
Publication #:
Pub Dt:
09/27/2007
Title:
MEMORY INCLUDING A WRITE TRAINING BLOCK
36
Patent #:
Issue Dt:
11/18/2008
Application #:
11386377
Filing Dt:
03/22/2006
Publication #:
Pub Dt:
09/27/2007
Title:
FILTERING BIT POSITION IN A MEMORY
37
Patent #:
Issue Dt:
07/21/2009
Application #:
11386510
Filing Dt:
03/22/2006
Publication #:
Pub Dt:
11/08/2007
Title:
MEMORY INCLUDING AN OUTPUT POINTER CIRCUIT
38
Patent #:
Issue Dt:
07/10/2007
Application #:
11386512
Filing Dt:
03/22/2006
Publication #:
Pub Dt:
07/20/2006
Title:
SYSTEM AND METHOD FOR TESTING ONE OR MORE DIES ON A SEMICONDUCTOR WAFER
39
Patent #:
Issue Dt:
02/17/2009
Application #:
11387879
Filing Dt:
03/24/2006
Publication #:
Pub Dt:
09/27/2007
Title:
REDUCING LEAKAGE CURRENT IN MEMORY DEVICE USING BITLINE ISOLATION
40
Patent #:
Issue Dt:
04/22/2008
Application #:
11388234
Filing Dt:
03/23/2006
Publication #:
Pub Dt:
09/27/2007
Title:
MANUFACTURING METHOD FOR AN INTEGRATED SEMICONDUCTOR STRUCTURE
41
Patent #:
Issue Dt:
01/08/2008
Application #:
11389540
Filing Dt:
03/27/2006
Publication #:
Pub Dt:
10/19/2006
Title:
INTEGRATED CIRCUIT WITH ELECTROSTATIC DISCHARGE PROTECTION
42
Patent #:
Issue Dt:
04/14/2009
Application #:
11390557
Filing Dt:
03/27/2006
Publication #:
Pub Dt:
10/19/2006
Title:
SYNCHRONOUS RAM MEMORY CIRCUIT
43
Patent #:
Issue Dt:
05/12/2009
Application #:
11390983
Filing Dt:
03/27/2006
Publication #:
Pub Dt:
09/27/2007
Title:
METHOD FOR FORMING AN INTEGRATED MEMORY DEVICE AND MEMORY DEVICE
44
Patent #:
Issue Dt:
08/05/2008
Application #:
11390997
Filing Dt:
03/27/2006
Publication #:
Pub Dt:
09/27/2007
Title:
CHARGE TRAPPING DEVICE AND METHOD OF PRODUCING THE CHARGE TRAPPING DEVICE
45
Patent #:
Issue Dt:
11/11/2008
Application #:
11392522
Filing Dt:
03/29/2006
Publication #:
Pub Dt:
10/05/2006
Title:
METHOD FOR INITIALIZATION OF ELECTRONIC CIRCUIT UNITS, AND ELECTRIC CIRCUIT
46
Patent #:
Issue Dt:
05/27/2008
Application #:
11392523
Filing Dt:
03/29/2006
Publication #:
Pub Dt:
11/16/2006
Title:
METHOD FOR PATTERNING A SEMICONDUCTOR COMPONENT
47
Patent #:
Issue Dt:
04/22/2008
Application #:
11394142
Filing Dt:
03/30/2006
Publication #:
Pub Dt:
11/09/2006
Title:
MEMORY ARRANGEMENT HAVING A PLURALITY OF RAM CHIPS
48
Patent #:
Issue Dt:
11/25/2008
Application #:
11395111
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
12/14/2006
Title:
SEMICONDUCTOR HAVING STRUCTURE WITH OPENINGS
49
Patent #:
Issue Dt:
05/27/2008
Application #:
11397429
Filing Dt:
04/04/2006
Publication #:
Pub Dt:
10/04/2007
Title:
METHODS OF DDR RECEIVER READ RE-SYNCHRONIZATION
50
Patent #:
Issue Dt:
02/10/2009
Application #:
11397790
Filing Dt:
04/04/2006
Publication #:
Pub Dt:
10/26/2006
Title:
METHOD AND APPARATUS FOR MASKING KNOWN FAILS DURING MEMORY TESTS READOUTS
51
Patent #:
Issue Dt:
08/12/2008
Application #:
11398852
Filing Dt:
04/06/2006
Publication #:
Pub Dt:
10/19/2006
Title:
METHOD FOR FABRICATING A NONVOLATILE MEMORY ELEMENT AND A NONVOLATILE MEMORY ELEMENT
52
Patent #:
Issue Dt:
11/11/2008
Application #:
11399228
Filing Dt:
04/06/2006
Publication #:
Pub Dt:
10/11/2007
Title:
METHOD AND SYSTEM FOR THE OPTICAL INSPECTION OF CONTACT FACES AT SEMICONDUCTOR DEVICES WITH DIFFERENT APPEARANCES
53
Patent #:
Issue Dt:
05/12/2009
Application #:
11399811
Filing Dt:
04/07/2006
Publication #:
Pub Dt:
10/19/2006
Title:
METHOD FOR FABRICATING AN ELECTRICAL COMPONENT
54
Patent #:
Issue Dt:
03/11/2008
Application #:
11402412
Filing Dt:
04/12/2006
Publication #:
Pub Dt:
08/24/2006
Title:
STANDBY CURRENT REDUCTION OVER A PROCESS WINDOW WITH A TRIMMABLE WELL BIAS
55
Patent #:
Issue Dt:
07/21/2009
Application #:
11402649
Filing Dt:
04/12/2006
Publication #:
Pub Dt:
10/18/2007
Title:
METHOD FOR PROGRAMMING A BLOCK OF MEMORY CELLS, NON-VOLATILE MEMORY DEVICE AND MEMORY CARD DEVICE
56
Patent #:
Issue Dt:
08/12/2008
Application #:
11406073
Filing Dt:
04/18/2006
Publication #:
Pub Dt:
10/18/2007
Title:
SYSTEM AND METHOD FOR CONTROLLING CONSTANT POWER DISSIPATION
57
Patent #:
Issue Dt:
02/24/2009
Application #:
11406803
Filing Dt:
04/19/2006
Publication #:
Pub Dt:
10/25/2007
Title:
CIRCUIT AND A METHOD OF DETERMINING THE RESISTIVE STATE OF A RESISTIVE MEMORY CELL
58
Patent #:
Issue Dt:
05/13/2008
Application #:
11407339
Filing Dt:
04/20/2006
Publication #:
Pub Dt:
10/25/2007
Title:
APPARATUS AND METHOD FOR MONITORING TRENCH PROFILES AND FOR SPECTROMETROLOGIC ANALYSIS
59
Patent #:
Issue Dt:
11/25/2008
Application #:
11410320
Filing Dt:
04/24/2006
Publication #:
Pub Dt:
11/23/2006
Title:
SEMICONDUCTOR MEMORY AND METHOD FOR ADAPTING THE PHASE RELATIONSHIP BETWEEN A CLOCK SIGNAL AND STROBE SIGNAL DURING THE ACCEPTANCE OF WRITE DATA TO BE TRANSMITTED
60
Patent #:
Issue Dt:
07/28/2009
Application #:
11412067
Filing Dt:
04/27/2006
Publication #:
Pub Dt:
12/28/2006
Title:
MAGNETORESISTIVE MEMORY CELL AND PROCESS FOR PRODUCING THE SAME
61
Patent #:
Issue Dt:
04/13/2010
Application #:
11413320
Filing Dt:
04/28/2006
Publication #:
Pub Dt:
11/09/2006
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT
62
Patent #:
Issue Dt:
07/22/2008
Application #:
11414364
Filing Dt:
05/01/2006
Publication #:
Pub Dt:
11/01/2007
Title:
BITLINE LEAKAGE LIMITING WITH IMPROVED VOLTAGE REGULATION
63
Patent #:
Issue Dt:
03/16/2010
Application #:
11414553
Filing Dt:
05/01/2006
Publication #:
Pub Dt:
11/01/2007
Title:
VERTICAL DEVICE WITH SIDEWALL SPACER, METHODS OF FORMING SIDEWALL SPACERS AND FIELD EFFECT TRANSISTORS, AND PATTERNING METHOD
64
Patent #:
Issue Dt:
10/16/2007
Application #:
11414554
Filing Dt:
05/01/2006
Publication #:
Pub Dt:
12/07/2006
Title:
INTEGRATED SEMICONDUCTOR MEMORY
65
Patent #:
Issue Dt:
10/07/2008
Application #:
11415443
Filing Dt:
05/01/2006
Publication #:
Pub Dt:
11/23/2006
Title:
INTEGRATED CIRCUIT, TEST SYSTEM AND METHOD FOR READING OUT AN ERROR DATUM FROM THE INTEGRATED CIRCUIT
66
Patent #:
Issue Dt:
04/15/2008
Application #:
11427336
Filing Dt:
06/28/2006
Publication #:
Pub Dt:
01/04/2007
Title:
MULTI-CONTEXT MEMORY CELL
67
Patent #:
Issue Dt:
07/15/2008
Application #:
11427337
Filing Dt:
06/28/2006
Publication #:
Pub Dt:
01/04/2007
Title:
MEMORY ELEMENT, MEMORY READ-OUT ELEMENT AND MEMORY CELL
68
Patent #:
Issue Dt:
05/11/2010
Application #:
11437211
Filing Dt:
05/19/2006
Publication #:
Pub Dt:
08/09/2007
Title:
THERMAL ISOLATION OF PHASE CHANGE MEMORY CELLS
69
Patent #:
Issue Dt:
08/05/2008
Application #:
11437669
Filing Dt:
05/22/2006
Publication #:
Pub Dt:
09/21/2006
Title:
SIMULATING A FLOATING WORDLINE CONDITION IN A MEMORY DEVICE, AND RELATED TECHNIQUES
70
Patent #:
Issue Dt:
06/24/2008
Application #:
11437825
Filing Dt:
05/22/2006
Publication #:
Pub Dt:
12/07/2006
Title:
DELAY LOCKED LOOP AND METHOD FOR SETTING A DELAY CHAIN
71
Patent #:
Issue Dt:
05/20/2008
Application #:
11437846
Filing Dt:
05/19/2006
Publication #:
Pub Dt:
04/26/2007
Title:
MEMORY MODULE WITH AN ELECTRONIC PRINTED CIRCUIT BOARD AND A PLURALITY OF SEMICONDUCTOR CHIPS OF THE SAME TYPE
72
Patent #:
Issue Dt:
02/01/2011
Application #:
11438450
Filing Dt:
05/22/2006
Publication #:
Pub Dt:
11/22/2007
Title:
MEMORY USING TUNNELING FIELD EFFECT TRANSISTORS
73
Patent #:
Issue Dt:
08/26/2008
Application #:
11438700
Filing Dt:
05/23/2006
Publication #:
Pub Dt:
11/29/2007
Title:
METHOD FOR PRODUCING A DIELECTRIC INTERLAYER AND STORAGE CAPACITOR WITH SUCH A DIELECTRIC INTERLAYER
74
Patent #:
Issue Dt:
10/06/2009
Application #:
11438883
Filing Dt:
05/23/2006
Publication #:
Pub Dt:
11/30/2006
Title:
SEMICONDUCTOR MEMORY COMPONENT
75
Patent #:
Issue Dt:
10/21/2008
Application #:
11439441
Filing Dt:
05/24/2006
Publication #:
Pub Dt:
11/30/2006
Title:
CONTACT STRUCTURE FOR A STACK DRAM STORAGE CAPACITOR
76
Patent #:
Issue Dt:
01/01/2008
Application #:
11439443
Filing Dt:
05/24/2006
Publication #:
Pub Dt:
05/03/2007
Title:
SEMICONDUCTOR MEMORY MODULE
77
Patent #:
Issue Dt:
08/31/2010
Application #:
11441805
Filing Dt:
05/26/2006
Publication #:
Pub Dt:
12/28/2006
Title:
INTEGRATED CIRCUIT HAVING A RESISTIVE MEMORY
78
Patent #:
Issue Dt:
12/04/2007
Application #:
11442842
Filing Dt:
05/30/2006
Publication #:
Pub Dt:
09/28/2006
Title:
DUTY CYCLE CORRECTOR
79
Patent #:
Issue Dt:
09/15/2009
Application #:
11443432
Filing Dt:
05/31/2006
Publication #:
Pub Dt:
12/06/2007
Title:
MEMORY CELL ARRAY AND METHOD OF FORMING A MEMORY CELL ARRAY
80
Patent #:
Issue Dt:
10/07/2008
Application #:
11443493
Filing Dt:
05/30/2006
Publication #:
Pub Dt:
12/27/2007
Title:
INTEGRATED MEMORY DEVICE AND METHOD FOR ITS TESTING AND MANUFACTURE
81
Patent #:
Issue Dt:
05/20/2008
Application #:
11443602
Filing Dt:
05/31/2006
Publication #:
Pub Dt:
12/06/2007
Title:
MANUFACTURING METHOD FOR AN INTEGRATED SEMICONDUCTOR STRUCTURE
82
Patent #:
Issue Dt:
03/25/2008
Application #:
11444289
Filing Dt:
05/31/2006
Publication #:
Pub Dt:
12/06/2007
Title:
CHARGE-TRAPPING MEMORY DEVICE AND METHODS FOR ITS MANUFACTURING AND OPERATION
83
Patent #:
Issue Dt:
10/14/2008
Application #:
11444295
Filing Dt:
05/31/2006
Publication #:
Pub Dt:
03/01/2007
Title:
NONVOLATILE MEMORY CELL
84
Patent #:
Issue Dt:
07/22/2008
Application #:
11444914
Filing Dt:
06/01/2006
Publication #:
Pub Dt:
12/14/2006
Title:
ELECTRONIC MEMORY APPARATUS AND METHOD FOR OPERATING AN ELECTRONIC MEMORY APPARATUS
85
Patent #:
Issue Dt:
05/06/2008
Application #:
11445405
Filing Dt:
06/01/2006
Publication #:
Pub Dt:
02/15/2007
Title:
SEMICONDUCTOR CIRCUIT ARRANGEMENT WITH TRENCH ISOLATION AND FABRICATION METHOD
86
Patent #:
Issue Dt:
12/01/2009
Application #:
11445801
Filing Dt:
06/02/2006
Publication #:
Pub Dt:
12/06/2007
Title:
MEMORY DEVICE, IN PARTICULAR PHASE CHANGE RANDOM ACCESS MEMORY DEVICE WITH TRANSISTOR, AND METHOD FOR FABRICATING A MEMORY DEVICE
87
Patent #:
Issue Dt:
01/06/2009
Application #:
11448168
Filing Dt:
06/06/2006
Publication #:
Pub Dt:
01/11/2007
Title:
METHOD AND SYSTEM FOR PERFORMING NON-LOCAL GEOMETRIC OPERATIONS FOR THE LAYOUT DESIGN OF A SEMICONDUCTOR DEVICE
88
Patent #:
Issue Dt:
08/24/2010
Application #:
11448170
Filing Dt:
06/06/2006
Publication #:
Pub Dt:
12/06/2007
Title:
MRAM STRUCTURE USING SACRIFICIAL LAYER FOR ANTI-FERROMAGNET AND METHOD OF MANUFACTURE
89
Patent #:
Issue Dt:
12/01/2009
Application #:
11450605
Filing Dt:
06/09/2006
Publication #:
Pub Dt:
12/13/2007
Title:
INTERGRATED CIRCUIT HAVING A PRECHARGING CIRCUIT
90
Patent #:
Issue Dt:
01/19/2010
Application #:
11452417
Filing Dt:
06/14/2006
Publication #:
Pub Dt:
11/22/2007
Title:
PROGRAMMABLE RESISTIVE MEMORY CELL WITH A PROGRAMMABLE RESISTANCE LAYER
91
Patent #:
Issue Dt:
11/04/2008
Application #:
11453946
Filing Dt:
06/15/2006
Publication #:
Pub Dt:
12/27/2007
Title:
RANDOM ACCESS MEMORY INCLUDING MULTIPLE STATE MACHINES
92
Patent #:
Issue Dt:
11/25/2008
Application #:
11455340
Filing Dt:
06/19/2006
Publication #:
Pub Dt:
12/27/2007
Title:
MEMORY CELL PROGRAMMED USING A TEMPERATURE CONTROLLED SET PULSE
93
Patent #:
Issue Dt:
10/21/2008
Application #:
11456063
Filing Dt:
07/06/2006
Publication #:
Pub Dt:
01/10/2008
Title:
METHOD FOR ACCESSING A NON-VOLATILE MEMORY VIA A VOLATILE MEMORY INTERFACE
94
Patent #:
Issue Dt:
10/21/2008
Application #:
11457133
Filing Dt:
07/12/2006
Publication #:
Pub Dt:
01/17/2008
Title:
APPARATUS AND METHOD FOR CONTROLLING A DRIVER STRENGTH
95
Patent #:
Issue Dt:
09/23/2008
Application #:
11459289
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
01/24/2008
Title:
METHOD AND MEMORY CIRCUIT FOR OPERATING A RESISTIVE MEMORY CELL
96
Patent #:
Issue Dt:
05/12/2009
Application #:
11461380
Filing Dt:
07/31/2006
Publication #:
Pub Dt:
02/15/2007
Title:
MEMORY CHIP WITH SETTABLE TERMINATION RESISTANCE CIRCUIT
97
Patent #:
Issue Dt:
06/21/2011
Application #:
11464215
Filing Dt:
08/14/2006
Publication #:
Pub Dt:
04/23/2009
Title:
MEMORY SYSTEM AND METHOD FOR OPERATING A MEMORY SYSTEM
98
Patent #:
Issue Dt:
04/19/2011
Application #:
11464784
Filing Dt:
08/15/2006
Publication #:
Pub Dt:
02/21/2008
Title:
INTEGRATED CIRCUIT PACKAGE WITH A HEAT DISSIPATION DEVICE
99
Patent #:
Issue Dt:
11/25/2008
Application #:
11464999
Filing Dt:
08/16/2006
Publication #:
Pub Dt:
05/24/2007
Title:
PHASE SHIFTER
100
Patent #:
Issue Dt:
02/08/2011
Application #:
11466312
Filing Dt:
08/22/2006
Publication #:
Pub Dt:
02/28/2008
Title:
METHOD AND CIRCUIT FOR TRANSMITTING A MEMORY CLOCK SIGNAL
Assignor
1
Exec Dt:
10/09/2014
Assignee
1
AM CAMPEON 1-12
NEUBIBERG, GERMANY 85579
Correspondence name and address
CPA GLOBAL LIMITED
LIBERATION HOUSE
CASTLE STREET
ST HELIER, JE1 1BL JERSEY

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