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Reel/Frame:035623/0001   Pages: 181
Recorded: 05/08/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4024
Page 35 of 41
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
1
Patent #:
7359226
Issue Dt:
04/15/2008
Application #:
11467747
Filing Dt:
08/28/2006
Publication #:
US20080049486
Pub Dt:
02/28/2008
Title:
TRANSISTOR, MEMORY CELL ARRAY AND METHOD FOR FORMING AND OPERATING A MEMORY DEVICE
2
Patent #:
7420841
Issue Dt:
09/02/2008
Application #:
11468465
Filing Dt:
08/30/2006
Publication #:
US20080055987
Pub Dt:
03/06/2008
Title:
MEMORY DEVICE AND METHOD FOR TRANSFORMING BETWEEN NON-POWER-OF-2 LEVELS OF MULTILEVEL MEMORY CELLS AND 2-LEVEL DATA BITS
3
Patent #:
7409308
Issue Dt:
08/05/2008
Application #:
11469365
Filing Dt:
08/31/2006
Publication #:
US20080059102
Pub Dt:
03/06/2008
Title:
METHOD AND DEVICE FOR VERIFYING OUTPUT SIGNALS OF AN INTEGRATED CIRCUIT
4
Patent #:
8038850
Issue Dt:
10/18/2011
Application #:
11473441
Filing Dt:
06/23/2006
Publication #:
US20070295597
Pub Dt:
12/27/2007
Title:
SPUTTER DEPOSITION METHOD FOR FORMING INTEGRATED CIRCUIT
5
Patent #:
7355468
Issue Dt:
04/08/2008
Application #:
11473519
Filing Dt:
06/23/2006
Publication #:
US20070296486
Pub Dt:
12/27/2007
Title:
VOLTAGE GENERATOR CIRCUIT, METHOD FOR PROVIDING AN OUTPUT VOLTAGE AND ELECTRONIC MEMORY DEVICE
6
Patent #:
7903452
Issue Dt:
03/08/2011
Application #:
11473531
Filing Dt:
06/23/2006
Publication #:
US20070297219
Pub Dt:
12/27/2007
Title:
MAGNETORESISTIVE MEMORY CELL
7
Patent #:
7643332
Issue Dt:
01/05/2010
Application #:
11474080
Filing Dt:
06/23/2006
Publication #:
US20070297222
Pub Dt:
12/27/2007
Title:
MRAM CELL USING MULTIPLE AXES MAGNETIZATION AND METHOD OF OPERATION
8
Patent #:
7476980
Issue Dt:
01/13/2009
Application #:
11475720
Filing Dt:
06/27/2006
Publication #:
US20070298603
Pub Dt:
12/27/2007
Title:
DIE CONFIGURATIONS AND METHODS OF MANUFACTURE
9
Patent #:
7425861
Issue Dt:
09/16/2008
Application #:
11477077
Filing Dt:
06/28/2006
Publication #:
US20070008796
Pub Dt:
01/11/2007
Title:
DEVICE AND METHOD FOR REGULATING THE THRESHOLD VOLTAGE OF A TRANSISTOR
10
Patent #:
7615444
Issue Dt:
11/10/2009
Application #:
11477581
Filing Dt:
06/29/2006
Publication #:
US20080003740
Pub Dt:
01/03/2008
Title:
METHOD FOR FORMING A CAPACITOR STRUCTURE
11
Patent #:
7678654
Issue Dt:
03/16/2010
Application #:
11478313
Filing Dt:
06/30/2006
Publication #:
US20080002466
Pub Dt:
01/03/2008
Title:
BURIED BITLINE WITH REDUCED RESISTANCE
12
Patent #:
7564735
Issue Dt:
07/21/2009
Application #:
11481157
Filing Dt:
07/05/2006
Publication #:
US20080008023
Pub Dt:
01/10/2008
Title:
MEMORY DEVICE, AND METHOD FOR OPERATING A MEMORY DEVICE
13
Patent #:
7369456
Issue Dt:
05/06/2008
Application #:
11481495
Filing Dt:
07/05/2006
Publication #:
US20070008808
Pub Dt:
01/11/2007
Title:
DRAM MEMORY WITH AUTOPRECHARGE
14
Patent #:
7351072
Issue Dt:
04/01/2008
Application #:
11481676
Filing Dt:
07/06/2006
Publication #:
US20070015381
Pub Dt:
01/18/2007
Title:
MEMORY MODULE, MEMORY EXTENSION MEMORY MODULE, MEMORY MODULE SYSTEM, AND METHOD FOR MANUFACTURING A MEMORY MODULE
15
Patent #:
7425487
Issue Dt:
09/16/2008
Application #:
11482493
Filing Dt:
07/07/2006
Publication #:
US20060261419
Pub Dt:
11/23/2006
Title:
METHOD FOR FABRICATING A NANOELEMENT FIELD EFFECT TRANSISTOR WITH SURROUNDED GATE STRUCTURE
16
Patent #:
7605019
Issue Dt:
10/20/2009
Application #:
11483197
Filing Dt:
07/07/2006
Publication #:
US20080032448
Pub Dt:
02/07/2008
Title:
SEMICONDUCTOR DEVICE WITH STACKED CHIPS AND METHOD FOR MANUFACTURING THEREOF
17
Patent #:
7423282
Issue Dt:
09/09/2008
Application #:
11483264
Filing Dt:
07/06/2006
Publication #:
US20080006810
Pub Dt:
01/10/2008
Title:
MEMORY STRUCTURE AND METHOD OF MANUFACTURE
18
Patent #:
7663909
Issue Dt:
02/16/2010
Application #:
11483873
Filing Dt:
07/10/2006
Publication #:
US20080006811
Pub Dt:
01/10/2008
Title:
INTEGRATED CIRCUIT HAVING A PHASE CHANGE MEMORY CELL INCLUDING A NARROW ACTIVE REGION WIDTH
19
Patent #:
7790516
Issue Dt:
09/07/2010
Application #:
11483968
Filing Dt:
07/10/2006
Publication #:
US20080009115
Pub Dt:
01/10/2008
Title:
METHOD OF MANUFACTURING AT LEAST ONE SEMICONDUCTOR COMPONENT AND MEMORY CELLS
20
Patent #:
7403438
Issue Dt:
07/22/2008
Application #:
11485185
Filing Dt:
07/12/2006
Publication #:
US20080013390
Pub Dt:
01/17/2008
Title:
MEMORY ARRAY ARCHITECTURE AND METHOD FOR HIGH-SPEED DISTRIBUTION MEASUREMENTS
21
Patent #:
7423445
Issue Dt:
09/09/2008
Application #:
11487472
Filing Dt:
07/17/2006
Publication #:
US20080012596
Pub Dt:
01/17/2008
Title:
METHOD AND SYSTEM FOR TRIMMING VOLTAGE OR CURRENT REFERENCES
22
Patent #:
7636250
Issue Dt:
12/22/2009
Application #:
11487875
Filing Dt:
07/17/2006
Publication #:
US20080013391
Pub Dt:
01/17/2008
Title:
RANDOM ACCESS MEMORY THAT SELECTIVELY PROVIDES DATA TO AMPLIFIERS
23
Patent #:
8084799
Issue Dt:
12/27/2011
Application #:
11488422
Filing Dt:
07/18/2006
Publication #:
US20080017894
Pub Dt:
01/24/2008
Title:
INTEGRATED CIRCUIT WITH MEMORY HAVING A STEP-LIKE PROGRAMMING CHARACTERISTIC
24
Patent #:
7688618
Issue Dt:
03/30/2010
Application #:
11488869
Filing Dt:
07/18/2006
Publication #:
US20080019170
Pub Dt:
01/24/2008
Title:
INTEGRATED CIRCUIT HAVING MEMORY HAVING A STEP-LIKE PROGRAMMING CHARACTERISTIC
25
Patent #:
7681108
Issue Dt:
03/16/2010
Application #:
11488919
Filing Dt:
07/19/2006
Publication #:
US20070033490
Pub Dt:
02/08/2007
Title:
SEMICONDUCTOR MEMORY MODULE WITH ERROR CORRECTION
26
Patent #:
7544562
Issue Dt:
06/09/2009
Application #:
11489052
Filing Dt:
07/19/2006
Publication #:
US20080006863
Pub Dt:
01/10/2008
Title:
METHOD FOR MANUFACTURING A CAPACITOR ELECTRODE STRUCTURE
27
Patent #:
7457144
Issue Dt:
11/25/2008
Application #:
11489702
Filing Dt:
07/19/2006
Publication #:
US20080019187
Pub Dt:
01/24/2008
Title:
MEMORY DEVICE AND METHOD FOR VERIFYING INFORMATION STORED IN MEMORY CELLS
28
Patent #:
7453081
Issue Dt:
11/18/2008
Application #:
11490213
Filing Dt:
07/20/2006
Publication #:
US20080017842
Pub Dt:
01/24/2008
Title:
PHASE CHANGE MEMORY CELL INCLUDING NANOCOMPOSITE INSULATOR
29
Patent #:
7376042
Issue Dt:
05/20/2008
Application #:
11492636
Filing Dt:
07/25/2006
Publication #:
US20080031057
Pub Dt:
02/07/2008
Title:
BOOSTED CLOCK CIRCUIT FOR SEMICONDUCTOR MEMORY
30
Patent #:
7618867
Issue Dt:
11/17/2009
Application #:
11493028
Filing Dt:
07/26/2006
Publication #:
US20080026530
Pub Dt:
01/31/2008
Title:
METHOD OF FORMING A DOPED PORTION OF A SEMICONDUCTOR AND METHOD OF FORMING A TRANSISTOR
31
Patent #:
7772631
Issue Dt:
08/10/2010
Application #:
11493082
Filing Dt:
07/26/2006
Publication #:
US20070023784
Pub Dt:
02/01/2007
Title:
METHOD FOR FABRICATING A MEMORY CELL ARRANGEMENT WITH A FOLDED BIT LINE ARRANGEMENT AND CORRESPONDING MEMORY CELL ARRANGEMENT WITH A FOLDED BIT LINE ARRANGEMENT
32
Patent #:
7405964
Issue Dt:
07/29/2008
Application #:
11494190
Filing Dt:
07/27/2006
Publication #:
US20080025079
Pub Dt:
01/31/2008
Title:
INTEGRATED CIRCUIT TO IDENTIFY READ DISTURB CONDITION IN MEMORY CELL
33
Patent #:
7733815
Issue Dt:
06/08/2010
Application #:
11494848
Filing Dt:
07/28/2006
Publication #:
US20080024215
Pub Dt:
01/31/2008
Title:
DATA SAMPLER INCLUDING A FIRST STAGE AND A SECOND STAGE
34
Patent #:
7414445
Issue Dt:
08/19/2008
Application #:
11497848
Filing Dt:
08/02/2006
Publication #:
US20070182470
Pub Dt:
08/09/2007
Title:
DEVICE AND METHOD FOR THE SYNCHRONIZATION OF CLOCK SIGNALS AND ADJUSTMENT OF THE DUTY CYCLE OF THE CLOCK SIGNAL
35
Patent #:
7376512
Issue Dt:
05/20/2008
Application #:
11500383
Filing Dt:
08/08/2006
Publication #:
US20060275675
Pub Dt:
12/07/2006
Title:
METHOD FOR DETERMINING AN OPTIMAL ABSORBER STACK GEOMETRY OF A LITHOGRAPHIC REFLECTION MASK
36
Patent #:
7545192
Issue Dt:
06/09/2009
Application #:
11504923
Filing Dt:
08/16/2006
Publication #:
US20060274599
Pub Dt:
12/07/2006
Title:
CLOCK STOP DETECTOR
37
Patent #:
7484189
Issue Dt:
01/27/2009
Application #:
11506201
Filing Dt:
08/18/2006
Publication #:
US20070044050
Pub Dt:
02/22/2007
Title:
METHOD FOR SEARCHING FOR POTENTIAL FAULTS IN A LAYOUT OF AN INTEGRATED CIRCUIT
38
Patent #:
7869253
Issue Dt:
01/11/2011
Application #:
11507362
Filing Dt:
08/21/2006
Publication #:
US20080043521
Pub Dt:
02/21/2008
Title:
METHOD OF DETERMINING A MEMORY STATE OF A RESISTIVE MEMORY CELL AND DEVICE MEASURING THE MEMORY STATE OF A RESISTIVE MEMORY CELL
39
Patent #:
7754579
Issue Dt:
07/13/2010
Application #:
11507647
Filing Dt:
08/21/2006
Publication #:
US20080044980
Pub Dt:
02/21/2008
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE
40
Patent #:
7523250
Issue Dt:
04/21/2009
Application #:
11509092
Filing Dt:
08/24/2006
Publication #:
US20070047372
Pub Dt:
03/01/2007
Title:
SEMICONDUCTOR MEMORY SYSTEM AND SEMICONDUCTOR MEMORY CHIP
41
Patent #:
8030637
Issue Dt:
10/04/2011
Application #:
11510512
Filing Dt:
08/25/2006
Publication #:
US20080070162
Pub Dt:
03/20/2008
Title:
MEMORY ELEMENT COMPRISING NON-GRAPHITIC DISORERED CARBON AND USING REVERSIBLE SWITICHING BETWEEN SP2 AND SP3 HYBIRDIZATION STATES
42
Patent #:
7663198
Issue Dt:
02/16/2010
Application #:
11512066
Filing Dt:
08/29/2006
Publication #:
US20080054385
Pub Dt:
03/06/2008
Title:
MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE WITH ALTERNATING LINER MAGNETIZATION ORIENTATION
43
Patent #:
7679120
Issue Dt:
03/16/2010
Application #:
11513447
Filing Dt:
08/31/2006
Publication #:
US20070205437
Pub Dt:
09/06/2007
Title:
METHOD FOR THE PRODUCTION OF A SEMICONDUCTOR SUBSTRATE COMPRISING A PLURALITY OF GATE STACKS ON A SEMICONDUCTOR SUBSTRATE, AND CORRESPONDING SEMICONDUCTOR STRUCTURE
44
Patent #:
7400528
Issue Dt:
07/15/2008
Application #:
11515421
Filing Dt:
09/05/2006
Publication #:
US20070053224
Pub Dt:
03/08/2007
Title:
INTERGRATED CIRCUIT FOR PROGRAMMING RESISTIVE MEMORY CELLS
45
Patent #:
7956387
Issue Dt:
06/07/2011
Application #:
11517558
Filing Dt:
09/08/2006
Publication #:
US20080121961
Pub Dt:
05/29/2008
Title:
TRANSISTOR AND MEMORY CELL ARRAY
46
Patent #:
7642586
Issue Dt:
01/05/2010
Application #:
11517634
Filing Dt:
09/08/2006
Publication #:
US20080061337
Pub Dt:
03/13/2008
Title:
INTEGRATED MEMORY CELL ARRAY
47
Patent #:
7413951
Issue Dt:
08/19/2008
Application #:
11518504
Filing Dt:
09/07/2006
Publication #:
US20070059893
Pub Dt:
03/15/2007
Title:
STACKED CAPACITOR AND METHOD FOR PRODUCING STACKED CAPACITORS FOR DYNAMIC MEMORY CELLS
48
Patent #:
7327623
Issue Dt:
02/05/2008
Application #:
11524131
Filing Dt:
09/20/2006
Publication #:
US20070014173
Pub Dt:
01/18/2007
Title:
ENERGY ADJUSTED WRITE PULSES IN PHASE-CHANGE MEMORIES
49
Patent #:
7838921
Issue Dt:
11/23/2010
Application #:
11526149
Filing Dt:
09/22/2006
Publication #:
US20080073694
Pub Dt:
03/27/2008
Title:
MEMORY CELL ARRANGEMENTS
50
Patent #:
8094654
Issue Dt:
01/10/2012
Application #:
11528988
Filing Dt:
09/27/2006
Publication #:
US20070106837
Pub Dt:
05/10/2007
Title:
INFORMATION TRANSFER IN ELECTRONIC MODULES
51
Patent #:
7605032
Issue Dt:
10/20/2009
Application #:
11529446
Filing Dt:
09/28/2006
Publication #:
US20070075361
Pub Dt:
04/05/2007
Title:
METHOD FOR PRODUCING A TRENCH TRANSISTOR AND TRENCH TRANSISTOR
52
Patent #:
7457171
Issue Dt:
11/25/2008
Application #:
11529571
Filing Dt:
09/28/2006
Publication #:
US20070070671
Pub Dt:
03/29/2007
Title:
INTEGRATED SEMICONDUCTOR MEMORY WITH TRANSMISSION OF DATA VIA A DATA INTERFACE
53
Patent #:
7783826
Issue Dt:
08/24/2010
Application #:
11529711
Filing Dt:
09/28/2006
Publication #:
US20080082762
Pub Dt:
04/03/2008
Title:
DATA BUS WIDTH CONVERTER
54
Patent #:
7757064
Issue Dt:
07/13/2010
Application #:
11530015
Filing Dt:
09/07/2006
Publication #:
US20080065851
Pub Dt:
03/13/2008
Title:
METHOD AND APPARATUS FOR SENDING DATA FROM A MEMORY
55
Patent #:
7515456
Issue Dt:
04/07/2009
Application #:
11530858
Filing Dt:
09/11/2006
Publication #:
US20080062743
Pub Dt:
03/13/2008
Title:
MEMORY CIRCUIT, A DYNAMIC RANDOM ACCESS MEMORY, A SYSTEM COMPRISING A MEMORY AND A FLOATING POINT UNIT AND A METHOD FOR STORING DIGITAL DATA
56
Patent #:
7802166
Issue Dt:
09/21/2010
Application #:
11535961
Filing Dt:
09/27/2006
Publication #:
US20080126843
Pub Dt:
05/29/2008
Title:
MEMORY CONTROLLER, MEMORY CIRCUIT AND MEMORY SYSTEM WITH A MEMORY CONTROLLER AND A MEMORY CIRCUIT
57
Patent #:
7836386
Issue Dt:
11/16/2010
Application #:
11535968
Filing Dt:
09/27/2006
Publication #:
US20080075156
Pub Dt:
03/27/2008
Title:
PHASE SHIFT ADJUSTING METHOD AND CIRCUIT
58
Patent #:
7844888
Issue Dt:
11/30/2010
Application #:
11537401
Filing Dt:
09/29/2006
Publication #:
US20080082898
Pub Dt:
04/03/2008
Title:
ELECTRONIC DEVICE, METHOD FOR OPERATING AN ELECTRONIC DEVICE, MEMORY CIRCUIT AND METHOD OF OPERATING A MEMORY CIRCUIT
59
Patent #:
7865641
Issue Dt:
01/04/2011
Application #:
11540009
Filing Dt:
09/29/2006
Publication #:
US20080080564
Pub Dt:
04/03/2008
Title:
SYNCHRONIZATION AND SCHEDULING OF A DUAL MASTER SERIAL CHANNEL
60
Patent #:
7707380
Issue Dt:
04/27/2010
Application #:
11541392
Filing Dt:
09/29/2006
Publication #:
US20080082776
Pub Dt:
04/03/2008
Title:
MEMORIES, METHOD OF STORING DATA IN A MEMORY AND METHOD OF DETERMINING MEMORY CELL SECTOR QUALITY
61
Patent #:
7660142
Issue Dt:
02/09/2010
Application #:
11541393
Filing Dt:
09/29/2006
Publication #:
US20080091753
Pub Dt:
04/17/2008
Title:
DEVICE WITH MEMORY AND METHOD OF OPERATING DEVICE
62
Patent #:
7751163
Issue Dt:
07/06/2010
Application #:
11541402
Filing Dt:
09/29/2006
Publication #:
US20080080109
Pub Dt:
04/03/2008
Title:
ELECTRIC DEVICE PROTECTION CIRCUIT AND METHOD FOR PROTECTING AN ELECTRIC DEVICE
63
Patent #:
7767567
Issue Dt:
08/03/2010
Application #:
11541404
Filing Dt:
09/29/2006
Publication #:
US20080096352
Pub Dt:
04/24/2008
Title:
METHOD OF FORMING A SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE
64
Patent #:
7512023
Issue Dt:
03/31/2009
Application #:
11541442
Filing Dt:
09/29/2006
Publication #:
US20070133322
Pub Dt:
06/14/2007
Title:
MEMORY AND METHOD FOR IMPROVING THE RELIABILITY OF A MEMORY HAVING A USED MEMORY REGION AND AN UNUSED MEMORY REGION
65
Patent #:
7583527
Issue Dt:
09/01/2009
Application #:
11541443
Filing Dt:
09/29/2006
Publication #:
US20080080227
Pub Dt:
04/03/2008
Title:
TUNABLE RESISTOR AND METHOD FOR OPERATING A TUNABLE RESISTOR
66
Patent #:
7551476
Issue Dt:
06/23/2009
Application #:
11541973
Filing Dt:
10/02/2006
Publication #:
US20080080228
Pub Dt:
04/03/2008
Title:
RESISTIVE MEMORY HAVING SHUNTED MEMORY CELLS
67
Patent #:
7646647
Issue Dt:
01/12/2010
Application #:
11542755
Filing Dt:
10/04/2006
Publication #:
US20070086240
Pub Dt:
04/19/2007
Title:
MEASURING CIRCUIT AND READING METHOD FOR MEMORY CELLS
68
Patent #:
7616492
Issue Dt:
11/10/2009
Application #:
11543306
Filing Dt:
10/04/2006
Publication #:
US20070086241
Pub Dt:
04/19/2007
Title:
EVALUATION CIRCUIT AND EVALUATION METHOD FOR THE ASSESSMENT OF MEMORY CELL STATES
69
Patent #:
7623401
Issue Dt:
11/24/2009
Application #:
11544159
Filing Dt:
10/06/2006
Publication #:
US20080084738
Pub Dt:
04/10/2008
Title:
SEMICONDUCTOR DEVICE INCLUDING MULTI-BIT MEMORY CELLS AND A TEMPERATURE BUDGET SENSOR
70
Patent #:
7554856
Issue Dt:
06/30/2009
Application #:
11544287
Filing Dt:
10/06/2006
Publication #:
US20080084757
Pub Dt:
04/10/2008
Title:
MEMORY CELL
71
Patent #:
7767571
Issue Dt:
08/03/2010
Application #:
11549487
Filing Dt:
10/13/2006
Publication #:
US20080090398
Pub Dt:
04/17/2008
Title:
METHOD FOR MANUFACTURING A STRUCTURE IN A SEMICONDUCTOR DEVICE AND A STRUCTURE IN A SEMICONDUCTOR DEVICE
72
Patent #:
7786621
Issue Dt:
08/31/2010
Application #:
11550933
Filing Dt:
10/19/2006
Publication #:
US20070117434
Pub Dt:
05/24/2007
Title:
CIRCUIT ARRANGEMENT AND METHOD FOR REDUCING ELECTROMAGNETIC INTERFERENCE
73
Patent #:
7372719
Issue Dt:
05/13/2008
Application #:
11552252
Filing Dt:
10/24/2006
Publication #:
US20070091709
Pub Dt:
04/26/2007
Title:
DRAM SEMICONDUCTOR MEMORY DEVICE WITH INCREASED READING ACCURACY
74
Patent #:
7405992
Issue Dt:
07/29/2008
Application #:
11552752
Filing Dt:
10/25/2006
Publication #:
US20080106967
Pub Dt:
05/08/2008
Title:
METHOD AND APPARATUS FOR COMMUNICATING COMMAND AND ADDRESS SIGNALS
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Assignor
1
QIMONDA AG
Exec Dt:
10/09/2014
Assignee
1
INFINEON TECHNOLOGIES AG
AM CAMPEON 1-12
NEUBIBERG, GERMANY 85579
Correspondence name and address
CPA GLOBAL LIMITED
LIBERATION HOUSE
CASTLE STREET
ST HELIER, JE1 1BL JERSEY

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