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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:035623/0001   Pages: 181
Recorded: 05/08/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4024
Page 4 of 41
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
1
Patent #:
Issue Dt:
11/06/2001
Application #:
09133893
Filing Dt:
08/14/1998
Title:
SEMICONDUCTOR COMPONENT AND METHOD FOR TESTING AND OPERATING A SEMICONDUCTOR COMPONENT
2
Patent #:
Issue Dt:
10/26/1999
Application #:
09135866
Filing Dt:
08/18/1998
Title:
A CMP PROCESS USING INDICATOR AREAS TO DETERMINE ENDPOINT
3
Patent #:
Issue Dt:
08/29/2000
Application #:
09136604
Filing Dt:
08/19/1998
Title:
METHOD FOR MAKING DRAM CAPACITOR STRAP
4
Patent #:
Issue Dt:
10/07/2003
Application #:
09137179
Filing Dt:
08/20/1998
Title:
ETCHING COMPOSITION AND USE THEREOF
5
Patent #:
Issue Dt:
05/09/2000
Application #:
09138160
Filing Dt:
08/21/1998
Title:
CIRCUIT ARRANGEMENT WITH AT LEAST FOUR TRANSISTORS, AND METHOD FOR THE MANUFACTURE THEREOF
6
Patent #:
Issue Dt:
05/22/2001
Application #:
09139514
Filing Dt:
08/25/1998
Title:
WORDLINE DRIVER CIRCUIT USING RING-SHAPED DEVICES
7
Patent #:
Issue Dt:
12/28/1999
Application #:
09140573
Filing Dt:
08/26/1998
Title:
ELECTRICAL FUSES WITH TIGHT PITCHES AND METHOD OF FABRICATION IN SEMICONDUCTORS
8
Patent #:
Issue Dt:
01/09/2001
Application #:
09140972
Filing Dt:
08/27/1998
Title:
DRAM CELL ARRANGEMENT AND METHOD FOR THE MANUFACTURE THEREOF
9
Patent #:
Issue Dt:
01/30/2001
Application #:
09143122
Filing Dt:
08/28/1998
Title:
FUSE CONFIGURATION FOR A SEMICONDUCTOR STORAGE DEVICE
10
Patent #:
Issue Dt:
03/02/2004
Application #:
09145623
Filing Dt:
09/02/1998
Title:
VERTICAL DEVICE FORMED ADJACENT TO A WORDLINE SIDEWALL AND METHOD FOR SEMICONDUCTOR CHIPS
11
Patent #:
Issue Dt:
11/13/2001
Application #:
09146636
Filing Dt:
09/03/1998
Title:
STRUCTURING METHOD
12
Patent #:
Issue Dt:
08/20/2002
Application #:
09146870
Filing Dt:
09/03/1998
Title:
COMBINED PREANNEAL/OXIDATION STEP USING RAPID THERMAL PROCESSING
13
Patent #:
Issue Dt:
04/03/2001
Application #:
09149829
Filing Dt:
09/08/1998
Title:
METHOD FOR PRODUCING STRUCTURES HAVING A HIGH ASPECT RATIO AND STRUCTURE HAVING A HIGH ASPECT RATIO
14
Patent #:
Issue Dt:
11/30/1999
Application #:
09150789
Filing Dt:
09/10/1998
Title:
LEVEL CONVERTING CIRCUIT
15
Patent #:
Issue Dt:
01/23/2001
Application #:
09153390
Filing Dt:
09/15/1998
Title:
METALLIZATION ETCHING TECHNIQUES FOR REDUCING POST-ETCH CORROSION OF METAL LINES
16
Patent #:
Issue Dt:
11/21/2000
Application #:
09156071
Filing Dt:
09/17/1998
Title:
COMPOSITION AND METHOD FOR REDUCING DISHING IN PATTERNED METAL DURING CMP PROCESS
17
Patent #:
Issue Dt:
05/30/2000
Application #:
09160851
Filing Dt:
09/25/1998
Title:
CIRCUIT CONFIGURATION FOR REDUCING DISTURBANCES DUE TO A SWITCHING OF AN OUTPUT DRIVER
18
Patent #:
Issue Dt:
03/28/2000
Application #:
09160862
Filing Dt:
09/25/1998
Title:
PULSE SHAPER CIRCUIT
19
Patent #:
Issue Dt:
12/07/1999
Application #:
09160875
Filing Dt:
09/24/1998
Title:
O-AMINO (THIO) PHENOLCARBOXYLIC ACIDS AND THEIR PREPARATION
20
Patent #:
Issue Dt:
11/30/1999
Application #:
09160880
Filing Dt:
09/25/1998
Title:
RS FLIP-FLOP WITH ENABLE INPUTS
21
Patent #:
Issue Dt:
11/21/2000
Application #:
09161144
Filing Dt:
09/24/1998
Title:
BIS-O-AMINO(THIO)PHENOLS, AND THEIR PREPARATION
22
Patent #:
Issue Dt:
10/30/2001
Application #:
09161147
Filing Dt:
09/24/1998
Title:
O-AMINO (THIO) PHENOLCARBOXYLIC ACIDS, AND THEIR PREPARATION
23
Patent #:
Issue Dt:
11/28/2000
Application #:
09161148
Filing Dt:
09/24/1998
Title:
POLYBENZOXAZOLE AND POLYBENZOTHIAZOLE PRECURSORS
24
Patent #:
Issue Dt:
11/20/2001
Application #:
09161149
Filing Dt:
09/24/1998
Title:
O-NITRO(THIO)PHENOL DERIVATIVES, AND THEIR PREPARATION
25
Patent #:
Issue Dt:
09/19/2000
Application #:
09161202
Filing Dt:
09/24/1998
Title:
POLYBENZOXAZOLE AND POLYBENZOTHIAZOLE PRECURSORS
26
Patent #:
Issue Dt:
12/05/2000
Application #:
09161549
Filing Dt:
09/24/1998
Title:
BIS-O-AMINO (THIO) PHENOLS, AND THEIR PREPARATION
27
Patent #:
Issue Dt:
10/17/2000
Application #:
09161793
Filing Dt:
09/28/1998
Title:
METHOD OF ENHANCING SEMICONDUCTOR WAFER RELEASE
28
Patent #:
Issue Dt:
10/24/2000
Application #:
09161861
Filing Dt:
09/28/1998
Title:
STACKED CAPACITATOR MEMORY CELL AND METHOD OF FABRICATION
29
Patent #:
Issue Dt:
12/12/2000
Application #:
09162608
Filing Dt:
09/29/1998
Title:
ASSOCIATIVE MEMORY AND METHOD FOR THE OPERATION THEREOF
30
Patent #:
Issue Dt:
03/27/2001
Application #:
09162867
Filing Dt:
09/29/1998
Title:
MEMORY CELL WITH A STACKED CAPACITOR
31
Patent #:
Issue Dt:
02/13/2001
Application #:
09163670
Filing Dt:
09/30/1998
Title:
6 1/4 F2 DRAM CELL STRUCTURE WITH FOUR NODES PER BITLINE-STUD AND TWO TOPOLOGICAL WORDLINE LEVELS
32
Patent #:
Issue Dt:
03/02/2004
Application #:
09163874
Filing Dt:
09/30/1998
Title:
METHOD FOR THE LINEAR CONFIGURATION OF METALLIC FUSE SECTIONS ON WAFERS
33
Patent #:
Issue Dt:
12/05/2000
Application #:
09164115
Filing Dt:
09/30/1998
Title:
PROCESS FOR PRODUCING A CERAMIC LAYER
34
Patent #:
Issue Dt:
10/03/2000
Application #:
09164119
Filing Dt:
09/30/1998
Title:
PROCESS FOR PRODUCING A CERAMIC LAYER CONTAINING BI
35
Patent #:
Issue Dt:
02/13/2001
Application #:
09170184
Filing Dt:
10/13/1998
Title:
COMMUNICATIONS SYSTEM WITH A MASTER STATION AND AT LEAST ONE SLAVE STATION
36
Patent #:
Issue Dt:
05/30/2000
Application #:
09174745
Filing Dt:
10/19/1998
Title:
INTEGRATED BUFFER CIRCUIT
37
Patent #:
Issue Dt:
11/27/2001
Application #:
09175267
Filing Dt:
10/20/1998
Title:
METHOD FOR FABRICATING TRANSISTORS
38
Patent #:
Issue Dt:
08/27/2002
Application #:
09176558
Filing Dt:
10/21/1998
Title:
INTEGRATED CIRCUIT CONFIGURATION HAVING AT LEAST ONE CAPACITOR AND METHOD FOR PRODUCING THE SAME
39
Patent #:
Issue Dt:
02/22/2000
Application #:
09180665
Filing Dt:
11/12/1998
Title:
READ AMPLIFIER FOR SEMICONDUCTOR MEMORY CELLS WITH MEANS TO COMPENSATE THRESHOLD VOLTAGE DIFFERENCES IN READ AMPLIFIER TRANSISTORS
40
Patent #:
Issue Dt:
08/17/1999
Application #:
09183246
Filing Dt:
10/30/1998
Title:
RECESSED SHALLOW TRENCH ISOLATION STRUCTURE NITRIDE LINER AND METHOD FOR MAKING SAME
41
Patent #:
Issue Dt:
09/19/2000
Application #:
09186515
Filing Dt:
11/05/1998
Title:
FUSE LAYOUT FOR IMPROVED FUSE BLOW PROCESS WINDOW
42
Patent #:
Issue Dt:
11/30/1999
Application #:
09187153
Filing Dt:
11/06/1998
Title:
APPARATUS FOR CONTROLLING CIRCUIT RESPONSE DURING POWER-UP
43
Patent #:
Issue Dt:
12/14/1999
Application #:
09187165
Filing Dt:
11/06/1998
Title:
PLANARIZATION OF A NON-CONFORMAL DEVICE LAYER IN SEMICONDUCTOR FABRICATION
44
Patent #:
Issue Dt:
11/02/1999
Application #:
09191482
Filing Dt:
11/13/1998
Title:
DRAM CELL ARRANGEMENT AND METHOD FOR THE PRODUCTION THEREOF
45
Patent #:
Issue Dt:
10/31/2000
Application #:
09192698
Filing Dt:
11/16/1998
Title:
IN-SITU MEASUREMENT METHOD AND APPARATUS FOR SEMICONDUCTOR PROCESSING
46
Patent #:
Issue Dt:
04/02/2002
Application #:
09197371
Filing Dt:
11/20/1998
Title:
PLASTIC COMPOSITIONS FOR SHEATHING A METAL OR SEMICONDUCTOR BODY
47
Patent #:
Issue Dt:
01/18/2000
Application #:
09197391
Filing Dt:
11/20/1998
Title:
MICROSTRUCTURE AND METHODS FOR FABRICATING SUCH STRUCTURE
48
Patent #:
Issue Dt:
03/30/2004
Application #:
09197984
Filing Dt:
11/23/1998
Title:
TEXTURED BI-BASED OXIDE CERAMIC FILMS
49
Patent #:
Issue Dt:
03/14/2000
Application #:
09200071
Filing Dt:
11/25/1998
Title:
SRAM CELL CONFIGURATION AND METHOD FOR ITS FABRICATION
50
Patent #:
Issue Dt:
10/24/2000
Application #:
09200338
Filing Dt:
11/25/1998
Title:
DELAY LOCK LOOP
51
Patent #:
Issue Dt:
07/24/2001
Application #:
09201205
Filing Dt:
11/30/1998
Title:
SLOTTED DAMASCENE LINES FOR LOW RESISTIVE WIRING LINES FOR INTEGRATED CIRCUIT
52
Patent #:
Issue Dt:
01/09/2001
Application #:
09201728
Filing Dt:
11/30/1998
Title:
CHEMICALLY AMPLIFIED RESIST
53
Patent #:
Issue Dt:
06/24/2003
Application #:
09201733
Filing Dt:
11/30/1998
Title:
MEMORY CELL USING AMORPHOUS MATERIAL TO STABILIZE THE BOUNDARY FACE BETWEEN POLYCHRYSTALLINE SEMICONDUCTOR MATERIAL OF A CAPACITOR AND MONCRYSTALLINE SEMICONDUCTOR MATERIAL OF A TRANSISTOR
54
Patent #:
Issue Dt:
12/28/1999
Application #:
09204031
Filing Dt:
12/01/1998
Title:
SILICON OXYNITRIDE CAP FOR FLUORINATED SILICATE GLASS FILM IN INTERMETAL DIELECTRIC SEMICONDUCTOR FABRICATION
55
Patent #:
Issue Dt:
02/29/2000
Application #:
09204402
Filing Dt:
12/02/1998
Title:
MEASUREMENT SYSTEM AND METHOD FOR MEASURING CRITICAL DIMENSIONS USING ELLIPSOMETRY
56
Patent #:
Issue Dt:
02/01/2005
Application #:
09204706
Filing Dt:
12/03/1998
Publication #:
Pub Dt:
07/05/2001
Title:
REMOVAL OF POST-RIE POLYMER ON A1/CU METAL LINE
57
Patent #:
Issue Dt:
11/16/1999
Application #:
09204927
Filing Dt:
12/03/1998
Title:
REDUNDANCY CONCEPT FOR MEMORY CIRCUITS HAVING ROM MEMORY CELLS
58
Patent #:
Issue Dt:
11/02/1999
Application #:
09205624
Filing Dt:
12/04/1998
Title:
METHOD FOR READING AND REFRESHING A DYNAMIC SEMICONDUCTOR MEMORY
59
Patent #:
Issue Dt:
12/31/2002
Application #:
09208541
Filing Dt:
12/09/1998
Title:
LOW TEMPERATURE CVD PROCESSES FOR PREPARING FERROELECTRIC FILMS USING BI ALCOXIDES
60
Patent #:
Issue Dt:
04/24/2001
Application #:
09209198
Filing Dt:
12/10/1998
Title:
EXTENDED TRENCH FOR PREVENTING INTERACTION BETWEEN COMPONENTS OF STACKED CAPACITORS
61
Patent #:
Issue Dt:
05/23/2000
Application #:
09209413
Filing Dt:
12/10/1998
Title:
METHOD AND APPARATUS FOR PREVENTING FORMATION OF BLACK SILICON ON EDGES OF WAFERS
62
Patent #:
Issue Dt:
09/07/2004
Application #:
09210912
Filing Dt:
12/14/1998
Title:
METHOD OF CONTROLLED CHEMICAL VAPOR DEPOSITION OF A METAL OXIDE CERAMIC LAYER
63
Patent #:
Issue Dt:
10/24/2000
Application #:
09213469
Filing Dt:
12/17/1998
Title:
METHODS FOR ENHANCING THE METAL REMOVAL RATE DURING THE CHEMICAL-MECHANICAL POLISHING PROCESS OF A SEMICONDUCTOR
64
Patent #:
Issue Dt:
12/19/2000
Application #:
09215011
Filing Dt:
12/17/1998
Title:
REDUCED PARASITIC LEAKAGE IN SEMICONDUCTOR DEVICES
65
Patent #:
Issue Dt:
01/23/2001
Application #:
09215607
Filing Dt:
12/17/1998
Title:
ADJUSTABLE STRENGTH DRIVER CIRCUIT AND METHOD OF ADJUSTMENT
66
Patent #:
Issue Dt:
04/18/2000
Application #:
09218561
Filing Dt:
12/22/1998
Title:
A REPAIRABLE SEMICONDUCTOR MEMORY CIRCUIT HAVING PARALLEL REDUNDANCY REPLACEMENT WHEREIN REDUNDANCY ELEMENTS REPLACE FAILED ELEMENTS
67
Patent #:
Issue Dt:
08/07/2001
Application #:
09218882
Filing Dt:
12/22/1998
Title:
CRACK STOPS
68
Patent #:
Issue Dt:
09/02/2003
Application #:
09220745
Filing Dt:
12/23/1998
Title:
LEAD FRAME FOR THE INSTALLATION OF AN INTEGRATED CIRCUIT IN AN INJECTION-MOLDED PACKAGE
69
Patent #:
Issue Dt:
05/02/2000
Application #:
09221774
Filing Dt:
12/28/1998
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT HOUSING
70
Patent #:
Issue Dt:
11/26/2002
Application #:
09223826
Filing Dt:
01/04/1999
Title:
CRACK STOP BETWEEN NEIGHBORING FUSES FOR PROTECTION FROM FUSE BLOW DAMAGE
71
Patent #:
Issue Dt:
10/03/2000
Application #:
09225664
Filing Dt:
01/05/1999
Title:
DRIVER CIRCUIT WITH NEGATIVE LOWER POWER RAIL
72
Patent #:
Issue Dt:
07/16/2002
Application #:
09225665
Filing Dt:
01/05/1999
Publication #:
Pub Dt:
01/03/2002
Title:
SENSE AMPLIFIER
73
Patent #:
Issue Dt:
03/20/2001
Application #:
09226434
Filing Dt:
01/06/1999
Title:
CONTACT AND DEEP TRENCH PATTERNING
74
Patent #:
Issue Dt:
04/02/2002
Application #:
09228178
Filing Dt:
01/11/1999
Publication #:
Pub Dt:
03/14/2002
Title:
SYSTEM AND METHOD FOR DETERMINING YIELD IMPACT FOR SEMICONDUCTOR DEVICES
75
Patent #:
Issue Dt:
08/01/2000
Application #:
09228610
Filing Dt:
01/12/1999
Title:
AN ADJUSTABLE DELAY CIRCUIT
76
Patent #:
Issue Dt:
11/14/2000
Application #:
09228611
Filing Dt:
01/12/1999
Title:
DRAM CELL ARRANGEMENT AND METHOD FOR ITS PRODUCTION
77
Patent #:
Issue Dt:
01/21/2003
Application #:
09232081
Filing Dt:
01/15/1999
Title:
TRENCH CAPACITOR WITH INSULATION COLLAR AND METHOD FOR PRODUCING THE TRENCH CAPACITOR
78
Patent #:
Issue Dt:
11/30/1999
Application #:
09232083
Filing Dt:
01/15/1999
Title:
MEMORY CELL CONFIGURATION AND METHOD FOR ITS FABRICATION
79
Patent #:
Issue Dt:
04/24/2001
Application #:
09234341
Filing Dt:
01/20/1999
Title:
METHOD OF MAKING A MICROELECTRONIC STRUCTURE
80
Patent #:
Issue Dt:
11/07/2000
Application #:
09235621
Filing Dt:
01/22/1999
Title:
METHOD FOR MANUFACTURING MEMORY CELL WITH TRENCH CAPACITOR
81
Patent #:
Issue Dt:
11/27/2001
Application #:
09238543
Filing Dt:
01/28/1999
Title:
LIGHT ABSORPTION LAYER FOR LASER BLOWN FUSES
82
Patent #:
Issue Dt:
10/03/2000
Application #:
09239487
Filing Dt:
01/28/1999
Title:
DELAY-LOCKED-LOOP (DLL) HAVING SYMMETRICAL RISING AND FALLING CLOCK EDGE TYPE DELAYS
83
Patent #:
Issue Dt:
07/04/2000
Application #:
09241741
Filing Dt:
12/22/1998
Title:
CRACK STOPS
84
Patent #:
Issue Dt:
10/31/2000
Application #:
09242153
Filing Dt:
02/09/1999
Title:
PROCESS FOR MANUFACTURING A CAPACITOR IN A SEMICONDUCTOR ARRANGEMENT INCLUDING FORMING A STATISTICAL HSG MASK OF SILICON AND GERMANIUM NUCLEI
85
Patent #:
Issue Dt:
04/10/2001
Application #:
09243296
Filing Dt:
02/02/1999
Title:
INTEGRATED MEMORY
86
Patent #:
Issue Dt:
07/13/2004
Application #:
09245269
Filing Dt:
02/05/1999
Title:
FIELD-SHIELD-TRENCH ISOLATION FOR GIGABIT DRAMS
87
Patent #:
Issue Dt:
04/17/2001
Application #:
09246745
Filing Dt:
02/08/1999
Title:
WAFER FRAME
88
Patent #:
Issue Dt:
07/10/2001
Application #:
09250362
Filing Dt:
02/12/1999
Title:
MEMORY CELL CONFIGURATION AND CORRESPONDING FABRICATION METHOD
89
Patent #:
Issue Dt:
03/19/2002
Application #:
09250516
Filing Dt:
02/16/1999
Title:
CIRCUIT ARRANGEMENT WITH AT LEAST ONE CAPACITOR
90
Patent #:
Issue Dt:
11/30/1999
Application #:
09251611
Filing Dt:
02/17/1999
Title:
SEMICONDUCTOR WAFER TEMPERATURE MEASUREMENT AND CONTROL THEREOF USING GAS TEMPERATURE MEASUREMENT
91
Patent #:
Issue Dt:
03/12/2002
Application #:
09251616
Filing Dt:
02/17/1999
Title:
DEVICE WITH ASYMMETRICAL CHANNEL DOPANT PROFILE
92
Patent #:
Issue Dt:
12/18/2001
Application #:
09252372
Filing Dt:
02/18/1999
Title:
USE OF DUMMY POLY SPACERS AND DIVOT FILL TECHNIQUES FOR DT-ALIGNED PROCESSING AFTER STI FORMATION FOR ADVANCED DEEP TRENCH CAPACITOR DRAMS
93
Patent #:
Issue Dt:
07/25/2000
Application #:
09253996
Filing Dt:
02/22/1999
Title:
ARRANGEMENT FOR CONTROLLING VOLTAGE GENERATORS IN MULTI VOLTAGE GENERATOR CHIPS SUCH AS DRAMS
94
Patent #:
Issue Dt:
03/14/2000
Application #:
09254696
Filing Dt:
03/15/1999
Title:
METHOD FOR PRODUCING A DRAM CELLULAR ARRANGEMENT
95
Patent #:
Issue Dt:
11/09/1999
Application #:
09256048
Filing Dt:
02/23/1999
Title:
INTEGRATED MULTI-LAYER TEST PADS AND METHODS THEREFOR
96
Patent #:
Issue Dt:
03/26/2002
Application #:
09256930
Filing Dt:
02/24/1999
Title:
SYSTEM AND METHOD FOR AUTOMATED DEFECT INSPECTION OF PHOTOMASKS
97
Patent #:
Issue Dt:
07/17/2001
Application #:
09257304
Filing Dt:
02/25/1999
Title:
DYNAMIC LOGIC CIRCUIT
98
Patent #:
Issue Dt:
02/22/2000
Application #:
09258940
Filing Dt:
03/01/1999
Title:
INTEGRATED MEMORY
99
Patent #:
Issue Dt:
06/04/2002
Application #:
09261100
Filing Dt:
03/02/1999
Title:
INTEGRATED CIRCUIT AND METHOD FOR TESTING IT
100
Patent #:
Issue Dt:
07/11/2000
Application #:
09265252
Filing Dt:
03/09/1999
Title:
CURRENT SOURCE
Assignor
1
Exec Dt:
10/09/2014
Assignee
1
AM CAMPEON 1-12
NEUBIBERG, GERMANY 85579
Correspondence name and address
CPA GLOBAL LIMITED
LIBERATION HOUSE
CASTLE STREET
ST HELIER, JE1 1BL JERSEY

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