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Total properties:
20
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|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2016
|
Application #:
|
12701391
|
Filing Dt:
|
02/05/2010
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|
Publication #:
|
|
Pub Dt:
|
08/11/2011
| | | | |
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Title:
|
METHOD AND SYSTEM FOR AUTOMATED GENERATION OF MASKS FOR SPACER FORMATION FROM A DESIRED FINAL WAFER PATTERN
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2016
|
Application #:
|
12723320
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Filing Dt:
|
03/12/2010
|
|
Publication #:
|
|
Pub Dt:
|
10/07/2010
| | | | |
|
Title:
|
RECONFIGURABLE CIRCUIT WITH SUSPENSION CONTROL CIRCUIT
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12723582
|
Filing Dt:
|
03/12/2010
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|
Publication #:
|
|
Pub Dt:
|
09/15/2011
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR CONTROLLING AN ELECTRONIC DEVICE
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12723590
|
Filing Dt:
|
03/12/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/15/2011
| | | | |
|
Title:
|
HOME AND BUILDING AUTOMATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2016
|
Application #:
|
12791280
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Filing Dt:
|
06/01/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/16/2010
| | | | |
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Title:
|
MULTIPLEXING AUXILIARY PROCESSING ELEMENT AND SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
12792129
|
Filing Dt:
|
06/02/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
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Title:
|
ELECTRONIC DEVICE HAVING A MOLDING COMPOUND INCLUDING A COMPOSITE MATERIAL
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2015
|
Application #:
|
12795462
|
Filing Dt:
|
06/07/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
|
Title:
|
COMPUTER SYSTEM INCLUDING RECONFIGURABLE ARITHMETIC DEVICE WITH NETWORK OF PROCESSOR ELEMENTS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2015
|
Application #:
|
12844928
|
Filing Dt:
|
07/28/2010
|
|
Publication #:
|
|
Pub Dt:
|
02/03/2011
| | | | |
|
Title:
|
DC-DC CONVERTER, CONTROL CIRCUIT, AND POWER SUPPLY CONTROL METHOD
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2015
|
Application #:
|
12879936
|
Filing Dt:
|
09/10/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/15/2012
| | | | |
|
Title:
|
APPARATUS AND METHOD FOR PROGRAMMABLE READ PREAMBLE WITH TRAINING PATTERN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2016
|
Application #:
|
12880021
|
Filing Dt:
|
09/10/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/15/2012
| | | | |
|
Title:
|
APPARATUS, METHOD, AND MANUFACTURE FOR USING A READ PREAMBLE TO OPTIMIZE DATA CAPTURE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12960411
|
Filing Dt:
|
12/03/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR NAND MEMORY WITH RECESSED SOURCE/DRAIN REGION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2015
|
Application #:
|
12964523
|
Filing Dt:
|
12/09/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
|
Title:
|
HIGH PERFORMANCE LOW PROFILE QFN/LGA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2017
|
Application #:
|
12973730
|
Filing Dt:
|
12/20/2010
|
|
Publication #:
|
|
Pub Dt:
|
07/28/2011
| | | | |
|
Title:
|
RECONFIGURABLE CIRCUIT HAVING ROWS OF A MATRIX OF REGISTERS CONNECTED TO CORRESPONDING PORTS AND A SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2016
|
Application #:
|
12973756
|
Filing Dt:
|
12/20/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
|
Title:
|
EDGE ROUNDED FIELD EFFECT TRANSISTORS AND METHODS OF MANUFACTURING
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12979654
|
Filing Dt:
|
12/28/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
|
Title:
|
SYSTEM, METHOD AND APPARATUS FOR REDUCING PLASMA NOISE ON POWER PATH OF ELECTROSTATIC CHUCK
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13022992
|
Filing Dt:
|
02/08/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/08/2011
| | | | |
|
Title:
|
RECEIVING APPARATUS AND METHOD FOR SETTING GAIN
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13028840
|
Filing Dt:
|
02/16/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/24/2011
| | | | |
|
Title:
|
SEMICONDUCTOR CIRCUIT AND DESIGNING APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2015
|
Application #:
|
13046433
|
Filing Dt:
|
03/11/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
|
Title:
|
MIXED WIRE BONDING PROFILE AND PAD-LAYOUT CONFIGURATIONS IN IC PACKAGING PROCESSES FOR HIGH-SPEED ELECTRONIC DEVICES
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13073691
|
Filing Dt:
|
03/28/2011
|
|
Publication #:
|
|
Pub Dt:
|
10/06/2011
| | | | |
|
Title:
|
RECONFIGURABLE CIRCUIT WITH INPUT DATA LATENCY MANAGEMENT USING VALID SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2015
|
Application #:
|
13123698
|
Filing Dt:
|
04/11/2011
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
|
Title:
|
REAL-TIME DATA PATTERN ANALYSIS SYSTEM AND METHOD OF OPERATION THEREOF
|
|
