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Total properties:
20
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11687479
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Filing Dt:
|
03/16/2007
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Publication #:
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Pub Dt:
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09/18/2008
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Title:
|
MEMORY STORAGE VIA AN INTERNAL COMPRESSION ALGORITHM
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Patent #:
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NONE
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Issue Dt:
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Application #:
|
11694089
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Filing Dt:
|
03/30/2007
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
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Title:
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MEMORY SYSTEM WITH DEPLETION GATE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11764736
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Filing Dt:
|
06/18/2007
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Publication #:
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Pub Dt:
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12/18/2008
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Title:
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CMOS Compatible Single-Poly Non-Volatile Memory
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11770239
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Filing Dt:
|
06/28/2007
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Publication #:
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Pub Dt:
|
01/01/2009
| | | | |
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Title:
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A semiconductor device for stacking dies in a multi-die chip packing using film over wire as well as multi-die chip devices that include film over wire
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11781551
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Filing Dt:
|
07/23/2007
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Publication #:
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Pub Dt:
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11/15/2007
| | | | |
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Title:
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DEVICE HAVING A PROTECTIVE CAP FORMED OVER AN ANTI-REFLECTIVE COATING LAYER AND OVER AN INSULATING MATERIAL
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11804170
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Filing Dt:
|
05/16/2007
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Publication #:
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Pub Dt:
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11/20/2008
| | | | |
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Title:
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Self reference sensing system and method
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|
|
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Patent #:
|
NONE
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Issue Dt:
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Application #:
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11829135
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Filing Dt:
|
07/27/2007
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Publication #:
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Pub Dt:
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01/29/2009
| | | | |
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Title:
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FUEL CELL USING DEUTERIUM
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|
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11835545
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Filing Dt:
|
08/08/2007
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Publication #:
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Pub Dt:
|
09/25/2008
| | | | |
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Title:
|
SINGULATED BARE DIE TESTING
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
11842655
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Filing Dt:
|
08/21/2007
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Publication #:
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Pub Dt:
|
02/26/2009
| | | | |
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Title:
|
DIE STACKING IN MULTI-DIE STACKS USING DIE SUPPORT MECHANISMS
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|
|
|
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Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11844518
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Filing Dt:
|
08/24/2007
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|
Publication #:
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Pub Dt:
|
02/26/2009
| | | | |
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Title:
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PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS WITHIN OPENINGS
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11899575
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Filing Dt:
|
09/06/2007
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|
Publication #:
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Pub Dt:
|
03/12/2009
| | | | |
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Title:
|
Ta-lined tungsten plugs for transistor-local hydrogen gathering
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11935544
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Filing Dt:
|
11/06/2007
|
|
Publication #:
|
|
Pub Dt:
|
05/07/2009
| | | | |
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Title:
|
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING A CONDUCTIVE LAYER OVER A SEED LAYER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
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Application #:
|
11950339
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Filing Dt:
|
12/04/2007
|
|
Publication #:
|
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Pub Dt:
|
06/04/2009
| | | | |
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Title:
|
Method of operating a processing chamber used in forming electronic devices
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11957028
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Filing Dt:
|
12/14/2007
|
|
Publication #:
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Pub Dt:
|
06/18/2009
| | | | |
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Title:
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REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
11961757
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Filing Dt:
|
12/20/2007
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|
Publication #:
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Pub Dt:
|
06/25/2009
| | | | |
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Title:
|
ELECTRONIC DEVICE INCLUDING A SILICON NITRIDE LAYER AND A PROCESS OF FORMING THE SAME
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
11963241
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Filing Dt:
|
12/21/2007
|
|
Publication #:
|
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Pub Dt:
|
06/25/2009
| | | | |
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Title:
|
FLEXIBLE FLASH INTERFACE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
11963466
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Filing Dt:
|
12/21/2007
|
|
Publication #:
|
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Pub Dt:
|
06/25/2009
| | | | |
|
Title:
|
HIGH PERFORMANCE FLASH CHANNEL INTERFACE
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
12005870
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Filing Dt:
|
12/28/2007
|
|
Publication #:
|
|
Pub Dt:
|
01/22/2009
| | | | |
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Title:
|
Semiconductor device and method of manufacturing the same
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12022795
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Filing Dt:
|
01/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
07/30/2009
| | | | |
|
Title:
|
ELECTRONIC DEVICE HAVING A DOPED REGION WITH A GROUP 13 ATOM
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12026421
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Filing Dt:
|
02/05/2008
|
|
Publication #:
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|
Pub Dt:
|
09/11/2008
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH ONO FILM ON LATERAL SURFACES OF GROOVE PORTIONS FORMED IN SEMICONDUCTOR SUBSTRATE
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|
