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Total properties:
17
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08555463
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Filing Dt:
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11/13/1995
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Title:
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ESD PROTECTION CLAMP FOR MIXED VOLTAGE I/O STAGES USING NMOS TRANSISTORS
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08711491
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Filing Dt:
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09/10/1996
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Title:
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SYSTEM AND METHOD FOR ON-CHIP DEBUG SUPPORT AND PERFORMANCE MONITORING IN A MICROPROCESSOR
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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08759044
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Filing Dt:
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12/02/1996
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Title:
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LOAD AND STORE INSTRUCTIONS WHICH PERFORM UNPACKING AND PACKING OF DATA BITS IN SEPARATE VECTOR AND INTER CACHE STORAGE
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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08815982
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Filing Dt:
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03/10/1997
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Title:
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PROCESSOR PERFORMANCE COUNTER FOR SAMPLING THE EXECUTION FREQUENCY OF INDIVIDUAL INSTRUCTIONS
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09041513
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Filing Dt:
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03/12/1998
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Title:
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CACHE MEMORY EXCHANGE OPTIMIZED MEMEORY ORGANIZATION FOR A
COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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08/03/1999
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Application #:
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09072129
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Filing Dt:
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05/04/1998
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Title:
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ESD PROTECTION CLAMP FOR MIXED VOLTAGE I/O STAGES USING NMOS TRANSISTORS
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|
|
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Patent #:
|
|
Issue Dt:
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08/01/2000
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Application #:
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09072130
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Filing Dt:
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05/04/1998
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Title:
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ESD PROTECTION CLAMP FOR MIXED VOLTAGE I/O STAGES USING NMOS TRANSISTORS
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Patent #:
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Issue Dt:
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02/27/2001
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Application #:
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09241212
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Filing Dt:
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02/01/1999
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Title:
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EMBEDDED INPUT LOGIC IN A HIGH INPUT IMPEDANCE STROBED CMOS DIFFERENTIAL SENSE AMPLIFIER
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09643431
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Filing Dt:
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08/22/2000
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Title:
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Cache memory exchange optimized memory organization for a computer system
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09726825
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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MEMORY CONTROLLER WITH TEMPERATURE SENSORS
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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09733153
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Filing Dt:
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12/08/2000
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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METHOD, COMPUTER SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PROCESSING EXTENSIBLE MARKUP LANGUAGE STREAMS
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09809972
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Filing Dt:
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03/15/2001
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Publication #:
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Pub Dt:
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09/19/2002
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Title:
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REDUNDANT DATA STORAGE SYSTEMS AND METHODS OF OPERATING A REDUNDANT DATA STORAGE SYSTEM
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09902824
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Filing Dt:
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07/10/2001
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Publication #:
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Pub Dt:
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01/03/2002
| | | | |
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Title:
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METHOD AND APPARATUS FOR SUPPORTING HETEROGENEOUS MEMORY IN COMPUTER SYSTEMS
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10106907
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Filing Dt:
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03/26/2002
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Publication #:
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Pub Dt:
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10/02/2003
| | | | |
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Title:
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SYSTEM AND METHOD FOR MULTI-DESTINATION MERGE IN A STORAGE AREA NETWORK
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|
|
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Patent #:
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|
Issue Dt:
|
07/03/2007
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Application #:
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10777174
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Filing Dt:
|
02/13/2004
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Publication #:
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Pub Dt:
|
08/19/2004
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Title:
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DRIVER CIRCUIT CONNECTED TO PULSE SHAPING CIRCUITRY
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Patent #:
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Issue Dt:
|
04/03/2007
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Application #:
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11089576
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Filing Dt:
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06/07/2004
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Publication #:
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Pub Dt:
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12/08/2005
| | | | |
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Title:
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RECEIVER AND METHOD FOR MITIGATING TEMPORARY LOGIC TRANSITIONS
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|
|
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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11108360
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Filing Dt:
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04/18/2005
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Publication #:
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Pub Dt:
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09/15/2005
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Title:
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MULTI-CONTROLLER WRITE OPERATIONS
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