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Reel/Frame:036011/0839   Pages: 10
Recorded: 06/23/2015
Attorney Dkt #:SPANSION-VDM ASSIGNMENT
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 46
1
Patent #:
6181605
Issue Dt:
01/30/2001
Application #:
09414750
Filing Dt:
10/06/1999
Title:
GLOBAL ERASE/PROGRAM VERIFICATION APPARATUS AND METHOD
2
Patent #:
6240020
Issue Dt:
05/29/2001
Application #:
09427406
Filing Dt:
10/25/1999
Title:
METHOD OF BITLINE SHIELDING IN CONJUNCTION WITH A PRECHARGING SCHEME FOR NAND-BASED FLASH MEMORY DEVICES
3
Patent #:
6175523
Issue Dt:
01/16/2001
Application #:
09433187
Filing Dt:
10/25/1999
Title:
PRECHARGING MECHANISM AND METHOD FOR NAND-BASED FLASH MEMORY DEVICES
4
Patent #:
6269025
Issue Dt:
07/31/2001
Application #:
09500699
Filing Dt:
02/09/2000
Title:
Memory system having a program and erase voltage modifier
5
Patent #:
6424569
Issue Dt:
07/23/2002
Application #:
09513027
Filing Dt:
02/25/2000
Title:
USER SELECTABLE CELL PROGRAMMING
6
Patent #:
6219276
Issue Dt:
04/17/2001
Application #:
09513643
Filing Dt:
02/25/2000
Title:
Multilevel cell programming
7
Patent #:
6728913
Issue Dt:
04/27/2004
Application #:
09513698
Filing Dt:
02/25/2000
Title:
DATA RECYCLING IN MEMORY
8
Patent #:
6295228
Issue Dt:
09/25/2001
Application #:
09514933
Filing Dt:
02/28/2000
Title:
System for programming memory cells
9
Patent #:
6707713
Issue Dt:
03/16/2004
Application #:
09516478
Filing Dt:
03/01/2000
Title:
INTERLACED MULTI-LEVEL MEMORY
10
Patent #:
6397313
Issue Dt:
05/28/2002
Application #:
09632390
Filing Dt:
08/04/2000
Title:
REDUNDANT DUAL BANK ARCHITECTURE FOR A SIMULTANEOUS OPERATION FLASH MEMORY
11
Patent #:
6452869
Issue Dt:
09/17/2002
Application #:
09794478
Filing Dt:
02/26/2001
Title:
ADDRESS BROADCASTING TO A PAGED MEMORY DEVICE TO ELIMINATE ACCESS LATENCY PENALTY
12
Patent #:
6307783
Issue Dt:
10/23/2001
Application #:
09794485
Filing Dt:
02/26/2001
Title:
Descending staircase read technique for a multilevel cell NAND flash memory device
13
Patent #:
6504757
Issue Dt:
01/07/2003
Application #:
09922415
Filing Dt:
08/03/2001
Title:
DOUBLE BOOSTING SCHEME FOR NAND TO IMPROVE PROGRAM INHIBIT CHARACTERISTICS
14
Patent #:
7266664
Issue Dt:
09/04/2007
Application #:
10077778
Filing Dt:
02/20/2002
Publication #:
US20020120820
Pub Dt:
08/29/2002
Title:
MEMORY DEVICE FOR CONTROLLING NONVOLATILE AND VOLATILE MEMORIES
15
Patent #:
6996004
Issue Dt:
02/07/2006
Application #:
10700414
Filing Dt:
11/04/2003
Title:
MINIMIZATION OF FG-FG COUPLING IN FLASH MEMORY
16
Patent #:
7042766
Issue Dt:
05/09/2006
Application #:
10896651
Filing Dt:
07/22/2004
Title:
METHOD OF PROGRAMMING A FLASH MEMORY DEVICE USING MULTILEVEL CHARGE STORAGE
17
Patent #:
7154769
Issue Dt:
12/26/2006
Application #:
11052689
Filing Dt:
02/07/2005
Publication #:
US20060175598
Pub Dt:
08/10/2006
Title:
MEMORY DEVICE INCLUDING BARRIER LAYER FOR IMPROVED SWITCHING SPEED AND DATA RETENTION
18
Patent #:
7184338
Issue Dt:
02/27/2007
Application #:
11215253
Filing Dt:
08/30/2005
Publication #:
US20060077736
Pub Dt:
04/13/2006
Title:
SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE TESTING METHOD, AND PROGRAMMING METHOD
19
Patent #:
7286398
Issue Dt:
10/23/2007
Application #:
11290002
Filing Dt:
11/30/2005
Publication #:
US20060215451
Pub Dt:
09/28/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SAID SEMICONDUCTOR DEVICE
20
Patent #:
7342830
Issue Dt:
03/11/2008
Application #:
11332263
Filing Dt:
01/17/2006
Title:
PROGRAM AND PROGRAM VERIFY OPERATIONS FOR FLASH MEMORY
21
Patent #:
7362620
Issue Dt:
04/22/2008
Application #:
11394491
Filing Dt:
03/31/2006
Publication #:
US20060245247
Pub Dt:
11/02/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
22
Patent #:
7739559
Issue Dt:
06/15/2010
Application #:
11444251
Filing Dt:
05/30/2006
Publication #:
US20060291305
Pub Dt:
12/28/2006
Title:
SEMICONDUCTOR DEVICE AND PROGRAM DATA REDUNDANCY METHOD THEREFOR
23
Patent #:
7626253
Issue Dt:
12/01/2009
Application #:
11514390
Filing Dt:
08/30/2006
Publication #:
US20070045876
Pub Dt:
03/01/2007
Title:
COMPUTING DEVICE INCLUDING A STACKED SEMICONDUCTOR DEVICE
24
Patent #:
7630245
Issue Dt:
12/08/2009
Application #:
11543399
Filing Dt:
10/04/2006
Publication #:
US20070104016
Pub Dt:
05/10/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
25
Patent #:
7968990
Issue Dt:
06/28/2011
Application #:
11654704
Filing Dt:
01/17/2007
Publication #:
US20080169544
Pub Dt:
07/17/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
26
Patent #:
7743203
Issue Dt:
06/22/2010
Application #:
11747608
Filing Dt:
05/11/2007
Publication #:
US20080279005
Pub Dt:
11/13/2008
Title:
MANAGING FLASH MEMORY BASED UPON USAGE HISTORY
27
Patent #:
7945792
Issue Dt:
05/17/2011
Application #:
11873980
Filing Dt:
10/17/2007
Publication #:
US20090106563
Pub Dt:
04/23/2009
Title:
TAMPER REACTIVE MEMORY DEVICE TO SECURE DATA FROM TAMPER ATTACKS
28
Patent #:
7564720
Issue Dt:
07/21/2009
Application #:
11879989
Filing Dt:
07/18/2007
Publication #:
US20080049503
Pub Dt:
02/28/2008
Title:
NONVOLATILE STORAGE AND ERASE CONTROL
29
Patent #:
7894267
Issue Dt:
02/22/2011
Application #:
11929741
Filing Dt:
10/30/2007
Publication #:
US20090109760
Pub Dt:
04/30/2009
Title:
DETERMINISTIC PROGRAMMING ALGORITHM THAT PROVIDES TIGHTER CELL DISTRIBUTIONS WITH A REDUCED NUMBER OF PROGRAMMING PULSES
30
Patent #:
7979667
Issue Dt:
07/12/2011
Application #:
11953501
Filing Dt:
12/10/2007
Publication #:
US20090150646
Pub Dt:
06/11/2009
Title:
MEMORY ARRAY SEARCH ENGINE
31
Patent #:
7761740
Issue Dt:
07/20/2010
Application #:
11955934
Filing Dt:
12/13/2007
Publication #:
US20090158085
Pub Dt:
06/18/2009
Title:
POWER SAFE TRANSLATION TABLE OPERATION IN FLASH MEMORY
32
Patent #:
7602639
Issue Dt:
10/13/2009
Application #:
11957309
Filing Dt:
12/14/2007
Publication #:
US20090154234
Pub Dt:
06/18/2009
Title:
READING ELECTRONIC MEMORY UTILIZING RELATIONSHIPS BETWEEN CELL STATE DISTRIBUTIONS
33
Patent #:
8010776
Issue Dt:
08/30/2011
Application #:
11957793
Filing Dt:
12/17/2007
Publication #:
US20090158023
Pub Dt:
06/18/2009
Title:
ADAPTIVE SYSTEM BOOT ACCELERATOR FOR COMPUTING SYSTEMS
34
Patent #:
8239875
Issue Dt:
08/07/2012
Application #:
11962918
Filing Dt:
12/21/2007
Publication #:
US20090165020
Pub Dt:
06/25/2009
Title:
COMMAND QUEUING FOR NEXT OPERATIONS OF MEMORY DEVICES
35
Patent #:
7675776
Issue Dt:
03/09/2010
Application #:
11963286
Filing Dt:
12/21/2007
Publication #:
US20090161430
Pub Dt:
06/25/2009
Title:
BIT MAP CONTROL OF ERASE BLOCK DEFECT LIST IN A MEMORY
36
Patent #:
7953919
Issue Dt:
05/31/2011
Application #:
11963306
Filing Dt:
12/21/2007
Publication #:
US20090164696
Pub Dt:
06/25/2009
Title:
PHYSICAL BLOCK ADDRESSING OF ELECTRONIC MEMORY DEVICES
37
Patent #:
7949851
Issue Dt:
05/24/2011
Application #:
11966919
Filing Dt:
12/28/2007
Publication #:
US20090172345
Pub Dt:
07/02/2009
Title:
TRANSLATION MANAGEMENT OF LOGICAL BLOCK ADDRESSES AND PHYSICAL BLOCK ADDRESSES
38
Patent #:
7706186
Issue Dt:
04/27/2010
Application #:
11982864
Filing Dt:
11/05/2007
Publication #:
US20080140880
Pub Dt:
06/12/2008
Title:
CONTROLLING A SEMICONDUCTOR DEVICE
39
Patent #:
7895406
Issue Dt:
02/22/2011
Application #:
11986332
Filing Dt:
11/20/2007
Publication #:
US20080147967
Pub Dt:
06/19/2008
Title:
MEMORY DEVICE AND PASSWORD STORING METHOD THEREOF
40
Patent #:
7643371
Issue Dt:
01/05/2010
Application #:
11986385
Filing Dt:
11/20/2007
Publication #:
US20080159011
Pub Dt:
07/03/2008
Title:
ADDRESS/DATA MULTIPLEXED DEVICE
41
Patent #:
8041895
Issue Dt:
10/18/2011
Application #:
12020698
Filing Dt:
01/28/2008
Publication #:
US20090193193
Pub Dt:
07/30/2009
Title:
TRANSLATION TABLE COHERENCY MECAHANISM USING CACHE WAY AND SET INDEX WRITE BUFFERS
42
Patent #:
8117521
Issue Dt:
02/14/2012
Application #:
12198381
Filing Dt:
08/26/2008
Publication #:
US20100058151
Pub Dt:
03/04/2010
Title:
IMPLEMENTATION OF RECYCLING UNUSED ECC PARITY BITS DURING FLASH MEMORY PROGRAMMING
43
Patent #:
7995386
Issue Dt:
08/09/2011
Application #:
12275663
Filing Dt:
11/21/2008
Publication #:
US20100128521
Pub Dt:
05/27/2010
Title:
APPLYING NEGATIVE GATE VOLTAGE TO WORDLINES ADJACENT TO WORDLINE ASSOCIATED WITH READ OR VERIFY TO REDUCE ADJACENT WORDLINE DISTURB
44
Patent #:
8085588
Issue Dt:
12/27/2011
Application #:
12433084
Filing Dt:
04/30/2009
Publication #:
US20100277987
Pub Dt:
11/04/2010
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREOF
45
Patent #:
7869281
Issue Dt:
01/11/2011
Application #:
12550642
Filing Dt:
08/31/2009
Publication #:
US20090316481
Pub Dt:
12/24/2009
Title:
READING ELECTRONIC MEMORY UTILIZING RELATIONSHIPS BETWEEN CELL STATE DISTRIBUTIONS
46
Patent #:
8330263
Issue Dt:
12/11/2012
Application #:
12965672
Filing Dt:
12/10/2010
Publication #:
US20110309494
Pub Dt:
12/22/2011
Title:
SEMICONDUCTOR DEVICE
Assignor
1
SPANSION LLC
Exec Dt:
07/31/2013
Assignee
1
VALLEY DEVICE MANAGEMENT
1209 ORANGE STREET
CORPORATION TRUST CENTER
WILMINGTON, DELAWARE 19801
Correspondence name and address
ANDREW VAN COURT
154 GRAND STREET
VAN COURT & ALDRIDGE LLP
NEW YORK, NY 10013

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