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Total properties:
25
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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08749672
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Filing Dt:
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11/15/1996
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING PLURALITY OF PHASE-LOCKED LOOPS
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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08967658
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Filing Dt:
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11/10/1997
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Title:
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SKEW-REDUCTION CIRCUIT
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Patent #:
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Issue Dt:
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06/06/2000
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Application #:
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08991299
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Filing Dt:
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12/16/1997
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Title:
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INTERLEVEL DIELECTRIC THICKNESS MONITOR FOR COMPLEX SEMICONDUCTOR CHIPS
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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08992618
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Filing Dt:
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12/17/1997
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Title:
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METHOD AND SYSTEM FOR PROVIDING A DRAIN SIDE POCKET IMPLANT
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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08993443
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Filing Dt:
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12/18/1997
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Title:
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NITROGEN ION IMPLANTED AMORPHOUS SILICON TO PRODUCE OXIDATION RESISTANT AND FINER GRAIN POLYSILICON BASED FLOATING GATES
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Patent #:
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Issue Dt:
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06/27/2000
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Application #:
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08993716
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Filing Dt:
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12/18/1997
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Title:
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METHODOLOGY FOR ACHIEVING DUAL GATE OXIDE THICKNESSES
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09032362
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Filing Dt:
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02/27/1998
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Title:
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MULTIPLE CHIP HYBRID PACKAGE USING BUMP TECHNOLOGY
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09032398
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Filing Dt:
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02/27/1998
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Title:
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MULTI-CHIP PACKAGING USING BUMP TECHNOLOGY
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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09033836
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Filing Dt:
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03/03/1998
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Title:
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ELIMINATION OF OXYNITRIDE (ONO) ETCH RESIDUE AND POLYSILICON STRI NGERS THROUGH ISOLATION OF FLOATING GATES ON ADJACENT BITLINES BY POLYSILICON OXIDATION
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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09076663
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Filing Dt:
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05/12/1998
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Title:
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METHODS FOR PREVENTING SILICIDE RESIDUE FORMATION IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09098292
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Filing Dt:
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06/16/1998
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Title:
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RTCVD OXIDE AND N2O ANNEAL FOR TOP OXIDE OF ONO FILM
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09108529
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Filing Dt:
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07/01/1998
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Title:
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PROGRAM/VERIFY TECHNIQUE FOR MULTI-LEVEL FLASH CELLS ENABLING DIFFERENT THRESHOLD LEVELS TO BE SIMULTANEOUSLY PROGRAMMED
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09110446
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Filing Dt:
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07/07/1998
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Title:
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DOUBLE DENSITY NON-VOLATILE MEMEORY CELLS
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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09118382
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Filing Dt:
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07/17/1998
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Title:
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METHOD AND STRUCTURE OF ETCHING A MEMORY CELL POLISILICON GATE LAYER USING RESIST MASK AND ETCHED SILICON OXYNITRIDE
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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09122646
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Filing Dt:
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07/27/1998
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Title:
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VOLTAGE SELECTOR FOR A D/A CONVERTER
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09128024
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Filing Dt:
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08/03/1998
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Title:
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VT REFERENCE VOLTAGE FOR EXTREMELY LOW POWER SUPPLY
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09134525
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Filing Dt:
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08/14/1998
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Title:
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MULTIPURPOSE GRADED SILICON OXYNITRIDE CAP LAYER
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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09134526
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Filing Dt:
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08/14/1998
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Title:
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METHOD FOR FABRICATING A DOPED POLYSILICON FEATURE IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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09189227
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Filing Dt:
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11/11/1998
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Title:
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LPCVD OXIDE AND RTA FOR TOP OXIDE OF ONO FILM TO IMPROVE RELIABILITY FOR FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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06/27/2000
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Application #:
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09199265
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Filing Dt:
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11/25/1998
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Title:
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SEMICONDUCTOR DEVICE CONTAINING P-HDP INTERDIELECTRIC LAYER
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Patent #:
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Issue Dt:
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06/27/2000
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Application #:
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09232023
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Filing Dt:
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01/14/1999
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Title:
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EEPROM DECODER BLOCK HAVING A P-WELL COUPLED TO A CHARGE PUMP FOR CHARGING THE P-WELL AND METHOD OF PROGRAMMING WITH THE EEPROM DECODER BLOCK
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Patent #:
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Issue Dt:
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05/23/2000
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Application #:
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09271330
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Filing Dt:
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03/18/1999
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Title:
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METHOD AND APPARATUS FOR PREVENTING P1 PUNCHTHROUGH
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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09379479
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Filing Dt:
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08/23/1999
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Title:
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FLASH MEMORY ARCHITECTURE EMPLOYING THREE LAYER METAL INTERCONNECT FOR WORD LINE DECODING
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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09421776
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Filing Dt:
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10/19/1999
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Title:
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ADDRESS TRANSISTION DETECT TIMING ARCHITECTURE FOR A SIMULTANEOUS OPERATION FLASH MEMORY
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09427402
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Filing Dt:
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10/25/1999
|
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Title:
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INTEGRATED METHOD BY USING HIGH TEMPERATURE OXIDE FOR TOP OXIDE AND PERIPHERY GATE OXIDE
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