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Total properties:
25
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Patent #:
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Issue Dt:
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05/13/1997
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Application #:
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08166124
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Filing Dt:
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12/10/1993
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Title:
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NON-VOLATILE MEMORY ARRAY CONTROLLER CAPABLE OF CONTROLLING MEMORY BANKS HAVING VARIABLE BIT WIDTHS
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08371704
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Filing Dt:
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01/12/1995
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Title:
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METHOD OF ERASING UPROM TRANSISTORS
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Patent #:
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Issue Dt:
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04/01/1997
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Application #:
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08405016
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Filing Dt:
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03/16/1995
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Title:
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MULTIPLE OPERATION MODE MICROCONTROLLER
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Patent #:
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Issue Dt:
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04/01/1997
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Application #:
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08406305
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Filing Dt:
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03/17/1995
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Title:
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CACHE MEMORY SYSTEM AND METHOD THEREOF FOR STORING A STAGED MEMORY ITEM AND A CACHE TAG WITHIN A SINGLE CACHE ARRAY STRUCTURE
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Patent #:
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Issue Dt:
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04/01/1997
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Application #:
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08420989
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Filing Dt:
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04/07/1995
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Title:
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FLASH EEPROM MEMORY WITH IMPROVED DISCHARGE SPEED USING SUBSTRATE BIAS AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08457588
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Filing Dt:
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06/01/1995
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Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINE PRECHARGER
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Patent #:
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Issue Dt:
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12/02/1997
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Application #:
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08459957
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Filing Dt:
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06/02/1995
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Title:
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LAYERED LOW DIELECTRIC CONSTANT TECHNOLOGY
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08463448
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Filing Dt:
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06/05/1995
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Title:
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NOVEL PROCESSING TECHNIQUES FOR ACHIEVING PRODUCTION-WORTHY, LOW DIELECTRIC, LOW INTERCONNECT RESISTANCE AND HIGH PERFORMANCE IC
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08469953
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Filing Dt:
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06/06/1995
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Title:
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NONVOLATILE MEMORY CELL WITH VERTICAL GATE OVERLAP AND ZERO BIRDS BEAKS
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Patent #:
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Issue Dt:
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08/26/1997
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Application #:
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08474610
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Filing Dt:
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06/07/1995
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Title:
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METHOD OF MAKING NONVOLATILE MEMORY CELL WITH VERICAL GATE OVERLAP AND ZERO BIRDS'BEAKS
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Patent #:
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Issue Dt:
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08/12/1997
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Application #:
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08474879
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Filing Dt:
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06/07/1995
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Title:
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NONVOLATILE MEMORY CELL FORMED USING SELF ALIGNED SOURCE IMPLANT
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Patent #:
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Issue Dt:
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07/22/1997
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Application #:
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08486192
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Filing Dt:
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06/07/1995
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Title:
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METHOD OF INHIBITING DEGRADATION OF ULTRA SHORT CHANNEL CHARGE-CARRYING DEVICES DURING DISCHARGE
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08493640
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Filing Dt:
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06/22/1995
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Title:
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ISOLATION USING SELF-ALIGNED TRENCH FORMATION AND CONVENTIONAL LOCOS
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Patent #:
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Issue Dt:
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05/13/1997
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Application #:
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08543684
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Filing Dt:
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10/16/1995
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Title:
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FLASH EEPROM MEMORY WITH SEPARATE REFERENCE ARRAY
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Patent #:
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Issue Dt:
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06/24/1997
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Application #:
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08547494
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Filing Dt:
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10/24/1995
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Title:
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OVERERASE CORRECTION FOR FLASH MEMORY WHICH LIMITS OVERERASE AND PREVENTS ERASE VERIFY ERRORS
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Patent #:
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Issue Dt:
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07/22/1997
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Application #:
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08551422
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Filing Dt:
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11/01/1995
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Title:
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TEMPERATURE COMPENSATED REFERENCE FOR OVERERASE CORRECTION CIRCUITRY IN A FLASH MEMORY
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Patent #:
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Issue Dt:
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07/01/1997
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Application #:
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08551705
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Filing Dt:
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11/01/1995
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Title:
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PROGRAM ALGORITHM FOR LOW VOLTAGE SINGLE POWER SUPPLY FLASH MEMORIES
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Patent #:
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Issue Dt:
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01/13/1998
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Application #:
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08560459
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Filing Dt:
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11/17/1995
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Title:
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FAST 3-STATE BOOSTER CIRCUIT
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08566204
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Filing Dt:
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12/01/1995
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Title:
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POWER SUPPLY INDEPENDENT CURRENT SOURCE FOR FLASH EPROM ERASURE
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Patent #:
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Issue Dt:
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07/22/1997
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Application #:
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08622933
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Filing Dt:
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03/27/1996
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Title:
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POWER LINE CONNECTION CIRCUIT AND POWER LINE SWITCH IC FOR THE SAME
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|
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Patent #:
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Issue Dt:
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06/10/1997
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Application #:
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08630919
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Filing Dt:
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04/05/1996
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Title:
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PARALLEL PAGE BUFFER VERIFY OR READ OF CELLS ON A WORD LINE USING A SIGNAL FROM A REFERENCE CELL IN A FLASH MEMORY DEVICE
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Patent #:
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|
Issue Dt:
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05/13/1997
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Application #:
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08634512
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Filing Dt:
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04/18/1996
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Title:
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SYSTEM FOR CONSTANT FIELD ERASURE IN A FLASH EPROM
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|
|
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Patent #:
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|
Issue Dt:
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07/29/1997
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Application #:
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08684920
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Filing Dt:
|
07/22/1996
|
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Title:
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A FLASH EEPROM MEMORY WITH REDUCED COLUMN LEAKAGE CURRENT AND METHOD THEREFOR
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|
|
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Patent #:
|
|
Issue Dt:
|
10/07/1997
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Application #:
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08701288
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Filing Dt:
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08/22/1996
|
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Title:
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ERASE METHOD FOR PAGE MODE MULTIPLE BITS-PER-CELL FLASH EEPROM
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|
|
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Patent #:
|
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Issue Dt:
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12/02/1997
|
Application #:
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08769178
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Filing Dt:
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12/18/1996
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Title:
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SEMICONDUCTOR DEVICE FROM SELF-ALIGNED SOURCE (SAS) ETCH IN A SEMICONDUCTOR DEVICE
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