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Total properties:
25
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09106177
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Filing Dt:
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06/29/1998
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Title:
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EEPROM HAVING STACKED DIELECTRIC TO INCREASE PROGRAMMING SPEED
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09182525
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Filing Dt:
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10/30/1998
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Title:
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HIGH VOLTAGE TRANSISTOR WITH LOW BODY EFFECT AND LOW LEAKAGE
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09263699
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Filing Dt:
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03/05/1999
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Title:
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EFFECT OF DOPED AMORPHOUS SI THICKNESS ON BETTER POLY 1 CONTACT RESISTANCE PERFORMANCE FOR NAND TYPE FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09286464
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Filing Dt:
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04/06/1999
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Title:
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METHOD FOR TRIMMING A PHOTORESIST PATTERN LINE FOR MEMORY GATE ETCHING
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09309710
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Filing Dt:
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05/11/1999
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Title:
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LOCAL OSCILLATION CIRCUIT AND A RECEIVING CIRCUIT INCLUDING THE LOCAL OSCILLATION CIRCUIT
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09404394
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Filing Dt:
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09/23/1999
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Title:
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SEMICONDUCTOR DEVICE WITH CONTACTS HAVING A SLOPED PROFILE
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09421985
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Filing Dt:
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10/19/1999
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Title:
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LOW VOLTAGE READ CASCODE FOR 2V/3V AND DIFFERENT BANK COMBINATIONS WITHOUT METAL OPTIONS FOR A SIMULTANEOUS OPERATION FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09487073
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Filing Dt:
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01/19/2000
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Title:
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Process for fabricating an eeprom device having a pocket substrate region
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09493436
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Filing Dt:
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01/29/2000
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Title:
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METHOD FOR FORMING SELF-ALIGNED CONTACTS AND INTERCONNECTION LINES USING DUAL DAMASCENE TECHNIQUES
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09534507
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Filing Dt:
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03/24/2000
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Title:
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METHOD FOR FABRICATING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09592474
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Filing Dt:
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06/09/2000
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Title:
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Activation of wordline decoders to transfer a high voltage supply
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09597358
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Filing Dt:
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06/19/2000
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Title:
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Dual bit isolation scheme for flash devices
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09627567
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Filing Dt:
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07/28/2000
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Title:
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Use of an etch to reduce the thickness and round the edges of a resist mask during the creation of a memory cell
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09648361
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Filing Dt:
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08/25/2000
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Title:
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METHOD OF FORMING ONO FLASH MEMORY DEVICES USING LOW ENERGY NITROGEN IMPLANTATION
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09657029
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Filing Dt:
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09/07/2000
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Title:
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Using negative gate erase voltage to simultaneously erase two bits from a non-volatile memory cell with an oxide-nitride-oxide (ONO) gate structure
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09663552
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Filing Dt:
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09/18/2000
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Title:
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System and method for tracking sensing speed by an equalization pulse for a high density flash memory device
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09667347
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Filing Dt:
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09/22/2000
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Title:
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Serial sequencing of automatic program disturb erase verify during a fast erase mode
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09686686
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Filing Dt:
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10/11/2000
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Title:
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Selective erasure of a non-volatile memory cell of a flash memory device
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09689036
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Filing Dt:
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10/12/2000
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Title:
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Two side decoding of a memory array
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09694688
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Filing Dt:
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10/23/2000
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Title:
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Low column leakage NOR flash array - single cell implementation
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09811288
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Filing Dt:
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03/16/2001
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Publication #:
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Pub Dt:
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08/23/2001
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Title:
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Method for reduced gate aspect ratio to improve gap-fill after spacer etch
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09815049
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Filing Dt:
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03/23/2001
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Publication #:
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Pub Dt:
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02/28/2002
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Title:
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CHARGE CIRCUIT THAT PERFORMS CHARGE CONTROL BY COMPARING A PLURALITY OF BATTERY VOLTAGES
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09817628
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Filing Dt:
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03/26/2001
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Title:
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FORMATION OF NON-VOLATILE MEMORY DEVICE COMPRISED OF AN ARRAY OF VERTICAL FIELD EFFECT TRANSISTOR STRUCTURES
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09884583
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Filing Dt:
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06/19/2001
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Title:
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Ceiling test mode to characterize the threshold voltage distribution of over programmed memory cells
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09928355
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Filing Dt:
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08/14/2001
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Publication #:
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Pub Dt:
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03/07/2002
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Title:
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SYSTEM LSI HAVING COMMUNICATION FUNCTION
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