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Total properties:
25
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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08993149
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Filing Dt:
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12/18/1997
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Title:
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METHODOLOGY FOR ACHIEVING DUAL FIELD OXIDE THICKNESSES
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09052058
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Filing Dt:
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03/30/1998
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Title:
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TRENCHED GATE SEMICONDUCTOR DEVICE AND METHOD FOR LOW POWER APPLICATIONS
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09076584
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Filing Dt:
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05/12/1998
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Title:
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METHODS AND ARRANGEMENTS FOR REDUCING STRESS AND PREVENTING CRACKING IN A SILICIDE LAYER
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09177294
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Filing Dt:
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10/22/1998
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Title:
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PROCESS FOR FABRICATING A COMMON SOURCE REGION IN MEMORY DEVICES
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09198654
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Filing Dt:
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11/24/1998
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Title:
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METHOD FOR FABRICATING A HIGH-DENSITY AND HIGH-RELIABILITY EEPROM DEVICE
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09257733
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Filing Dt:
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02/25/1999
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Title:
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USE OF IMPLANTED IONS TO REDUCE OXIDE-NITRIDE-OXIDE (ONO) ETCH RESIDUE AND POLYSTRINGERS
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09309994
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Filing Dt:
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05/11/1999
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Title:
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CORE FIELD ISOLATION FOR A NAND FLASH MEMORY
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09348583
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Filing Dt:
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07/07/1999
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Title:
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LIGHT FLOATING GATE DOPING TO IMPROVE TUNNEL OXIDE RELIABILITY
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09353781
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Filing Dt:
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07/15/1999
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Title:
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SEMICONDUCTOR DEVICE WITH MULTIPLE CONTACT SIZES
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09369638
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Filing Dt:
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08/06/1999
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Title:
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METHOD FOR PROVIDING A DOPANT LEVEL FOR POLYSILICON FOR FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09426239
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Filing Dt:
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10/25/1999
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Title:
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METHOD TO GENERATE A MONOS TYPE FLASH CELL USING POLYCRYSTALLINE SILICON AS AN ONO TOP LAYER
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09436503
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Filing Dt:
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11/09/1999
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Title:
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DOUBLE DENSITY NON-VOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09470568
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Filing Dt:
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12/22/1999
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Title:
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FULLY RECESSED SEMICONDUCTOR METHOD FOR LOW POWER APPLICATIONS WITH SINGLE WRAP AROUND BURIED DRAIN REGION
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09483557
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Filing Dt:
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01/14/2000
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Title:
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Integrated circuit incorporating a memory cell and a transistor elevated above an insulating base
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09490340
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Filing Dt:
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01/24/2000
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Title:
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Distributed voltage charge circuits to reduce sensing time in a memory device
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09501448
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Filing Dt:
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02/10/2000
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Title:
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Simultaneous program, program-verify scheme
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09504696
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Filing Dt:
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02/16/2000
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Title:
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Method of maintaining constant erasing speeds for non-volatile memory cells
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09512617
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Filing Dt:
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02/25/2000
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Title:
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High speed, high precision, power supply and process independent boost level clamping technique
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09516785
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Filing Dt:
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03/01/2000
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Title:
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Output circuit and battery pack
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09543991
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Filing Dt:
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04/06/2000
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Title:
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New method to fabricate a high coupling flash cell with less silicide seam problem
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09557832
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Filing Dt:
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04/26/2000
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Title:
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Auto adjusting window placement scheme for an NROM virtual ground array
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Patent #:
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|
Issue Dt:
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05/15/2001
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Application #:
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09562442
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Filing Dt:
|
05/01/2000
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Title:
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Methodology for achieving dual gate oxide thicknesses
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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09593303
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Filing Dt:
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06/13/2000
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Title:
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Method to reduce capactive loading in flash memory x-decoder for accurate voltage control at wordlines and select lines
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09602095
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Filing Dt:
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06/22/2000
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Title:
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Voltage protection of write protect cams
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Patent #:
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|
Issue Dt:
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05/08/2001
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Application #:
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09638055
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Filing Dt:
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08/11/2000
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|
Title:
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Burst read mode word line boosting
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