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Total properties:
25
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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08992616
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Filing Dt:
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12/17/1997
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Title:
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METHOD AND SYSTEM FOR PROVIDING LOCALIZED GATE EDGE ROUNDING WITH MINIMAL ENCROACHMENT AND GATE EDGE LIFTING
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09205899
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Filing Dt:
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12/04/1998
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Title:
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METHOD OF FORMING ONO STACKED FILMS AND DCS TUNGSTEN SILICIDE GATE TO IMPROVE POLYCIDE GATE PERFORMANCE FOR FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09322195
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Filing Dt:
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05/28/1999
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Title:
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METHOD OF UTILIZING FAST CHIP ERASE TO SCREEN ENDURANCE REJECTS
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09375504
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Filing Dt:
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08/17/1999
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Title:
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METHOD FOR ETCHING MEMORY GATE STACK USING THIN RESIST LAYER
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09399414
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Filing Dt:
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09/20/1999
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Title:
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PROCESS TO IMPROVE READ DISTURB FOR NAND FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09429722
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Filing Dt:
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10/29/1999
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Title:
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PROCESS FOR FABRICATING HIGH DENSITY MEMORY CELLS USING A METALLIC HARD MASK
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09433041
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Filing Dt:
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10/25/1999
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Title:
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PROCESS FOR FABRICATING AN ONO STRUCTURE HAVING A SILICON-RICH SILICON NITRIDE LAYER
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09513260
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Filing Dt:
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02/24/2000
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Title:
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DOUBLE SELF-ALIGNING SHALLOW TRENCH ISOLATION SEMICONDUCTOR AND MANUFACTURING METHOD THEREFOR
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09588117
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Filing Dt:
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05/31/2000
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Title:
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METHOD FOR ELIMINATING ANTI-REFLECTIVE COATING IN SEMICONDUCTORS
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09588119
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Filing Dt:
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05/31/2000
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Title:
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METHOD FOR CREATING PARTIALLY UV TRANSPARENT ANTI-REFLECTIVE COATING FOR SEMICONDUCTORS
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09627584
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Filing Dt:
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07/28/2000
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Title:
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Optimization of thermal cycle for the formation of pocket implants
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09627664
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Filing Dt:
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07/28/2000
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Title:
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Nitrogen implant after bit-line formation for ono flash memory devices
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09645623
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Filing Dt:
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08/24/2000
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Title:
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Fast-erase memory devices and method for reducing erasing time in a memory device
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09648077
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Filing Dt:
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08/25/2000
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Title:
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METHOD OF FORMING ONO FLASH MEMORY DEVICES USING RAPID THERMAL OXIDATION
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09654831
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Filing Dt:
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09/01/2000
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Title:
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ARRANGEMENT FOR PROGRAMMING SELECTED DEVICE REGISTERS DURING INITIALIZATION FROM AN EXTERNAL MEMORY
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09656675
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Filing Dt:
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09/07/2000
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Title:
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USING A NEGATIVE GATE ERASE TO INCREASE THE CYCLING ENDURANCE OF A NON-VOLATILE MEMORY CELL WITH AN OXIDE-NITRIDE-OXIDE (ONO) STRUCTURE
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09670229
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Filing Dt:
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09/25/2000
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Title:
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PROCESS FOR FABRICATING SHALLOW POCKET REGIONS IN A NON-VOLATILE SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09675372
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Filing Dt:
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09/29/2000
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Title:
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POWER-SAVING MODES FOR MEMORIES
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09680344
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Filing Dt:
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10/05/2000
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Title:
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Wordline driver for flash memory read mode
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09794479
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Filing Dt:
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02/26/2001
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Title:
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CONFIGURE REGISTERS AND LOADS TO TAILOR A MULTI-LEVEL CELL FLASH DESIGN
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09822995
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Filing Dt:
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03/30/2001
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Title:
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I/O partitioning system and methodology to reduce band-to-band tunneling current during erase
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09829657
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Filing Dt:
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04/10/2001
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Publication #:
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Pub Dt:
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12/06/2001
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Title:
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DUAL-PORTED CAMS FOR A SIMULTANEOUS OPERATION FLASH MEMORY
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09842288
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Filing Dt:
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04/25/2001
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Title:
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ACCURATE VERIFY APPARATUS AND METHOD FOR NOR FLASH MEMORY CELLS IN THE PRESENCE OF HIGH COLUMN LEAKAGE
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09873927
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Filing Dt:
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06/04/2001
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Title:
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METHODS AND APPARATUS FOR READING A CAM CELL USING BOOSTED AND REGULATED GATE VOLTAGE
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09882242
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Filing Dt:
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06/15/2001
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Title:
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SPECIES IMPLANTATION FOR MINIMIZING INTERFACE DEFECT DENSITY IN FLASH MEMORY DEVICES
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