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Total properties:
50
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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09728554
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Filing Dt:
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12/01/2000
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Title:
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DUAL SPACER PROCESS FOR NON-VOLATILE MEMORY DEVICES
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Patent #:
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Issue Dt:
|
02/21/2006
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Application #:
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10015033
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Filing Dt:
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12/11/2001
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Title:
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SWITCHED-CAPACITOR CONTROLLER TO CONTROL THE RISE TIMES OF ON-CHIP GENERATED HIGH VOLTAGES
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Patent #:
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Issue Dt:
|
03/21/2006
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Application #:
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10079775
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Filing Dt:
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02/19/2002
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Publication #:
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Pub Dt:
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06/20/2002
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Title:
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METHOD FOR REDUCING ANTI-REFLECTIVE COATING LAYER REMOVAL DURING REMOVAL OF PHOTORESIST
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Patent #:
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Issue Dt:
|
05/30/2006
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Application #:
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10190002
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Filing Dt:
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07/03/2002
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Title:
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METHOD FOR SEMICONDUCTOR WAFER PLANARIZATION BY ISOLATION MATERIAL GROWTH
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Patent #:
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Issue Dt:
|
03/07/2006
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Application #:
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10200518
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Filing Dt:
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07/22/2002
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Title:
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ADDRESS SEQUENCER WITHIN BIST (BUILT-IN-SELF-TEST) SYSTEM
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Patent #:
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Issue Dt:
|
04/11/2006
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Application #:
|
10200526
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Filing Dt:
|
07/22/2002
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Title:
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DIAGNOSTIC MODE FOR TESTING FUNCTIONALITY OF BIST (BUILT-IN-SELF-TEST) BACK-END STATE MACHINE
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Patent #:
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Issue Dt:
|
03/14/2006
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Application #:
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10211317
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Filing Dt:
|
08/05/2002
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Title:
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NON-VOLATILE MEMORY DEVICE
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Patent #:
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Issue Dt:
|
05/23/2006
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Application #:
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10305724
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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LATERAL DOPED CHANNEL
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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10316569
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Filing Dt:
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12/10/2002
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Publication #:
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Pub Dt:
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06/10/2004
| | | | |
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Title:
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METHOD AND SYSTEM FOR REDUCING CONTACT DEFECTS USING NON CONVENTIONAL CONTACT FORMATION METHOD FOR SEMICONDUCTOR CELLS
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Patent #:
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Issue Dt:
|
04/18/2006
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Application #:
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10320910
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Filing Dt:
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12/17/2002
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|
Title:
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DIFFERENTIALLY MIS-ALIGNED CONTACTS IN FLASH ARRAYS TO CALIBRATE FAILURE MODES
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Patent #:
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Issue Dt:
|
02/28/2006
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Application #:
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10355177
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Filing Dt:
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01/31/2003
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Publication #:
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Pub Dt:
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09/04/2003
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Title:
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MICROCOMPUTER, METHOD OF CONTROLLING CACHE MEMORY, AND METHOD OF CONTROLLING CLOCK
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Patent #:
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Issue Dt:
|
04/25/2006
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Application #:
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10358586
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Filing Dt:
|
02/05/2003
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|
Title:
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ONO FABRICATION PROCESS FOR INCREASING OXYGEN CONTENT AT BOTTOM OXIDE-SUBSTRATE INTERFACE IN FLASH MEMORY DEVICES
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|
|
|
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Patent #:
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|
Issue Dt:
|
04/11/2006
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Application #:
|
10385527
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Filing Dt:
|
03/12/2003
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|
Publication #:
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Pub Dt:
|
04/22/2004
| | | | |
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Title:
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INTERNAL BUS TESTING DEVICE AND METHOD
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|
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Patent #:
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|
Issue Dt:
|
04/11/2006
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Application #:
|
10387427
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Filing Dt:
|
03/14/2003
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|
Publication #:
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Pub Dt:
|
10/23/2003
| | | | |
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Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME
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|
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Patent #:
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|
Issue Dt:
|
02/21/2006
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Application #:
|
10438942
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Filing Dt:
|
05/16/2003
|
|
Title:
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LASER THERMAL ANNEALING METHODS FOR FLASH MEMORY DEVICES
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|
|
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Patent #:
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|
Issue Dt:
|
04/04/2006
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Application #:
|
10617450
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Filing Dt:
|
07/11/2003
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|
Publication #:
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Pub Dt:
|
01/13/2005
| | | | |
|
Title:
|
UNDOPED OXIDE LINER/BPSG FOR IMPROVED DATA RETENTION
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|
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Patent #:
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|
Issue Dt:
|
03/14/2006
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Application #:
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10631856
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Filing Dt:
|
08/01/2003
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|
Publication #:
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Pub Dt:
|
04/01/2004
| | | | |
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Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE SUPPLYING PROPER PROGRAM POTENTIAL
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Patent #:
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|
Issue Dt:
|
04/11/2006
|
Application #:
|
10662011
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Filing Dt:
|
09/11/2003
|
|
Title:
|
METHOD FOR FABRICATING A MEMORY DEVICE
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|
|
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|
Patent #:
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|
Issue Dt:
|
05/16/2006
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Application #:
|
10665406
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Filing Dt:
|
09/22/2003
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|
Publication #:
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Pub Dt:
|
01/27/2005
| | | | |
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Title:
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PORTABLE DEVICE HAVING A CHARGING CIRCUIT AND SEMICONDUCTOR DEVICE FOR USE IN THE CHARGING CIRCUIT OF THE SAME
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|
|
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Patent #:
|
|
Issue Dt:
|
03/21/2006
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Application #:
|
10699903
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Filing Dt:
|
11/03/2003
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|
Publication #:
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Pub Dt:
|
05/05/2005
| | | | |
|
Title:
|
SIDEWALL FORMATION FOR HIGH DENSITY POLYMER MEMORY ELEMENT ARRAY
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|
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|
Patent #:
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|
Issue Dt:
|
03/14/2006
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Application #:
|
10726868
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Filing Dt:
|
12/03/2003
|
|
Title:
|
DIELECTRIC PATTERN FORMATION FOR ORGANIC ELECTRONIC DEVICES
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|
|
|
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Patent #:
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|
Issue Dt:
|
04/04/2006
|
Application #:
|
10755979
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Filing Dt:
|
01/12/2004
|
|
Title:
|
SUBSTRATE BIAS FOR PROGRAMMING NON-VOLATILE MEMORY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10756573
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Filing Dt:
|
01/12/2004
|
|
Title:
|
HIGH VOLTAGE TRANSISTOR SCALING TILT ION IMPLANT METHOD
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10758173
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Filing Dt:
|
01/14/2004
|
|
Title:
|
ELECTROSTATIC DISCHARGE PERFORMANCE OF A SILICON STRUCTURE AND EFFICIENT USE OF AREA WITH ELECTROSTATIC DISCHARGE PROTECTIVE DEVICE UNDER THE PAD APPROACH AND ADJUSTMENT OF VIA CONFIGURATION THERETO TO CONTROL DRAIN JUNCTION RESISTANCE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10759855
|
Filing Dt:
|
01/16/2004
|
|
Title:
|
FLEXIBLE CASCODE AMPLIFIER CIRCUIT WITH HIGH GAIN FOR FLASH MEMORY CELLS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10770245
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Filing Dt:
|
02/02/2004
|
|
Title:
|
DISPOSABLE HARD MASK FOR MEMORY BITLINE SCALING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10776850
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Filing Dt:
|
02/11/2004
|
|
Publication #:
|
|
Pub Dt:
|
08/19/2004
| | | | |
|
Title:
|
MEMORY DEVICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/11/2006
|
Application #:
|
10795890
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Filing Dt:
|
03/08/2004
|
|
Title:
|
SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10795924
|
Filing Dt:
|
03/08/2004
|
|
Title:
|
SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10796005
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Filing Dt:
|
03/10/2004
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|
Publication #:
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Pub Dt:
|
04/21/2005
| | | | |
|
Title:
|
CLOCK SHIFT CIRCUIT FOR GRADUAL FREQUENCY CHANGE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/28/2006
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Application #:
|
10806150
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Filing Dt:
|
03/23/2004
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|
Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
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Title:
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DC/DC CONVERTER
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|
|
|
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Patent #:
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|
Issue Dt:
|
04/25/2006
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Application #:
|
10808532
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Filing Dt:
|
03/25/2004
|
|
Publication #:
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Pub Dt:
|
04/28/2005
| | | | |
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Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT USING BAND-GAP REFERENCE CIRCUIT
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|
|
|
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Patent #:
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|
Issue Dt:
|
03/28/2006
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Application #:
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10818112
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Filing Dt:
|
04/05/2004
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|
Publication #:
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Pub Dt:
|
09/30/2004
| | | | |
|
Title:
|
UV-BLOCKING LAYER FOR REDUCING UV-INDUCED CHARGING OF SONOS DUAL-BIT FLASH MEMORY DEVICES IN BEOL PROCESSING
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|
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Patent #:
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|
Issue Dt:
|
03/07/2006
|
Application #:
|
10823972
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Filing Dt:
|
04/13/2004
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|
Title:
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MEMORY DEVICE WITH AN ALTERNATING VSS INTERCONNECTION
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Patent #:
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|
Issue Dt:
|
04/18/2006
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Application #:
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10839561
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Filing Dt:
|
05/04/2004
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Title:
|
METHOD AND APPARATUS FOR ELIMINATING WORD LINE BENDING BY SOURCE SIDE IMPLANTATION
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Patent #:
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Issue Dt:
|
03/07/2006
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Application #:
|
10860450
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Filing Dt:
|
06/03/2004
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Title:
|
METHOD OF DETERMINING VOLTAGE COMPENSATION FOR FLASH MEMORY DEVICES
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Patent #:
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|
Issue Dt:
|
05/30/2006
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Application #:
|
10864142
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Filing Dt:
|
06/08/2004
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|
Title:
|
MEMORY WORDLINE SPACER
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|
Patent #:
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|
Issue Dt:
|
02/07/2006
|
Application #:
|
10869774
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Filing Dt:
|
06/16/2004
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Title:
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SEMICONDUCTOR DEVICE WITH CORE AND PERIPHERY REGIONS
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Patent #:
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Issue Dt:
|
03/28/2006
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Application #:
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10887782
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Filing Dt:
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07/09/2004
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Title:
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METHOD OF REFERENCE CELL DESIGN FOR OPTIMIZED MEMORY CIRCUIT YIELD
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Patent #:
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Issue Dt:
|
05/09/2006
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Application #:
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10909693
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Filing Dt:
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08/02/2004
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Publication #:
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Pub Dt:
|
02/02/2006
| | | | |
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Title:
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FLASH MEMORY UNIT AND METHOD OF PROGRAMMING A FLASH MEMORY DEVICE
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Patent #:
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|
Issue Dt:
|
03/14/2006
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Application #:
|
10948644
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Filing Dt:
|
09/24/2004
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|
Publication #:
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Pub Dt:
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09/29/2005
| | | | |
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Title:
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SWITCHING REGULATOR CONTROL CIRCUIT, SWITCHING REGULATOR AND SWITCHING REGULATOR CONTROL METHOD
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10968713
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Filing Dt:
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10/19/2004
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|
Title:
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PATTERNING FOR ELONGATED VSS CONTACT FLASH MEMORY
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Patent #:
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Issue Dt:
|
03/28/2006
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Application #:
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10981833
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Filing Dt:
|
11/04/2004
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|
Title:
|
RAMPED SOFT PROGRAMMING FOR CONTROL OF ERASE VOLTAGE DISTRIBUTIONS IN FLASH MEMORY DEVICES
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|
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Patent #:
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|
Issue Dt:
|
05/02/2006
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Application #:
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10982296
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Filing Dt:
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11/05/2004
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Title:
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MULTI BIT PROGRAM ALGORITHM
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Patent #:
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Issue Dt:
|
04/25/2006
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Application #:
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10990706
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Filing Dt:
|
11/17/2004
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|
Publication #:
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Pub Dt:
|
05/18/2006
| | | | |
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Title:
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DIODE ARRAY ARCHITECTURE FOR ADDRESSING NANOSCALE RESISTIVE MEMORY ARRAYS
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Patent #:
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|
Issue Dt:
|
02/21/2006
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Application #:
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10997345
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Filing Dt:
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11/24/2004
|
|
Title:
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FULLY ISOLATED DIELECTRIC MEMORY CELL STRUCTURE FOR A DUAL BIT NITRIDE STORAGE DEVICE AND PROCESS FOR MAKING SAME
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Patent #:
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|
Issue Dt:
|
05/16/2006
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Application #:
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11061119
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Filing Dt:
|
02/18/2005
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Publication #:
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Pub Dt:
|
08/25/2005
| | | | |
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Title:
|
CURRENT-VOLTAGE CONVERTER CIRCUIT AND ITS CONTROL METHOD
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|
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Patent #:
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|
Issue Dt:
|
02/28/2006
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Application #:
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11085138
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Filing Dt:
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03/22/2005
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|
Publication #:
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Pub Dt:
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07/28/2005
| | | | |
|
Title:
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PULSE WIDTH MEASURING DEVICE WITH AUTOMATIC RANGE SETTING FUNCTION
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Patent #:
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|
Issue Dt:
|
05/09/2006
|
Application #:
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11099517
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Filing Dt:
|
04/06/2005
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|
Publication #:
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Pub Dt:
|
08/11/2005
| | | | |
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Title:
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CRYSTAL OSCILLATION CIRCUIT
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Patent #:
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|
Issue Dt:
|
05/30/2006
|
Application #:
|
11194471
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Filing Dt:
|
08/02/2005
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|
Title:
|
MEMORY DEVICE WITH BARRIER LAYER
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|
