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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036043/0013   Pages: 153
Recorded: 07/01/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 50
1
Patent #:
7701178
Issue Dt:
04/20/2010
Application #:
10954754
Filing Dt:
10/01/2004
Publication #:
US20050275379
Pub Dt:
12/15/2005
Title:
CHARGE CONTROL THAT KEEPS CONSTANT INPUT VOLTAGE SUPPLIED TO BATTERY PACK
2
Patent #:
7692236
Issue Dt:
04/06/2010
Application #:
11059139
Filing Dt:
02/15/2005
Title:
MULTIPLE DUAL BIT MEMORY INTEGRATED CIRCUIT SYSTEM
3
Patent #:
7737019
Issue Dt:
06/15/2010
Application #:
11075999
Filing Dt:
03/08/2005
Title:
METHOD FOR CONTAINING A SILICIDED GATE WITHIN A SIDEWALL SPACER IN INTEGRATED CIRCUIT TECHNOLOGY
4
Patent #:
7720138
Issue Dt:
05/18/2010
Application #:
11131322
Filing Dt:
05/18/2005
Publication #:
US20050278608
Pub Dt:
12/15/2005
Title:
COMMUNICATION SYSTEM
5
Patent #:
7706183
Issue Dt:
04/27/2010
Application #:
11189923
Filing Dt:
07/27/2005
Publication #:
US20070035991
Pub Dt:
02/15/2007
Title:
READ MODE FOR FLASH MEMORY
6
Patent #:
7736953
Issue Dt:
06/15/2010
Application #:
11291342
Filing Dt:
11/30/2005
Publication #:
US20060091422
Pub Dt:
05/04/2006
Title:
SEMICONDUCTOR MEMORY AND METHOD OF FABRICATING THE SAME
7
Patent #:
7733995
Issue Dt:
06/08/2010
Application #:
11305088
Filing Dt:
12/19/2005
Publication #:
US20070071085
Pub Dt:
03/29/2007
Title:
NOISE FILTER AND FILTERING METHOD
8
Patent #:
7696616
Issue Dt:
04/13/2010
Application #:
11339352
Filing Dt:
01/25/2006
Publication #:
US20060170090
Pub Dt:
08/03/2006
Title:
STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING STACKED TYPE SEMICONDUCTOR DEVICE
9
Patent #:
7734896
Issue Dt:
06/08/2010
Application #:
11390131
Filing Dt:
03/28/2006
Publication #:
US20070074001
Pub Dt:
03/29/2007
Title:
ENHANCED PROCESSOR ELEMENT STRUCTURE IN A RECONFIGURABLE INTEGRATED CIRCUIT DEVICE
10
Patent #:
7692253
Issue Dt:
04/06/2010
Application #:
11412574
Filing Dt:
04/27/2006
Publication #:
US20070252219
Pub Dt:
11/01/2007
Title:
MEMORY CELL ARRAY WITH LOW RESISTANCE COMMON SOURCE AND HIGH CURRENT DRIVABILITY
11
Patent #:
7729896
Issue Dt:
06/01/2010
Application #:
11439124
Filing Dt:
05/24/2006
Publication #:
US20070233451
Pub Dt:
10/04/2007
Title:
CYCLE SIMULATION METHOD, CYCLE SIMULATOR, AND COMPUTER PRODUCT
12
Patent #:
7719136
Issue Dt:
05/18/2010
Application #:
11446140
Filing Dt:
06/05/2006
Publication #:
US20070205662
Pub Dt:
09/06/2007
Title:
POWER SOURCE CONTROL CIRCUIT, POWER SUPPLY DEVICE, AND CONTROL METHOD FOR THE SAME
13
Patent #:
7724071
Issue Dt:
05/25/2010
Application #:
11493467
Filing Dt:
07/25/2006
Publication #:
US20070085597
Pub Dt:
04/19/2007
Title:
VOLTAGE BOOSTING DEVICE AND METHOD FOR SEMICONDUCTOR DEVICE
14
Patent #:
7750741
Issue Dt:
07/06/2010
Application #:
11505446
Filing Dt:
08/17/2006
Publication #:
US20070200637
Pub Dt:
08/30/2007
Title:
PLL CIRCUIT AND SEMICONDUCTOR DEVICE
15
Patent #:
7706197
Issue Dt:
04/27/2010
Application #:
11510077
Filing Dt:
08/25/2006
Publication #:
US20070047342
Pub Dt:
03/01/2007
Title:
STORAGE DEVICE AND CONTROL METHOD OF STORAGE DEVICE
16
Patent #:
7705483
Issue Dt:
04/27/2010
Application #:
11526051
Filing Dt:
09/25/2006
Publication #:
US20070210649
Pub Dt:
09/13/2007
Title:
DC-DC CONVERTER CONTROL CIRCUIT, DC-DC CONVERTER, POWER SUPPLY UNIT, AND DC-DC CONVERTER CONTROL METHOD
17
Patent #:
7683473
Issue Dt:
03/23/2010
Application #:
11540034
Filing Dt:
09/28/2006
Publication #:
US20070105304
Pub Dt:
05/10/2007
Title:
SEMICONDUCTOR DEVICE, FABRICATION METHOD THEREFOR, AND FILM FABRICATION METHOD
18
Patent #:
7750407
Issue Dt:
07/06/2010
Application #:
11612265
Filing Dt:
12/18/2006
Publication #:
US20080142889
Pub Dt:
06/19/2008
Title:
STRAPPING CONTACT FOR CHARGE PROTECTION
19
Patent #:
7691668
Issue Dt:
04/06/2010
Application #:
11612992
Filing Dt:
12/19/2006
Publication #:
US20080142942
Pub Dt:
06/19/2008
Title:
METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING
20
Patent #:
7745236
Issue Dt:
06/29/2010
Application #:
11614767
Filing Dt:
12/21/2006
Publication #:
US20080153183
Pub Dt:
06/26/2008
Title:
FLOATING GATE PROCESS METHODOLOGY
21
Patent #:
7691737
Issue Dt:
04/06/2010
Application #:
11614770
Filing Dt:
12/21/2006
Publication #:
US20080153185
Pub Dt:
06/26/2008
Title:
COPPER PROCESS METHODOLOGY
22
Patent #:
7687360
Issue Dt:
03/30/2010
Application #:
11615365
Filing Dt:
12/22/2006
Publication #:
US20080149988
Pub Dt:
06/26/2008
Title:
METHOD OF FORMING SPACED-APART CHARGE TRAPPING STACKS
23
Patent #:
7724075
Issue Dt:
05/25/2010
Application #:
11634776
Filing Dt:
12/06/2006
Publication #:
US20080136381
Pub Dt:
06/12/2008
Title:
METHOD TO PROVIDE A HIGHER REFERENCE VOLTAGE AT A LOWER POWER SUPPLY IN FLASH MEMORY DEVICES
24
Patent #:
7746706
Issue Dt:
06/29/2010
Application #:
11639935
Filing Dt:
12/15/2006
Publication #:
US20080144391
Pub Dt:
06/19/2008
Title:
METHODS AND SYSTEMS FOR MEMORY DEVICES
25
Patent #:
7755922
Issue Dt:
07/13/2010
Application #:
11724788
Filing Dt:
03/16/2007
Publication #:
US20080175035
Pub Dt:
07/24/2008
Title:
NON-VOLATILE RESISTANCE CHANGING FOR ADVANCED MEMORY APPLICATIONS
26
Patent #:
7682905
Issue Dt:
03/23/2010
Application #:
11746122
Filing Dt:
05/09/2007
Publication #:
US20080280410
Pub Dt:
11/13/2008
Title:
SELF ALIGNED NARROW STORAGE ELEMENTS FOR ADVANCED MEMORY DEVICE
27
Patent #:
7713875
Issue Dt:
05/11/2010
Application #:
11748215
Filing Dt:
05/14/2007
Publication #:
US20080150007
Pub Dt:
06/26/2008
Title:
VARIABLE SALICIDE BLOCK FOR RESISTANCE EQUALIZATION IN AN ARRAY
28
Patent #:
7732276
Issue Dt:
06/08/2010
Application #:
11796582
Filing Dt:
04/26/2007
Publication #:
US20080265301
Pub Dt:
10/30/2008
Title:
SELF-ALIGNED PATTERNING METHOD BY USING NON-CONFORMAL FILM AND ETCH BACK FOR FLASH MEMORY AND OTHER SEMICONDUCTOR APPLICATIONS
29
Patent #:
7749855
Issue Dt:
07/06/2010
Application #:
11838483
Filing Dt:
08/14/2007
Publication #:
US20090045445
Pub Dt:
02/19/2009
Title:
CAPACITOR STRUCTURE USED FOR FLASH MEMORY
30
Patent #:
7759171
Issue Dt:
07/20/2010
Application #:
11895901
Filing Dt:
08/28/2007
Publication #:
US20090057883
Pub Dt:
03/05/2009
Title:
METHOD AND STRUCTURE OF MINIMIZING MOLD BLEEDING ON A SUBSTRATE SURFACE OF A SEMICONDUCTOR PACKAGE
31
Patent #:
7696738
Issue Dt:
04/13/2010
Application #:
11898690
Filing Dt:
09/14/2007
Publication #:
US20080067989
Pub Dt:
03/20/2008
Title:
METHOD AND CIRCUIT FOR CONTROLLING DC-DC CONVERTER
32
Patent #:
7691751
Issue Dt:
04/06/2010
Application #:
11924823
Filing Dt:
10/26/2007
Publication #:
US20090111265
Pub Dt:
04/30/2009
Title:
SELECTIVE SILICIDE FORMATION USING RESIST ETCHBACK
33
Patent #:
7733074
Issue Dt:
06/08/2010
Application #:
11936933
Filing Dt:
11/08/2007
Publication #:
US20080111530
Pub Dt:
05/15/2008
Title:
CONTROL CIRCUIT OF CURRENT MODE DC-DC CONVERTER AND CONTROL METHOD OF CURRENT MODE DC-DC CONVERTER
34
Patent #:
7679972
Issue Dt:
03/16/2010
Application #:
11942526
Filing Dt:
11/19/2007
Publication #:
US20090129172
Pub Dt:
05/21/2009
Title:
HIGH RELIABLE AND LOW POWER STATIC RANDOM ACCESS MEMORY
35
Patent #:
7746705
Issue Dt:
06/29/2010
Application #:
11953689
Filing Dt:
12/10/2007
Publication #:
US20090147589
Pub Dt:
06/11/2009
Title:
SELECTIVE APPLICATION OF WORD LINE BIAS TO MINIMIZE FRINGE EFFECTS IN ELECTROMAGNETIC FIELDS DURING ERASE OF NONVOLATILE MEMORY
36
Patent #:
7746698
Issue Dt:
06/29/2010
Application #:
11956032
Filing Dt:
12/13/2007
Publication #:
US20090154246
Pub Dt:
06/18/2009
Title:
PROGRAMMING IN MEMORY DEVICES USING SOURCE BITLINE VOLTAGE BIAS
37
Patent #:
7692962
Issue Dt:
04/06/2010
Application #:
11958557
Filing Dt:
12/18/2007
Publication #:
US20090154235
Pub Dt:
06/18/2009
Title:
REDUCED STATE QUADBIT
38
Patent #:
7683598
Issue Dt:
03/23/2010
Application #:
11976507
Filing Dt:
10/25/2007
Publication #:
US20080100274
Pub Dt:
05/01/2008
Title:
POWER SUPPLY CIRCUIT, POWER SUPPLY CONTROL CIRCUIT, AND POWER SUPPLY CONTROL METHOD
39
Patent #:
7706168
Issue Dt:
04/27/2010
Application #:
11980116
Filing Dt:
10/30/2007
Publication #:
US20090109727
Pub Dt:
04/30/2009
Title:
ERASE, PROGRAMMING AND LEAKAGE CHARACTERISTICS OF A RESISTIVE MEMORY DEVICE
40
Patent #:
7724563
Issue Dt:
05/25/2010
Application #:
11983864
Filing Dt:
11/13/2007
Publication #:
US20080298115
Pub Dt:
12/04/2008
Title:
MEMORY CELL ARRAY WITH LOW RESISTANCE COMMON SOURCE AND HIGH CURRENT DRIVABILITY
41
Patent #:
7760558
Issue Dt:
07/20/2010
Application #:
12014454
Filing Dt:
01/15/2008
Publication #:
US20090180345
Pub Dt:
07/16/2009
Title:
VOLTAGE BOOSTER BY ISOLATION AND DELAYED SEQUENTIAL DISCHARGE
42
Patent #:
7705390
Issue Dt:
04/27/2010
Application #:
12054081
Filing Dt:
03/24/2008
Publication #:
US20080169502
Pub Dt:
07/17/2008
Title:
DUAL BIT FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
43
Patent #:
7714557
Issue Dt:
05/11/2010
Application #:
12057001
Filing Dt:
03/27/2008
Publication #:
US20080238395
Pub Dt:
10/02/2008
Title:
DC-DC CONVERTER, POWER SUPPLY SYSTEM, AND POWER SUPPLY METHOD
44
Patent #:
7729169
Issue Dt:
06/01/2010
Application #:
12126686
Filing Dt:
05/23/2008
Publication #:
US20090129147
Pub Dt:
05/21/2009
Title:
MULTIPLE PROGRAMMING OF SPARE MEMORY REGION FOR NONVOLATILE MEMORY
45
Patent #:
7679968
Issue Dt:
03/16/2010
Application #:
12129530
Filing Dt:
05/29/2008
Publication #:
US20080298136
Pub Dt:
12/04/2008
Title:
ENHANCED ERASING OPERATION FOR NON-VOLATILE MEMORY
46
Patent #:
7682974
Issue Dt:
03/23/2010
Application #:
12130537
Filing Dt:
05/30/2008
Publication #:
US20090004838
Pub Dt:
01/01/2009
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
47
Patent #:
7696017
Issue Dt:
04/13/2010
Application #:
12141180
Filing Dt:
06/18/2008
Title:
MEMORY DEVICE WITH A SELECTION ELEMENT AND A CONTROL LINE IN A SUBSTANTIALLY SIMILAR LAYER
48
Patent #:
7729170
Issue Dt:
06/01/2010
Application #:
12283721
Filing Dt:
09/15/2008
Publication #:
US20090034335
Pub Dt:
02/05/2009
Title:
SEMICONDUCTOR DEVICE AND ITS CONTROL METHOD
49
Patent #:
7750481
Issue Dt:
07/06/2010
Application #:
12316042
Filing Dt:
12/09/2008
Publication #:
US20090091043
Pub Dt:
04/09/2009
Title:
DIE OFFSET DIE TO DIE BONDING
50
Patent #:
7764546
Issue Dt:
07/27/2010
Application #:
12405947
Filing Dt:
03/17/2009
Publication #:
US20090175088
Pub Dt:
07/09/2009
Title:
METHOD AND ARCHITECTURE FOR FAST FLASH MEMORY PROGRAMMING
Assignor
1
SPANSION, LLC
Exec Dt:
06/01/2015
Assignee
1
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CA 95134

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