Total properties:
115
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2
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2
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Patent #:
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Issue Dt:
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12/16/2003
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Application #:
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09905855
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Filing Dt:
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07/13/2001
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Publication #:
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Pub Dt:
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02/07/2002
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Title:
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METHOD AND CONFIGURATION FOR VERIFYING A LAYOUT OF AN INTEGRATED CIRCUIT AND APPLICATION THEREOF FOR FABRICATING THE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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09906338
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Filing Dt:
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07/16/2001
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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PROCESS FOR FABRICATION OF A SEMICONDUCTOR COMPONENT HAVING A TUNGSTEN OXIDE LAYER
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09917553
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Filing Dt:
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07/27/2001
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Publication #:
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Pub Dt:
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04/18/2002
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Title:
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INTEGRATED MEMORY AND CORRESPONDING OPERATING METHOD
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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09930409
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Filing Dt:
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08/15/2001
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Publication #:
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Pub Dt:
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06/06/2002
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Title:
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SEMICONDUCTOR STRUCTURE HAVING AN INTERCONNECT AND METHOD OF PRODUCING THE SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09935356
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Filing Dt:
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08/22/2001
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Publication #:
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Pub Dt:
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06/20/2002
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Title:
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METHOD FOR OPERATING A MEMORY CELL CONFIGURATION HAVING DYNAMIC GAIN MEMORY CELLS
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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09935624
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Filing Dt:
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08/23/2001
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Publication #:
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Pub Dt:
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03/28/2002
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Title:
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MINIATURIZED CAPACITOR WITH SOLID-STATE DIELECTRIC, IN PARTICULAR FOR INTEGRATED SEMICONDUCTOR MEMORIES, E.G. DRAMS, AND METHOD FOR FABRICATING SUCH A CAPACITOR
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Patent #:
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Issue Dt:
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10/07/2003
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Application #:
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09940011
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Filing Dt:
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08/27/2001
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Publication #:
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Pub Dt:
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04/11/2002
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Title:
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MAGNETORESISTIVE MEMORY CELL CONFIGURATION AND METHOD FOR ITS PRODUCTION
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Patent #:
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Issue Dt:
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08/12/2003
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Application #:
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09940087
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Filing Dt:
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08/27/2001
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Publication #:
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Pub Dt:
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02/21/2002
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Title:
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MEMORY CELL CONFIGURATION AND PRODUCTION METHOD
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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09951239
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Filing Dt:
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09/12/2001
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Publication #:
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Pub Dt:
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02/20/2003
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Title:
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INTEGRATED CIRCUIT CONFIGURATION AND METHOD OF FABRICATING A DRAM STRUCTURE WITH BURIED BIT LINES OR TRENCH CAPACITORS
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09951243
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Filing Dt:
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09/12/2001
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Publication #:
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Pub Dt:
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06/27/2002
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Title:
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DRAM CELL CONFIGURATION AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09953614
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Filing Dt:
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09/11/2001
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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METHOD FOR FABRICATING A TRENCH ISOLATION FOR ELECTRICALLY ACTIVE COMPONENTS
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09954414
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Filing Dt:
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09/17/2001
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Publication #:
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Pub Dt:
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04/11/2002
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Title:
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METHOD OF FILLING GAPS ON A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09956164
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Filing Dt:
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09/19/2001
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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MEMORY CELL CONFIGURATION AND METHOD FOR FABRICATING IT
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09962411
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Filing Dt:
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09/24/2001
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Publication #:
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Pub Dt:
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03/07/2002
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Title:
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INTEGRATED MEMORY HAVING MEMORY CELLS AND REFERENCE CELLS, AND OPERATING METHOD FOR SUCH A MEMORY
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09962694
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Filing Dt:
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09/24/2001
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Publication #:
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Pub Dt:
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01/17/2002
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Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR COMPONENT
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