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Patent Assignment Details
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Reel/Frame:036396/0646   Pages: 11
Recorded: 08/19/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 135
Page 2 of 2
Pages: 1 2
1
Patent #:
6521935
Issue Dt:
02/18/2003
Application #:
10027524
Filing Dt:
12/26/2001
Publication #:
US20020096699
Pub Dt:
07/25/2002
Title:
MOS TRANSISTOR AND DRAM CELL CONFIGURATION
2
Patent #:
6495415
Issue Dt:
12/17/2002
Application #:
10027532
Filing Dt:
12/26/2001
Publication #:
US20020086511
Pub Dt:
07/04/2002
Title:
METHOD FOR FABRICATING A PATTERNED LAYER
3
Patent #:
6661718
Issue Dt:
12/09/2003
Application #:
10035866
Filing Dt:
12/31/2001
Publication #:
US20020149975
Pub Dt:
10/17/2002
Title:
TESTING DEVICE FOR TESTING A MEMORY
4
Patent #:
6538895
Issue Dt:
03/25/2003
Application #:
10047815
Filing Dt:
01/15/2002
Publication #:
US20030012002
Pub Dt:
01/16/2003
Title:
TSOP MEMORY CHIP HOUSING CONFIGURATION
5
Patent #:
6716643
Issue Dt:
04/06/2004
Application #:
10048192
Filing Dt:
06/03/2002
Title:
METHOD FOR PRODUCING A SEMICONDUCTOR MEMORY ELEMENT
6
Patent #:
6614069
Issue Dt:
09/02/2003
Application #:
10054440
Filing Dt:
01/22/2002
Publication #:
US20020125525
Pub Dt:
09/12/2002
Title:
NONVOLATILE SEMICONDUCTOR MEMORY CELL AND METHOD FOR FABRICATING THE MEMORY CELL
7
Patent #:
6833731
Issue Dt:
12/21/2004
Application #:
10070025
Filing Dt:
05/14/2002
Title:
ELECTRONIC CIRCUIT FOR A METHOD FOR STORING INFORMATION, SAID CIRCUIT COMPRISING FEROELECTRIC FLIPFLOPS
8
Patent #:
6841481
Issue Dt:
01/11/2005
Application #:
10073550
Filing Dt:
02/11/2002
Publication #:
US20020146906
Pub Dt:
10/10/2002
Title:
ETCHING PROCESS FOR A TWO-LAYER METALLIZATION
9
Patent #:
6559067
Issue Dt:
05/06/2003
Application #:
10073554
Filing Dt:
02/11/2002
Publication #:
US20020160618
Pub Dt:
10/31/2002
Title:
METHOD FOR PATTERNING AN ORGANIC ANTIREFLECTION LAYER
10
Patent #:
6669857
Issue Dt:
12/30/2003
Application #:
10073829
Filing Dt:
02/11/2002
Publication #:
US20020130105
Pub Dt:
09/19/2002
Title:
PROCESS FOR ETCHING BISMUTH-CONTAINING OXIDE FILMS
11
Patent #:
6627392
Issue Dt:
09/30/2003
Application #:
10073846
Filing Dt:
02/11/2002
Publication #:
US20020110753
Pub Dt:
08/15/2002
Title:
METHOD OF TRANSFERRING A PATTERN OF HIGH STRUCTURE DENSITY BY MULTIPLE EXPOSURE OF LESS DENSE PARTIAL PATTERNS
12
Patent #:
6750096
Issue Dt:
06/15/2004
Application #:
10078997
Filing Dt:
02/20/2002
Publication #:
US20020137308
Pub Dt:
09/26/2002
Title:
TRENCH WITH BURIED PLATE AND METHOD FOR ITS PRODUCTION
13
Patent #:
6737748
Issue Dt:
05/18/2004
Application #:
10082554
Filing Dt:
02/25/2002
Publication #:
US20020117759
Pub Dt:
08/29/2002
Title:
STACKED VIA WITH SPECIALLY DESIGNED LANDING PAD FOR INTEGRATED SEMICONDUCTOR STRUCTURES
14
Patent #:
6664167
Issue Dt:
12/16/2003
Application #:
10085940
Filing Dt:
02/28/2002
Publication #:
US20020137278
Pub Dt:
09/26/2002
Title:
MEMORY WITH TRENCH CAPACITOR AND SELECTION TRANSISTOR AND METHOD FOR FABRICATING IT
15
Patent #:
6624461
Issue Dt:
09/23/2003
Application #:
10089910
Filing Dt:
06/27/2002
Title:
MEMORY DEVICE
16
Patent #:
6548350
Issue Dt:
04/15/2003
Application #:
10093039
Filing Dt:
03/07/2002
Publication #:
US20020137280
Pub Dt:
09/26/2002
Title:
METHOD OF FABRICATING AN INTEGRATED CIRCUIT CONFIGURATION WITH AT LEAST ONE CAPACITOR
17
Patent #:
6563179
Issue Dt:
05/13/2003
Application #:
10095242
Filing Dt:
03/11/2002
Publication #:
US20020113255
Pub Dt:
08/22/2002
Title:
MOS TRANSISTOR AND METHOD FOR PRODUCING THE TRANSISTOR
18
Patent #:
6608341
Issue Dt:
08/19/2003
Application #:
10097490
Filing Dt:
03/14/2002
Publication #:
US20020125521
Pub Dt:
09/12/2002
Title:
TRENCH CAPACITOR WITH CAPACITOR ELECTRODES
19
Patent #:
6724076
Issue Dt:
04/20/2004
Application #:
10111294
Filing Dt:
06/26/2003
Title:
PACKAGE FOR A SEMICONDUCTOR CHIP
20
Patent #:
6646299
Issue Dt:
11/11/2003
Application #:
10126365
Filing Dt:
04/19/2002
Publication #:
US20020149043
Pub Dt:
10/17/2002
Title:
INTEGRATED CIRCUIT CONFIGURATION HAVING AT LEAST TWO CAPACITORS AND METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT CONFIGURATION
21
Patent #:
6563729
Issue Dt:
05/13/2003
Application #:
10127616
Filing Dt:
04/22/2002
Publication #:
US20020181270
Pub Dt:
12/05/2002
Title:
CONFIGURATION FOR EVALUATING A SIGNAL WHICH IS READ FROM A FERROELECTRIC STORAGE CAPACITOR
22
Patent #:
6686265
Issue Dt:
02/03/2004
Application #:
10127618
Filing Dt:
04/22/2002
Publication #:
US20020151162
Pub Dt:
10/17/2002
Title:
METHOD OF PRODUCING A CAPACITOR ELECTRODE WITH A BARRIER STRUCTURE
23
Patent #:
7180115
Issue Dt:
02/20/2007
Application #:
10130441
Filing Dt:
08/06/2002
Title:
DRAM CELL STRUCTURE WITH TUNNEL BARRIER
24
Patent #:
6594546
Issue Dt:
07/15/2003
Application #:
10134125
Filing Dt:
04/29/2002
Publication #:
US20020159879
Pub Dt:
10/31/2002
Title:
PLANT FOR PROCESSING WAFERS
25
Patent #:
6887358
Issue Dt:
05/03/2005
Application #:
10134149
Filing Dt:
04/29/2002
Publication #:
US20020144654
Pub Dt:
10/10/2002
Title:
INSTALLATION FOR PROCESSING WAFERS
26
Patent #:
7208827
Issue Dt:
04/24/2007
Application #:
10149892
Filing Dt:
10/01/2004
Publication #:
US20050040517
Pub Dt:
02/24/2005
Title:
CASING CONFIGURATION OF A SEMICODUCTOR COMPONENT
27
Patent #:
6829187
Issue Dt:
12/07/2004
Application #:
10151090
Filing Dt:
05/20/2002
Publication #:
US20020196682
Pub Dt:
12/26/2002
Title:
MEMORY DEVICE
28
Patent #:
6777303
Issue Dt:
08/17/2004
Application #:
10153045
Filing Dt:
05/22/2002
Publication #:
US20020182819
Pub Dt:
12/05/2002
Title:
METHOD FOR FABRICATING AN INSULATION COLLAR IN A TRENCH CAPACITOR
29
Patent #:
6635410
Issue Dt:
10/21/2003
Application #:
10156484
Filing Dt:
05/28/2002
Publication #:
US20020172892
Pub Dt:
11/21/2002
Title:
METALLIZING METHOD FOR DIELECTRICS
30
Patent #:
6660437
Issue Dt:
12/09/2003
Application #:
10158733
Filing Dt:
05/30/2002
Publication #:
US20030008218
Pub Dt:
01/09/2003
Title:
ALTERNATING PHASE MASK
31
Patent #:
6852640
Issue Dt:
02/08/2005
Application #:
10164549
Filing Dt:
06/07/2002
Publication #:
US20020173163
Pub Dt:
11/21/2002
Title:
METHOD FOR FABRICATING A HARD MASK
32
Patent #:
6703190
Issue Dt:
03/09/2004
Application #:
10164550
Filing Dt:
06/07/2002
Publication #:
US20030008240
Pub Dt:
01/09/2003
Title:
METHOD FOR PRODUCING RESIST STRUCTURES
33
Patent #:
6639825
Issue Dt:
10/28/2003
Application #:
10171668
Filing Dt:
06/14/2002
Publication #:
US20020167832
Pub Dt:
11/14/2002
Title:
DATA MEMORY
34
Patent #:
6535046
Issue Dt:
03/18/2003
Application #:
10187759
Filing Dt:
07/02/2002
Publication #:
US20020171469
Pub Dt:
11/21/2002
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT WITH AN INCREASED OPERATING VOLTAGE
35
Patent #:
7820482
Issue Dt:
10/26/2010
Application #:
11124515
Filing Dt:
05/06/2005
Publication #:
US20050208703
Pub Dt:
09/22/2005
Title:
METHOD OF PRODUCING AN ELECTRONIC COMPONENT WITH FLEXIBLE BONDING PADS
Assignor
1
INFINEON TECHNOLOGIES AG
Exec Dt:
07/08/2015
Assignee
1
POLARIS INNOVATIONS LIMITED
29 EARLSFORT TERRACE, DUBLIN 2
DUBLIN, IRELAND
Correspondence name and address
POLARIS INNOVATIONS LIMITED
303 TERRY FOX DRIVE, SUITE 300
OTTAWA, K2K 3J1 CANADA

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