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Reel/Frame:	036550/0001			Pages:	983
		Recorded:	09/03/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14793
Page 103 of 148
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Patent #:	8791009	Issue Dt:	07/29/2014	Application #:	13154905	Filing Dt:	06/07/2011
Publication #:	US20120315753	Pub Dt:	12/13/2012
Title:	METHOD OF FORMING A THROUGH-SILICON VIA UTILIZING A METAL CONTACT PAD IN A BACK-END-OF-LINE WIRING LEVEL TO FILL THE THROUGH-SILICON VIA

Patent #:	8298934	Issue Dt:	10/30/2012	Application #:	13155056	Filing Dt:	06/07/2011
Publication #:	US20110237067	Pub Dt:	09/29/2011
Title:	STRUCTURE AND METHOD OF CREATING ENTIRELY SELF-ALIGNED METALLIC CONTACTS

Patent #:	NONE	Issue Dt:		Application #:	13155730	Filing Dt:	06/08/2011
Publication #:	US20120313146	Pub Dt:	12/13/2012
Title:	TRANSISTOR AND METHOD OF FORMING THE TRANSISTOR SO AS TO HAVE REDUCED BASE RESISTANCE

Patent #:	8536032	Issue Dt:	09/17/2013	Application #:	13155878	Filing Dt:	06/08/2011
Publication #:	US20120313168	Pub Dt:	12/13/2012
Title:	FORMATION OF EMBEDDED STRESSOR THROUGH ION IMPLANTATION

Patent #:	8609238	Issue Dt:	12/17/2013	Application #:	13156669	Filing Dt:	06/09/2011
Publication #:	US20110256359	Pub Dt:	10/20/2011
Title:	METHOD AND MATERIAL FOR A THERMALLY CROSSLINKABLE RANDOM COPOLYMER

Patent #:	8162200	Issue Dt:	04/24/2012	Application #:	13156736	Filing Dt:	06/09/2011
Publication #:	US20110233262	Pub Dt:	09/29/2011
Title:	MICRO-FLUIDIC INJECTION MOLDED SOLDER (IMS)

Patent #:	8963657	Issue Dt:	02/24/2015	Application #:	13156935	Filing Dt:	06/09/2011
Publication #:	US20120313736	Pub Dt:	12/13/2012
Title:	ON-CHIP SLOW-WAVE THROUGH-SILICON VIA COPLANAR WAVEGUIDE STRUCTURES, METHOD OF MANUFACTURE AND DESIGN STRUCTURE

Patent #:	8637359	Issue Dt:	01/28/2014	Application #:	13157812	Filing Dt:	06/10/2011
Publication #:	US20120313170	Pub Dt:	12/13/2012
Title:	FIN-LAST REPLACEMENT METAL GATE FINFET

Patent #:	8402398	Issue Dt:	03/19/2013	Application #:	13157909	Filing Dt:	06/10/2011
Publication #:	US20120317523	Pub Dt:	12/13/2012
Title:	REDUCING THROUGH PROCESS DELAY VARIATION IN METAL WIRES

Patent #:	8633764	Issue Dt:	01/21/2014	Application #:	13157957	Filing Dt:	06/10/2011
Publication #:	US20120313703	Pub Dt:	12/13/2012
Title:	RESTORING OUTPUT COMMON-MODE OF AMPLIFIER VIA CAPACITIVE COUPLING

Patent #:	8774228	Issue Dt:	07/08/2014	Application #:	13157968	Filing Dt:	06/10/2011
Publication #:	US20120314721	Pub Dt:	12/13/2012
Title:	TIMING RECOVERY METHOD AND APPARATUS FOR AN INPUT/OUTPUT BUS WITH LINK REDUNDANCY

Patent #:	8640062	Issue Dt:	01/28/2014	Application #:	13157980	Filing Dt:	06/10/2011
Publication #:	US20120317529	Pub Dt:	12/13/2012
Title:	Rapid Estimation of Temperature Rise in Wires Due to Joule Heating

Patent #:	8552783	Issue Dt:	10/08/2013	Application #:	13158079	Filing Dt:	06/10/2011
Publication #:	US20120313683	Pub Dt:	12/13/2012
Title:	PROGRAMMABLE DELAY GENERATOR AND CASCADED INTERPOLATOR

Patent #:	8670782	Issue Dt:	03/11/2014	Application #:	13158348	Filing Dt:	06/10/2011
Publication #:	US20120315920	Pub Dt:	12/13/2012
Title:	SYSTEMS AND METHODS FOR ANALYZING SPATIOTEMPORALLY AMBIGUOUS EVENTS

Patent #:	8531001	Issue Dt:	09/10/2013	Application #:	13158419	Filing Dt:	06/12/2011
Publication #:	US20120313216	Pub Dt:	12/13/2012
Title:	COMPLEMENTARY BIPOLAR INVERTER

Patent #:	8526220	Issue Dt:	09/03/2013	Application #:	13158420	Filing Dt:	06/12/2011
Publication #:	US20120314485	Pub Dt:	12/13/2012
Title:	COMPLEMENTARY SOI LATERAL BIPOLAR FOR SRAM IN A LOW-VOLTAGE CMOS PLATFORM

Patent #:	8542517	Issue Dt:	09/24/2013	Application #:	13158510	Filing Dt:	06/13/2011
Publication #:	US20120314475	Pub Dt:	12/13/2012
Title:	LOW VOLTAGE PROGRAMMABLE MOSFET ANTIFUSE WITH BODY CONTACT FOR DIFFUSION HEATING

Patent #:	8365117	Issue Dt:	01/29/2013	Application #:	13158562	Filing Dt:	06/13/2011
Publication #:	US20120317530	Pub Dt:	12/13/2012
Title:	SOLUTIONS FOR ON-CHIP MODELING OF OPEN TERMINATION OF FRINGE CAPACITANCE

Patent #:	8227180	Issue Dt:	07/24/2012	Application #:	13158901	Filing Dt:	06/13/2011
Publication #:	US20110256486	Pub Dt:	10/20/2011
Title:	PHOTOLITHOGRAPHY FOCUS IMPROVEMENT BY REDUCTION OF AUTOFOCUS RADIATION TRANSMISSION INTO SUBSTRATE

Patent #:	8767531	Issue Dt:	07/01/2014	Application #:	13159580	Filing Dt:	06/14/2011
Publication #:	US20120151247	Pub Dt:	06/14/2012
Title:	DYNAMIC FAULT DETECTION AND REPAIR IN A DATA COMMUNICATIONS MECHANISM

Patent #:	8344351	Issue Dt:	01/01/2013	Application #:	13159594	Filing Dt:	06/14/2011
Publication #:	US20110240944	Pub Dt:	10/06/2011
Title:	PHASE CHANGE MEMORY DEVICE WITH PLATED PHASE CHANGE MATERIAL

Patent #:	8841203	Issue Dt:	09/23/2014	Application #:	13159877	Filing Dt:	06/14/2011
Publication #:	US20120322230	Pub Dt:	12/20/2012
Title:	METHOD FOR FORMING TWO DEVICE WAFERS FROM A SINGLE BASE SUBSTRATE UTILIZING A CONTROLLED SPALLING PROCESS

Patent #:	8709914	Issue Dt:	04/29/2014	Application #:	13159893	Filing Dt:	06/14/2011
Publication #:	US20120322227	Pub Dt:	12/20/2012
Title:	METHOD FOR CONTROLLED LAYER TRANSFER

Patent #:	8927318	Issue Dt:	01/06/2015	Application #:	13160067	Filing Dt:	06/14/2011
Publication #:	US20120318334	Pub Dt:	12/20/2012
Title:	SPALLING METHODS TO FORM MULTI-JUNCTION PHOTOVOLTAIC STRUCTURE

Patent #:	8660878	Issue Dt:	02/25/2014	Application #:	13160734	Filing Dt:	06/15/2011
Publication #:	US20120323624	Pub Dt:	12/20/2012
Title:	MODEL-DRIVEN ASSIGNMENT OF WORK TO A SOFTWARE FACTORY

Patent #:	8551833	Issue Dt:	10/08/2013	Application #:	13161013	Filing Dt:	06/15/2011
Publication #:	US20120319178	Pub Dt:	12/20/2012
Title:	DOUBLE GATE PLANAR FIELD EFFECT TRANSISTORS

Patent #:	8628996	Issue Dt:	01/14/2014	Application #:	13161163	Filing Dt:	06/15/2011
Publication #:	US20120318342	Pub Dt:	12/20/2012
Title:	UNIFORMLY DISTRIBUTED SELF-ASSEMBLED CONE-SHAPED PILLARS FOR HIGH EFFICIENCY SOLAR CELLS

Patent #:	9040392	Issue Dt:	05/26/2015	Application #:	13161260	Filing Dt:	06/15/2011
Publication #:	US20120322244	Pub Dt:	12/20/2012
Title:	METHOD FOR CONTROLLED REMOVAL OF A SEMICONDUCTOR DEVICE LAYER FROM A BASE SUBSTRATE

Patent #:	8445316	Issue Dt:	05/21/2013	Application #:	13162712	Filing Dt:	06/17/2011
Publication #:	US20120322200	Pub Dt:	12/20/2012
Title:	NON-LITHOGRAPHIC METHOD OF PATTERNING CONTACTS FOR A PHOTOVOLTAIC DEVICE

Patent #:	8418108	Issue Dt:	04/09/2013	Application #:	13162806	Filing Dt:	06/17/2011
Publication #:	US20120324409	Pub Dt:	12/20/2012
Title:	ACCURACY PIN-SLEW MODE FOR GATE DELAY CALCULATION

Patent #:	8595676	Issue Dt:	11/26/2013	Application #:	13163700	Filing Dt:	06/19/2011
Publication #:	US20120324414	Pub Dt:	12/20/2012
Title:	BDD-BASED FUNCTIONAL MODELING

Patent #:	NONE	Issue Dt:		Application #:	13163922	Filing Dt:	06/20/2011
Publication #:	US20120319237	Pub Dt:	12/20/2012
Title:	CORNER-ROUNDED STRUCTURES AND METHODS OF MANUFACTURE

Patent #:	8470628	Issue Dt:	06/25/2013	Application #:	13164126	Filing Dt:	06/20/2011
Publication #:	US20120318649	Pub Dt:	12/20/2012
Title:	Methods to Fabricate Silicide Micromechanical Device

Patent #:	8421126	Issue Dt:	04/16/2013	Application #:	13164173	Filing Dt:	06/20/2011
Publication #:	US20110241082	Pub Dt:	10/06/2011
Title:	DOUBLE-SIDED INTEGRATED CIRCUIT CHIPS

Patent #:	8492290	Issue Dt:	07/23/2013	Application #:	13164891	Filing Dt:	06/21/2011
Publication #:	US20120329230	Pub Dt:	12/27/2012
Title:	FABRICATION OF SILICON OXIDE AND OXYNITRIDE HAVING SUB-NANOMETER THICKNESS

Patent #:	8420531	Issue Dt:	04/16/2013	Application #:	13164929	Filing Dt:	06/21/2011
Publication #:	US20120326311	Pub Dt:	12/27/2012
Title:	ENHANCED DIFFUSION BARRIER FOR INTERCONNECT STRUCTURES

Patent #:	8547154	Issue Dt:	10/01/2013	Application #:	13166126	Filing Dt:	06/22/2011
Publication #:	US20120326760	Pub Dt:	12/27/2012
Title:	PROGRAMMABLE DUTY CYCLE SELECTION USING INCREMENTAL PULSE WIDTHS

Patent #:	NONE	Issue Dt:		Application #:	13166714	Filing Dt:	06/22/2011
Publication #:	US20120326230	Pub Dt:	12/27/2012
Title:	SILICON ON INSULATOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR WITH AN ISOLATION FORMED AT LOW TEMPERATURE

Patent #:	8665575	Issue Dt:	03/04/2014	Application #:	13166842	Filing Dt:	06/23/2011
Publication #:	US20110317324	Pub Dt:	12/29/2011
Title:	SOLAR MODULE WITH OVERHEAT PROTECTION

Patent #:	8916919	Issue Dt:	12/23/2014	Application #:	13167076	Filing Dt:	06/23/2011
Publication #:	US20120326270	Pub Dt:	12/27/2012
Title:	INTERDIGITATED VERTICAL NATIVE CAPACITOR

Patent #:	8487425	Issue Dt:	07/16/2013	Application #:	13167107	Filing Dt:	06/23/2011
Publication #:	US20120326309	Pub Dt:	12/27/2012
Title:	OPTIMIZED ANNULAR COPPER TSV

Patent #:	8735283	Issue Dt:	05/27/2014	Application #:	13167176	Filing Dt:	06/23/2011
Publication #:	US20120329272	Pub Dt:	12/27/2012
Title:	METHOD FOR FORMING SMALL DIMENSION OPENINGS IN THE ORGANIC MASKING LAYER OF TRI-LAYER LITHOGRAPHY

Patent #:	8232151	Issue Dt:	07/31/2012	Application #:	13167303	Filing Dt:	06/23/2011
Publication #:	US20110254059	Pub Dt:	10/20/2011
Title:	STRUCTURE AND METHOD FOR MANUFACTURING ASYMMETRIC DEVICES

Patent #:	8407656	Issue Dt:	03/26/2013	Application #:	13167826	Filing Dt:	06/24/2011
Publication #:	US20120326752	Pub Dt:	12/27/2012
Title:	DESIGN METHOD AND STRUCTURE FOR A TRANSISTOR HAVING A RELATIVELY LARGE THRESHOLD VOLTAGE VARIATION RANGE AND FOR A RANDOM NUMBER GENERATOR INCORPORATING MULTIPLE ESSENTIALLY IDENTICAL TRANSISTORS HAVING SUCH A LARGE THRESHOLD VOLTAGE VARIATION RANGE

Patent #:	8620632	Issue Dt:	12/31/2013	Application #:	13168116	Filing Dt:	06/24/2011
Publication #:	US20120330626	Pub Dt:	12/27/2012
Title:	ESTIMATING BUILDING THERMAL PROPERTIES BY INTEGRATING HEAT TRANSFER INVERSION MODEL WITH CLUSTERING AND REGRESSION TECHNIQUES FOR A PORTFOLIO OF EXISTING BUILDINGS

Patent #:	8586423	Issue Dt:	11/19/2013	Application #:	13168232	Filing Dt:	06/24/2011
Publication #:	US20120326766	Pub Dt:	12/27/2012
Title:	SILICON CONTROLLED RECTIFIER WITH STRESS-ENHANCED ADJUSTABLE TRIGGER VOLTAGE

Patent #:	8860191	Issue Dt:	10/14/2014	Application #:	13168512	Filing Dt:	06/24/2011
Publication #:	US20120326798	Pub Dt:	12/27/2012
Title:	ON-CHIP TRANSMISSION LINE STRUCTURES WITH BALANCED PHASE DELAY

Patent #:	8324102	Issue Dt:	12/04/2012	Application #:	13169248	Filing Dt:	06/27/2011
Publication #:	US20110256720	Pub Dt:	10/20/2011
Title:	TECHNIQUES FOR IMPEDING REVERSE ENGINEERING

Patent #:	8891328	Issue Dt:	11/18/2014	Application #:	13169485	Filing Dt:	06/27/2011
Publication #:	US20120327700	Pub Dt:	12/27/2012
Title:	LOW VOLTAGE METAL GATE ANTIFUSE WITH DEPLETION MODE MOSFET

Patent #:	8492748	Issue Dt:	07/23/2013	Application #:	13169542	Filing Dt:	06/27/2011
Publication #:	US20120326127	Pub Dt:	12/27/2012
Title:	COLLAPSABLE GATE FOR DEPOSITED NANOSTRUCTURES

Patent #:	8603584	Issue Dt:	12/10/2013	Application #:	13170221	Filing Dt:	06/28/2011
Publication #:	US20110256713	Pub Dt:	10/20/2011
Title:	POLYHEDRAL OLIGOMERIC SILSESQUIOXANE BASED IMPRINT MATERIALS AND IMPRINT PROCESS USING POLYHEDRAL OLIGOMERIC SILSESQUIOXANE BASED IMPRINT MATERIALS

Patent #:	8455162	Issue Dt:	06/04/2013	Application #:	13170316	Filing Dt:	06/28/2011
Publication #:	US20130001193	Pub Dt:	01/03/2013
Title:	ALIGNMENT MARKS FOR MULTI-EXPOSURE LITHOGRAPHY

Patent #:	8432002	Issue Dt:	04/30/2013	Application #:	13170565	Filing Dt:	06/28/2011
Publication #:	US20130001706	Pub Dt:	01/03/2013
Title:	METHOD AND STRUCTURE FOR LOW RESISTIVE SOURCE AND DRAIN REGIONS IN A REPLACEMENT METAL GATE PROCESS FLOW

Patent #:	8450212	Issue Dt:	05/28/2013	Application #:	13170621	Filing Dt:	06/28/2011
Publication #:	US20130005147	Pub Dt:	01/03/2013
Title:	METHOD OF REDUCING CRITICAL DIMENSION PROCESS BIAS DIFFERENCES BETWEEN NARROW AND WIDE DAMASCENE WIRES

Patent #:	8448108	Issue Dt:	05/21/2013	Application #:	13170864	Filing Dt:	06/28/2011
Publication #:	US20130007682	Pub Dt:	01/03/2013
Title:	MATCHING SYSTEMS WITH POWER AND THERMAL DOMAINS

Patent #:	8631371	Issue Dt:	01/14/2014	Application #:	13171528	Filing Dt:	06/29/2011
Publication #:	US20130007686	Pub Dt:	01/03/2013
Title:	METHOD, SYSTEM AND PROGRAM STORAGE DEVICE FOR MODELING THE CAPACITANCE ASSOCIATED WITH A DIFFUSION REGION OF A SILICON-ON-INSULATOR DEVICE

Patent #:	8359556	Issue Dt:	01/22/2013	Application #:	13171530	Filing Dt:	06/29/2011
Publication #:	US20130007674	Pub Dt:	01/03/2013
Title:	RESOLVING DOUBLE PATTERNING CONFLICTS

Patent #:	8580692	Issue Dt:	11/12/2013	Application #:	13171865	Filing Dt:	06/29/2011
Publication #:	US20130001749	Pub Dt:	01/03/2013
Title:	FILM STACK INCLUDING METAL HARDMASK LAYER FOR SIDEWALL IMAGE TRANSFER FIN FIELD EFFECT TRANSISTOR FORMATION

Patent #:	8586482	Issue Dt:	11/19/2013	Application #:	13171868	Filing Dt:	06/29/2011
Publication #:	US20130001750	Pub Dt:	01/03/2013
Title:	FILM STACK INCLUDING METAL HARDMASK LAYER FOR SIDEWALL IMAGE TRANSFER FIN FIELD EFFECT TRANSISTOR FORMATION

Patent #:	8748296	Issue Dt:	06/10/2014	Application #:	13172793	Filing Dt:	06/29/2011
Publication #:	US20130005116	Pub Dt:	01/03/2013
Title:	EDGE-EXCLUSION SPALLING METHOD FOR IMPROVING SUBSTRATE REUSABILITY

Patent #:	8599966	Issue Dt:	12/03/2013	Application #:	13173434	Filing Dt:	06/30/2011
Publication #:	US20130002347	Pub Dt:	01/03/2013
Title:	COUPLING SYSTEM FOR DATA RECEIVERS

Patent #:	NONE	Issue Dt:		Application #:	13173680	Filing Dt:	06/30/2011
Publication #:	US20130001657	Pub Dt:	01/03/2013
Title:	SELF-ALIGNED III-V MOSFET DIFFUSION REGIONS AND SILICIDE-LIKE ALLOY CONTACT

Patent #:	8456006	Issue Dt:	06/04/2013	Application #:	13174841	Filing Dt:	07/01/2011
Publication #:	US20110260323	Pub Dt:	10/27/2011
Title:	HYBRID INTERCONNECT STRUCTURE FOR PERFORMANCE IMPROVEMENT AND RELIABILITY ENHANCEMENT

Patent #:	8539403	Issue Dt:	09/17/2013	Application #:	13175854	Filing Dt:	07/03/2011
Publication #:	US20130007683	Pub Dt:	01/03/2013
Title:	REDUCING OBSERVABILITY OF MEMORY ELEMENTS IN CIRCUITS

Patent #:	8697522	Issue Dt:	04/15/2014	Application #:	13176456	Filing Dt:	07/05/2011
Publication #:	US20130009246	Pub Dt:	01/10/2013
Title:	BULK FINFET WITH UNIFORM HEIGHT AND BOTTOM ISOLATION

Patent #:	NONE	Issue Dt:		Application #:	13176880	Filing Dt:	07/06/2011
Publication #:	US20130009668	Pub Dt:	01/10/2013
Title:	4-TERMINAL PIEZOELECTRONIC TRANSISTOR (PET)

Patent #:	8536012	Issue Dt:	09/17/2013	Application #:	13177146	Filing Dt:	07/06/2011
Publication #:	US20130009280	Pub Dt:	01/10/2013
Title:	BIPOLAR JUNCTION TRANSISTORS WITH A LINK REGION CONNECTING THE INTRINSIC AND EXTRINSIC BASES

Patent #:	8541823	Issue Dt:	09/24/2013	Application #:	13179635	Filing Dt:	07/11/2011
Publication #:	US20110266621	Pub Dt:	11/03/2011
Title:	FIELD EFFECT TRANSISTOR

Patent #:	8624104	Issue Dt:	01/07/2014	Application #:	13179731	Filing Dt:	07/11/2011
Publication #:	US20130014811	Pub Dt:	01/17/2013
Title:	HETEROJUNCTION III-V SOLAR CELL PERFORMANCE

Patent #:	8525168	Issue Dt:	09/03/2013	Application #:	13179868	Filing Dt:	07/11/2011
Publication #:	US20130015440	Pub Dt:	01/17/2013
Title:	INTEGRATED CIRCUIT (IC) TEST PROBE

Patent #:	9087741	Issue Dt:	07/21/2015	Application #:	13179990	Filing Dt:	07/11/2011
Publication #:	US20130015525	Pub Dt:	01/17/2013
Title:	CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS

Patent #:	8927430	Issue Dt:	01/06/2015	Application #:	13180710	Filing Dt:	07/12/2011
Publication #:	US20130017682	Pub Dt:	01/17/2013
Title:	OVERBURDEN REMOVAL FOR PORE FILL INTEGRATION APPROACH

Patent #:	8541301	Issue Dt:	09/24/2013	Application #:	13180734	Filing Dt:	07/12/2011
Publication #:	US20130017688	Pub Dt:	01/17/2013
Title:	REDUCTION OF PORE FILL MATERIAL DEWETTING

Patent #:	8642424	Issue Dt:	02/04/2014	Application #:	13180842	Filing Dt:	07/12/2011
Publication #:	US20130015580	Pub Dt:	01/17/2013
Title:	REPLACEMENT METAL GATE STRUCTURE AND METHODS OF MANUFACTURE

Patent #:	8416009	Issue Dt:	04/09/2013	Application #:	13181754	Filing Dt:	07/13/2011
Publication #:	US20130015911	Pub Dt:	01/17/2013
Title:	SOLUTIONS FOR CONTROLLING BULK BIAS VOLTAGE IN AN EXTREMELY THIN SILICON-ON-INSULATOR (ETSOI) INTEGRATED CIRCUIT CHIP

Patent #:	8629007	Issue Dt:	01/14/2014	Application #:	13182544	Filing Dt:	07/14/2011
Publication #:	US20130017680	Pub Dt:	01/17/2013
Title:	METHOD OF IMPROVING REPLACEMENT METAL GATE FILL

Patent #:	8719735	Issue Dt:	05/06/2014	Application #:	13183070	Filing Dt:	07/14/2011
Publication #:	US20130019211	Pub Dt:	01/17/2013
Title:	OPTIMIZING LITHOGRAPHIC MASK FOR MANUFACTURABILITY IN EFFICIENT MANNER

Patent #:	NONE	Issue Dt:		Application #:	13183899	Filing Dt:	07/15/2011
Publication #:	US20130016895	Pub Dt:	01/17/2013
Title:	METHOD AND SYSTEM FOR DEFECT-BITMAP-FAIL PATTERNS MATCHING ANALYSIS INCLUDING PERIPHERAL DEFECTS

Patent #:	8723392	Issue Dt:	05/13/2014	Application #:	13183977	Filing Dt:	07/15/2011
Publication #:	US20130015744	Pub Dt:	01/17/2013
Title:	SAW FILTER HAVING PLANAR BARRIER LAYER AND METHOD OF MAKING

Patent #:	8232165	Issue Dt:	07/31/2012	Application #:	13184004	Filing Dt:	07/15/2011
Publication #:	US20110275198	Pub Dt:	11/10/2011
Title:	FILM WRAPPED NFET NANOWIRE

Patent #:	8742508	Issue Dt:	06/03/2014	Application #:	13184537	Filing Dt:	07/16/2011
Publication #:	US20130015534	Pub Dt:	01/17/2013
Title:	THREE DIMENSIONAL FET DEVICES HAVING DIFFERENT DEVICE WIDTHS

Patent #:	8429590	Issue Dt:	04/23/2013	Application #:	13184909	Filing Dt:	07/18/2011
Publication #:	US20130024831	Pub Dt:	01/24/2013
Title:	SYSTEM-LEVEL METHOD FOR REDUCING POWER SUPPLY NOISE IN AN ELECTRONIC SYSTEM

Patent #:	8383501	Issue Dt:	02/26/2013	Application #:	13185055	Filing Dt:	07/18/2011
Publication #:	US20110275209	Pub Dt:	11/10/2011
Title:	VERTICAL FIELD EFFECT TRANSISTOR ARRAYS AND METHODS FOR FABRICATION THEREOF

Patent #:	8492275	Issue Dt:	07/23/2013	Application #:	13186519	Filing Dt:	07/20/2011
Publication #:	US20130020705	Pub Dt:	01/24/2013
Title:	METHOD TO FORM UNIFORM SILICIDE BY SELECTIVE IMPLANTATION

Patent #:	8272120	Issue Dt:	09/25/2012	Application #:	13186815	Filing Dt:	07/20/2011
Publication #:	US20110272450	Pub Dt:	11/10/2011
Title:	APPARATUS FOR APPLYING SOLDER TO SEMICONDUCTOR CHIPS USING DECALS WITH APERATURES PRESENT THEREIN

Patent #:	8261226	Issue Dt:	09/04/2012	Application #:	13187196	Filing Dt:	07/20/2011
Title:	NETWORK FLOW BASED MODULE BOTTOM SURFACE METAL PIN ASSIGNMENT

Patent #:	8492171	Issue Dt:	07/23/2013	Application #:	13187562	Filing Dt:	07/21/2011
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Title:	TECHNIQUES AND STRUCTURES FOR TESTING INTEGRATED CIRCUITS IN FLIP-CHIP ASSEMBLIES

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Publication #:	US20130020645	Pub Dt:	01/24/2013
Title:	ESD FIELD-EFFECT TRANSISTOR AND INTEGRATED DIFFUSION RESISTOR

Patent #:	8418120	Issue Dt:	04/09/2013	Application #:	13188129	Filing Dt:	07/21/2011
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Title:	SOLUTIONS FOR NETLIST REDUCTION FOR MULTI-FINGER DEVICES

Patent #:	8637908	Issue Dt:	01/28/2014	Application #:	13188789	Filing Dt:	07/22/2011
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Title:	BORDERLESS CONTACTS IN SEMICONDUCTOR DEVICES

Patent #:	8299570	Issue Dt:	10/30/2012	Application #:	13189016	Filing Dt:	07/22/2011
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Title:	EFUSE CONTAINING SIGE STACK

Patent #:	8593815	Issue Dt:	11/26/2013	Application #:	13189515	Filing Dt:	07/24/2011
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Title:	TECHNIQUES FOR DATA CENTER COOLING

Patent #:	8614111	Issue Dt:	12/24/2013	Application #:	13189848	Filing Dt:	07/25/2011
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Title:	FULLY DEPLETED SILICON ON INSULATOR NEUTRON DETECTOR

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Publication #:	US20130026587	Pub Dt:	01/31/2013
Title:	PIXEL SENSOR CELLS AND METHODS OF MANUFACTURING

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Title:	SYSTEMS AND METHODS FOR CORRELATED PARAMETERS IN STATISTICAL STATIC TIMING ANALYSIS

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Title:	Self-Segregating Multilayer Imaging Stack With Built-In Antireflective Properties

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Publication #:	US20110300483	Pub Dt:	12/08/2011
Title:	Self-Segregating Multilayer Imaging Stack With Built-In Antireflective Properties

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Patent #:	8383490	Issue Dt:	02/26/2013	Application #:	13191540	Filing Dt:	07/27/2011
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Title:	BORDERLESS CONTACT FOR ULTRA-THIN BODY DEVICES

100

Patent #:	8327312	Issue Dt:	12/04/2012	Application #:	13191750	Filing Dt:	07/27/2011
Publication #:	US20120030643	Pub Dt:	02/02/2012
Title:	ASSESSING PRINTABILITY OF A VERY-LARGE-SCALE INTEGRATION DESIGN

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

06/29/2015

Assignee

GLOBALFOUNDRIES U.S. 2 LLC

2070 ROUTE 52

HOPEWELL JUNCTION, NEW YORK 12533

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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