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Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 111 of 148
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148
1
Patent #:
NONE
Issue Dt:
Application #:
13431108
Filing Dt:
03/27/2012
Publication #:
US20130262792
Pub Dt:
10/03/2013
Title:
MEMORY DEVICE SUPPORT OF DYNAMICALLY CHANGING FREQUENCY IN MEMORY SYSTEMS
2
Patent #:
8492265
Issue Dt:
07/23/2013
Application #:
13431254
Filing Dt:
03/27/2012
Publication #:
US20120190187
Pub Dt:
07/26/2012
Title:
PAD BONDING EMPLOYING A SELF-ALIGNED PLATED LINER FOR ADHESION ENHANCEMENT
3
Patent #:
8575655
Issue Dt:
11/05/2013
Application #:
13431328
Filing Dt:
03/27/2012
Publication #:
US20120181631
Pub Dt:
07/19/2012
Title:
METHOD AND STRUCTURE FOR PMOS DEVICES WITH HIGH K METAL GATE INTEGRATION AND SIGE CHANNEL ENGINEERING
4
Patent #:
8956973
Issue Dt:
02/17/2015
Application #:
13431343
Filing Dt:
03/27/2012
Publication #:
US20130260556
Pub Dt:
10/03/2013
Title:
BOTTOM-UP PLATING OF THROUGH-SUBSTRATE VIAS
5
Patent #:
8756541
Issue Dt:
06/17/2014
Application #:
13431368
Filing Dt:
03/27/2012
Publication #:
US20130263068
Pub Dt:
10/03/2013
Title:
RELATIVE ORDERING CIRCUIT SYNTHESIS
6
Patent #:
8916426
Issue Dt:
12/23/2014
Application #:
13431414
Filing Dt:
03/27/2012
Publication #:
US20130256748
Pub Dt:
10/03/2013
Title:
PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES
7
Patent #:
8692291
Issue Dt:
04/08/2014
Application #:
13431456
Filing Dt:
03/27/2012
Publication #:
US20130256749
Pub Dt:
10/03/2013
Title:
PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES
8
Patent #:
8836281
Issue Dt:
09/16/2014
Application #:
13431539
Filing Dt:
03/27/2012
Publication #:
US20120191524
Pub Dt:
07/26/2012
Title:
ELECTRIC VEHICLE CHARGING TRANSACTION INTERFACE FOR MANAGING ELECTRIC VEHICLE CHARGING TRANSACTIONS
9
Patent #:
8373486
Issue Dt:
02/12/2013
Application #:
13431599
Filing Dt:
03/27/2012
Publication #:
US20120187987
Pub Dt:
07/26/2012
Title:
STRUCTURE FOR A FREQUENCY ADAPTIVE LEVEL SHIFTER CIRCUIT
10
Patent #:
8877615
Issue Dt:
11/04/2014
Application #:
13431770
Filing Dt:
03/27/2012
Publication #:
US20120190179
Pub Dt:
07/26/2012
Title:
METHODS OF MANUFACTURING FINFET DEVICES
11
Patent #:
NONE
Issue Dt:
Application #:
13432018
Filing Dt:
03/28/2012
Publication #:
US20120181578
Pub Dt:
07/19/2012
Title:
PRE-GATE, SOURCE/DRAIN STRAIN LAYER FORMATION
12
Patent #:
8754400
Issue Dt:
06/17/2014
Application #:
13432036
Filing Dt:
03/28/2012
Publication #:
US20120183743
Pub Dt:
07/19/2012
Title:
TWO-DIMENSIONAL PATTERNING EMPLOYING SELF-ASSEMBLED MATERIAL
13
Patent #:
8539425
Issue Dt:
09/17/2013
Application #:
13432349
Filing Dt:
03/28/2012
Publication #:
US20130263075
Pub Dt:
10/03/2013
Title:
UTILIZING GATE PHASES FOR CIRCUIT TUNING
14
Patent #:
NONE
Issue Dt:
Application #:
13432353
Filing Dt:
03/28/2012
Publication #:
US20130260183
Pub Dt:
10/03/2013
Title:
THREE DIMENSIONAL SOLID-STATE BATTERY INTEGRATED WITH CMOS DEVICES
15
Patent #:
8502325
Issue Dt:
08/06/2013
Application #:
13432395
Filing Dt:
03/28/2012
Publication #:
US20120187506
Pub Dt:
07/26/2012
Title:
METAL HIGH-K TRANSISTOR HAVING SILICON SIDEWALLS FOR REDUCED PARASITIC CAPACITANCE
16
Patent #:
9264150
Issue Dt:
02/16/2016
Application #:
13432414
Filing Dt:
03/28/2012
Publication #:
US20130259488
Pub Dt:
10/03/2013
Title:
REACTIVE METAL OPTICAL SECURITY DEVICE AND METHODS OF FABRICATION AND USE
17
Patent #:
8753950
Issue Dt:
06/17/2014
Application #:
13432421
Filing Dt:
03/28/2012
Publication #:
US20120190164
Pub Dt:
07/26/2012
Title:
DUAL-DAMASCENE PROCESS TO FABRICATE THICK WIRE STRUCTURE
18
Patent #:
8435864
Issue Dt:
05/07/2013
Application #:
13432440
Filing Dt:
03/28/2012
Publication #:
US20120184081
Pub Dt:
07/19/2012
Title:
PROCESS FOR SINGLE AND MULTIPLE LEVEL METAL-INSULATOR-METAL INTEGRATION WITH A SINGLE MASK
19
Patent #:
8492848
Issue Dt:
07/23/2013
Application #:
13432716
Filing Dt:
03/28/2012
Publication #:
US20120187502
Pub Dt:
07/26/2012
Title:
APPLICATION OF CLUSTER BEAM IMPLANTATION FOR FABRICATING THRESHOLD VOLTAGE ADJUSTED FETS
20
Patent #:
9105573
Issue Dt:
08/11/2015
Application #:
13432772
Filing Dt:
03/28/2012
Publication #:
US20130257624
Pub Dt:
10/03/2013
Title:
VISUALLY DETECTING ELECTROSTATIC DISCHARGE EVENTS
21
Patent #:
8802497
Issue Dt:
08/12/2014
Application #:
13432963
Filing Dt:
03/28/2012
Publication #:
US20120187561
Pub Dt:
07/26/2012
Title:
FORMING SEMICONDUCTOR CHIP CONNECTIONS
22
Patent #:
8800952
Issue Dt:
08/12/2014
Application #:
13432966
Filing Dt:
03/28/2012
Publication #:
US20120186771
Pub Dt:
07/26/2012
Title:
REMOVING MATERIAL FROM DEFECTIVE OPENING IN GLASS MOLD AND RELATED GLASS MOLD FOR INJECTION MOLDED SOLDER
23
Patent #:
8629504
Issue Dt:
01/14/2014
Application #:
13433401
Filing Dt:
03/29/2012
Publication #:
US20120187493
Pub Dt:
07/26/2012
Title:
EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) INTEGRATED CIRCUIT WITH ON-CHIP RESISTORS AND METHOD OF FORMING THE SAME
24
Patent #:
8629009
Issue Dt:
01/14/2014
Application #:
13433423
Filing Dt:
03/29/2012
Publication #:
US20120184073
Pub Dt:
07/19/2012
Title:
PROGRAMMABLE HIGH-K/METAL GATE MEMORY DEVICE
25
Patent #:
NONE
Issue Dt:
Application #:
13433537
Filing Dt:
03/29/2012
Publication #:
US20130256757
Pub Dt:
10/03/2013
Title:
SOI LATERAL BIPOLAR JUNCTION TRANSISTOR HAVING A WIDE BAND GAP EMITTER CONTACT
26
Patent #:
9236314
Issue Dt:
01/12/2016
Application #:
13433659
Filing Dt:
03/29/2012
Publication #:
US20120184093
Pub Dt:
07/19/2012
Title:
HIGH-K/METAL GATE STACK USING CAPPING LAYER METHODS, IC AND RELATED TRANSISTORS
27
Patent #:
8680623
Issue Dt:
03/25/2014
Application #:
13433815
Filing Dt:
03/29/2012
Publication #:
US20120181610
Pub Dt:
07/19/2012
Title:
TECHNIQUES FOR ENABLING MULTIPLE VT DEVICES USING HIGH-K METAL GATE STACKS
28
Patent #:
8822278
Issue Dt:
09/02/2014
Application #:
13434128
Filing Dt:
03/29/2012
Publication #:
US20130260516
Pub Dt:
10/03/2013
Title:
ASYMMETRIC FET FORMED THROUGH USE OF VARIABLE PITCH GATE FOR USE AS LOGIC DEVICE AND TEST STRUCTURE
29
Patent #:
8966449
Issue Dt:
02/24/2015
Application #:
13434495
Filing Dt:
03/29/2012
Publication #:
US20120192156
Pub Dt:
07/26/2012
Title:
TEST CASE PATTERN MATCHING
30
Patent #:
NONE
Issue Dt:
Application #:
13434739
Filing Dt:
03/29/2012
Publication #:
US20140063925
Pub Dt:
03/06/2014
Title:
PARALLEL PROGRAMMING MULTIPLE PHASE CHANGE MEMORY CELLS
31
Patent #:
8492821
Issue Dt:
07/23/2013
Application #:
13434883
Filing Dt:
03/30/2012
Publication #:
US20120187465
Pub Dt:
07/26/2012
Title:
ENHANCED CAPACITANCE TRENCH CAPACITOR
32
Patent #:
9080239
Issue Dt:
07/14/2015
Application #:
13434934
Filing Dt:
03/30/2012
Publication #:
US20120190203
Pub Dt:
07/26/2012
Title:
METHOD AND APPARATUS FOR ANGULAR HIGH DENSITY PLASMA CHEMICAL VAPOR DEPOSITION
33
Patent #:
8610249
Issue Dt:
12/17/2013
Application #:
13434964
Filing Dt:
03/30/2012
Publication #:
US20130256835
Pub Dt:
10/03/2013
Title:
NON-PLANAR CAPACITOR AND METHOD OF FORMING THE NON-PLANAR CAPACITOR
34
Patent #:
8877603
Issue Dt:
11/04/2014
Application #:
13435056
Filing Dt:
03/30/2012
Publication #:
US20130256830
Pub Dt:
10/03/2013
Title:
SEMICONDUCTOR-ON-OXIDE STRUCTURE AND METHOD OF FORMING
35
Patent #:
8347246
Issue Dt:
01/01/2013
Application #:
13435795
Filing Dt:
03/30/2012
Publication #:
US20120192137
Pub Dt:
07/26/2012
Title:
PLACEMENT AND OPTIMIZATION OF PROCESS DUMMY CELLS
36
Patent #:
8824196
Issue Dt:
09/02/2014
Application #:
13435828
Filing Dt:
03/30/2012
Publication #:
US20130258758
Pub Dt:
10/03/2013
Title:
SINGLE CYCLE DATA COPY FOR TWO-PORT SRAM
37
Patent #:
8952551
Issue Dt:
02/10/2015
Application #:
13436039
Filing Dt:
03/30/2012
Publication #:
US20120187562
Pub Dt:
07/26/2012
Title:
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
38
Patent #:
8603889
Issue Dt:
12/10/2013
Application #:
13436045
Filing Dt:
03/30/2012
Publication #:
US20130256758
Pub Dt:
10/03/2013
Title:
INTEGRATED CIRCUIT STRUCTURE HAVING AIR-GAP TRENCH ISOLATION AND RELATED DESIGN STRUCTURE
39
Patent #:
8407641
Issue Dt:
03/26/2013
Application #:
13436196
Filing Dt:
03/30/2012
Publication #:
US20120192133
Pub Dt:
07/26/2012
Title:
LOGIC DESIGN VERIFICATION TECHNIQUES FOR LIVENESS CHECKING WITH RETIMING
40
Patent #:
8476152
Issue Dt:
07/02/2013
Application #:
13436850
Filing Dt:
03/31/2012
Publication #:
US20120190177
Pub Dt:
07/26/2012
Title:
N-TYPE CARRIER ENHANCEMENT IN SEMICONDUCTORS
41
Patent #:
8642431
Issue Dt:
02/04/2014
Application #:
13437036
Filing Dt:
04/02/2012
Publication #:
US20120190161
Pub Dt:
07/26/2012
Title:
N-TYPE CARRIER ENHANCEMENT IN SEMICONDUCTORS
42
Patent #:
8392387
Issue Dt:
03/05/2013
Application #:
13437198
Filing Dt:
04/02/2012
Publication #:
US20120191680
Pub Dt:
07/26/2012
Title:
ASYNCHRONOUS DELETION OF A RANGE OF MESSAGES PROCESSED BY A PARALLEL DATABASE REPLICATION APPLY PROCESS
43
Patent #:
8729664
Issue Dt:
05/20/2014
Application #:
13437273
Filing Dt:
04/02/2012
Publication #:
US20130256826
Pub Dt:
10/03/2013
Title:
DISCONTINUOUS GUARD RING
44
Patent #:
8685833
Issue Dt:
04/01/2014
Application #:
13437309
Filing Dt:
04/02/2012
Publication #:
US20130260534
Pub Dt:
10/03/2013
Title:
STRESS REDUCTION MEANS FOR WARP CONTROL OF SUBSTRATES THROUGH CLAMPING
45
Patent #:
8627291
Issue Dt:
01/07/2014
Application #:
13437506
Filing Dt:
04/02/2012
Publication #:
US20130263097
Pub Dt:
10/03/2013
Title:
IDENTIFICATION OF LOCALIZABLE FUNCTION CALLS
46
Patent #:
8487696
Issue Dt:
07/16/2013
Application #:
13438230
Filing Dt:
04/03/2012
Publication #:
US20120188002
Pub Dt:
07/26/2012
Title:
MODULARIZED THREE-DIMENSIONAL CAPACITOR ARRAY
47
Patent #:
8822295
Issue Dt:
09/02/2014
Application #:
13438437
Filing Dt:
04/03/2012
Publication #:
US20130260525
Pub Dt:
10/03/2013
Title:
LOW EXTENSION DOSE IMPLANTS IN SRAM FABRICATION
48
Patent #:
8633106
Issue Dt:
01/21/2014
Application #:
13438508
Filing Dt:
04/03/2012
Publication #:
US20120190190
Pub Dt:
07/26/2012
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS AND METHODS OF MANUFACTURE
49
Patent #:
8359565
Issue Dt:
01/22/2013
Application #:
13439188
Filing Dt:
04/04/2012
Publication #:
US20120191401
Pub Dt:
07/26/2012
Title:
METHOD AND APPARATUS FOR GENERATING TEST PATTERNS FOR USE IN AT-SPEED TESTING
50
Patent #:
8551816
Issue Dt:
10/08/2013
Application #:
13439198
Filing Dt:
04/04/2012
Publication #:
US20120187577
Pub Dt:
07/26/2012
Title:
DIRECT EDGE CONNECTION FOR MULTI-CHIP INTEGRATED CIRCUITS
51
Patent #:
8589841
Issue Dt:
11/19/2013
Application #:
13439885
Filing Dt:
04/05/2012
Publication #:
US20130268906
Pub Dt:
10/10/2013
Title:
AUTOMATIC PARITY CHECKING IDENTIFICATION
52
Patent #:
9058995
Issue Dt:
06/16/2015
Application #:
13440514
Filing Dt:
04/05/2012
Publication #:
US20130264608
Pub Dt:
10/10/2013
Title:
SELF-PROTECTED DRAIN-EXTENDED METAL-OXIDE-SEMICONDUCTOR TRANSISTOR
53
Patent #:
9224604
Issue Dt:
12/29/2015
Application #:
13440546
Filing Dt:
04/05/2012
Publication #:
US20130264612
Pub Dt:
10/10/2013
Title:
DEVICE AND METHOD FOR FORMING SHARP EXTENSION REGION WITH CONTROLLABLE JUNCTION DEPTH AND LATERAL OVERLAP
54
Patent #:
NONE
Issue Dt:
Application #:
13440590
Filing Dt:
04/05/2012
Publication #:
US20120190155
Pub Dt:
07/26/2012
Title:
NANOWIRE MOSFET WITH DOPED EPITAXIAL CONTACTS FOR SOURCE AND DRAIN
55
Patent #:
8823064
Issue Dt:
09/02/2014
Application #:
13441048
Filing Dt:
04/06/2012
Publication #:
US20130256797
Pub Dt:
10/03/2013
Title:
Asymmetric FET Formed Through Use of Variable Pitch Gate for Use as Logic Device and Test Structure
56
Patent #:
8566768
Issue Dt:
10/22/2013
Application #:
13441053
Filing Dt:
04/06/2012
Publication #:
US20130268907
Pub Dt:
10/10/2013
Title:
BEST CLOCK FREQUENCY SEARCH FOR FPGA-BASED DESIGN
57
Patent #:
8508314
Issue Dt:
08/13/2013
Application #:
13441245
Filing Dt:
04/06/2012
Publication #:
US20120194302
Pub Dt:
08/02/2012
Title:
ON-CHIP VARIABLE DELAY TRANSMISSION LINE WITH FIXED CHARACTERISTIC IMPEDANCE
58
Patent #:
NONE
Issue Dt:
Application #:
13442008
Filing Dt:
04/09/2012
Publication #:
US20120193715
Pub Dt:
08/02/2012
Title:
STRUCTURE WITH ISOTROPIC SILICON RECESS PROFILE IN NANOSCALE DIMENSIONS
59
Patent #:
NONE
Issue Dt:
Application #:
13442011
Filing Dt:
04/09/2012
Publication #:
US20120193680
Pub Dt:
08/02/2012
Title:
STRUCTURE WITH ISOTROPIC SILICON RECESS PROFILE IN NANOSCALE DIMENSIONS
60
Patent #:
9223037
Issue Dt:
12/29/2015
Application #:
13442062
Filing Dt:
04/09/2012
Publication #:
US20140032135
Pub Dt:
01/30/2014
Title:
STRUCTURE AND METHOD TO ENSURE CORRECT OPERATION OF AN INTEGRATED CIRCUIT IN THE PRESENCE OF IONIZING RADIATION
61
Patent #:
8541842
Issue Dt:
09/24/2013
Application #:
13442087
Filing Dt:
04/09/2012
Publication #:
US20120193716
Pub Dt:
08/02/2012
Title:
HIGH-K TRANSISTORS WITH LOW THRESHOLD VOLTAGE
62
Patent #:
8674456
Issue Dt:
03/18/2014
Application #:
13442090
Filing Dt:
04/09/2012
Publication #:
US20120193348
Pub Dt:
08/02/2012
Title:
HIGH-K TRANSISTORS WITH LOW THRESHOLD VOLTAGE
63
Patent #:
8927387
Issue Dt:
01/06/2015
Application #:
13442168
Filing Dt:
04/09/2012
Publication #:
US20130264641
Pub Dt:
10/10/2013
Title:
ROBUST ISOLATION FOR THIN-BOX ETSOI MOSFETS
64
Patent #:
8286855
Issue Dt:
10/16/2012
Application #:
13442322
Filing Dt:
04/09/2012
Publication #:
US20120193833
Pub Dt:
08/02/2012
Title:
METHOD OF FULL-FIELD SOLDER COVERAGE BY INVERTING A FILL HEAD AND A MOLD
65
Patent #:
9337026
Issue Dt:
05/10/2016
Application #:
13443003
Filing Dt:
04/10/2012
Publication #:
US20120193603
Pub Dt:
08/02/2012
Title:
GRAPHENE GROWTH ON A CARBON-CONTAINING SEMICONDUCTOR LAYER
66
Patent #:
8283636
Issue Dt:
10/09/2012
Application #:
13443062
Filing Dt:
04/10/2012
Publication #:
US20120193536
Pub Dt:
08/02/2012
Title:
THERMALLY EXCITED NEAR-FIELD SOURCE
67
Patent #:
8927364
Issue Dt:
01/06/2015
Application #:
13443133
Filing Dt:
04/10/2012
Publication #:
US20130264653
Pub Dt:
10/10/2013
Title:
STRUCTURE AND METHOD OF HIGH-PERFORMANCE EXTREMELY THIN SILICON ON INSULATOR COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TRANSISTORS WITH DUAL STRESS BURIED INSULATORS
68
Patent #:
8704572
Issue Dt:
04/22/2014
Application #:
13443183
Filing Dt:
04/10/2012
Publication #:
US20130265091
Pub Dt:
10/10/2013
Title:
IMPLEMENTING LOW DUTY CYCLE DISTORTION AND LOW POWER DIFFERENTIAL TO SINGLE ENDED LEVEL SHIFTER
69
Patent #:
8617689
Issue Dt:
12/31/2013
Application #:
13443418
Filing Dt:
04/10/2012
Publication #:
US20130307139
Pub Dt:
11/21/2013
Title:
BONDING OF SUBSTRATES INCLUDING METAL-DIELECTRIC PATTERNS WITH METAL RAISED ABOVE DIELECTRIC AND STRUCTURES SO FORMED
70
Patent #:
8631375
Issue Dt:
01/14/2014
Application #:
13443426
Filing Dt:
04/10/2012
Publication #:
US20130268908
Pub Dt:
10/10/2013
Title:
VIA SELECTION IN INTEGRATED CIRCUIT DESIGN
71
Patent #:
8758962
Issue Dt:
06/24/2014
Application #:
13443427
Filing Dt:
04/10/2012
Publication #:
US20120196212
Pub Dt:
08/02/2012
Title:
METHOD AND APPARATUS FOR SUB-PELLICLE DEFECT REDUCTION ON PHOTOMASKS
72
Patent #:
8495536
Issue Dt:
07/23/2013
Application #:
13444094
Filing Dt:
04/11/2012
Publication #:
US20130055179
Pub Dt:
02/28/2013
Title:
COMPUTING VALIDATION COVERAGE OF INTEGRATED CIRCUIT MODEL
73
Patent #:
8564113
Issue Dt:
10/22/2013
Application #:
13444193
Filing Dt:
04/11/2012
Publication #:
US20120193790
Pub Dt:
08/02/2012
Title:
ELECTROSTATIC CHUCKING OF AN INSULATOR HANDLE SUBSTRATE
74
Patent #:
8785273
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Title:
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Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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