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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
06/16/2015
Application #:
13598787
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SRAM LOCAL EVALUATION LOGIC FOR COLUMN SELECTION
2
Patent #:
Issue Dt:
11/19/2013
Application #:
13598992
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
12/20/2012
Title:
SELF-ALIGNED DUAL DEPTH ISOLATION AND METHOD OF FABRICATION
3
Patent #:
Issue Dt:
07/01/2014
Application #:
13599256
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
03/06/2014
Title:
DOPING OF COPPER WIRING STRUCTURES IN BACK END OF LINE PROCESSING
4
Patent #:
NONE
Issue Dt:
Application #:
13599295
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
03/06/2014
Title:
PREVENTION OF THRU-SUBSTRATE VIA PISTONING USING HIGHLY DOPED COPPER ALLOY SEED LAYER
5
Patent #:
NONE
Issue Dt:
Application #:
13599694
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
12/20/2012
Title:
PNEUMATIC METHOD AND APPARATUS FOR NANO IMPRINT LITHOGRAPHY HAVING A CONFORMING MASK
6
Patent #:
Issue Dt:
09/09/2014
Application #:
13600204
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
03/06/2014
Title:
DOUBLE SOLDER BUMPS ON SUBSTRATES FOR LOW TEMPERATURE FLIP CHIP BONDING
7
Patent #:
Issue Dt:
02/03/2015
Application #:
13600314
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
03/06/2014
Title:
FINFET WITH REDUCED PARASITIC CAPACITANCE
8
Patent #:
Issue Dt:
07/15/2014
Application #:
13600319
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SOLUTIONS FOR RETARGETING INTEGRATED CIRCUIT LAYOUTS BASED ON DIFFRACTION PATTERN ANALYSIS
9
Patent #:
Issue Dt:
11/18/2014
Application #:
13600324
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SUSPENDED NANOWIRE STRUCTURE
10
Patent #:
Issue Dt:
11/10/2015
Application #:
13600598
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
12/20/2012
Title:
PLANAR AND NANOWIRE FIELD EFFECT TRANSISTORS
11
Patent #:
Issue Dt:
08/20/2013
Application #:
13600625
Filing Dt:
08/31/2012
Title:
SILICON GERMANIUM CHANNEL WITH SILICON BUFFER REGIONS FOR FIN FIELD EFFECT TRANSISTOR DEVICE
12
Patent #:
Issue Dt:
08/05/2014
Application #:
13601240
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
06/26/2014
Title:
CALIBRATION SCHEMES FOR CHARGE-RECYCLING STACKED VOLTAGE DOMAINS
13
Patent #:
NONE
Issue Dt:
Application #:
13601958
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
12/27/2012
Title:
METAL-GRAPHITE FOAM COMPOSITE AND A COOLING APPARATUS FOR USING THE SAME
14
Patent #:
Issue Dt:
06/17/2014
Application #:
13602117
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
12/27/2012
Title:
GRAPHENE TRANSISTOR WITH A SELF-ALIGNED GATE
15
Patent #:
Issue Dt:
06/16/2015
Application #:
13602118
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
01/03/2013
Title:
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS
16
Patent #:
Issue Dt:
06/25/2013
Application #:
13602119
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
12/27/2012
Title:
METHODS TO MITIGATE PLASMA DAMAGE IN ORGANOSILICATE DIELECTRICS
17
Patent #:
Issue Dt:
12/31/2013
Application #:
13602123
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
12/27/2012
Title:
MATERIALS CONTAINING VOIDS WITH VOID SIZE CONTROLLED ON THE NANOMETER SCALE
18
Patent #:
Issue Dt:
06/16/2015
Application #:
13602126
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
01/03/2013
Title:
INTERCONNECT STRUCTURES CONTAINING A PHOTO-PATTERNABLE LOW-K DIELECTRIC WITH A CURVED SIDEWALL SURFACE
19
Patent #:
Issue Dt:
06/10/2014
Application #:
13602164
Filing Dt:
09/02/2012
Publication #:
Pub Dt:
12/27/2012
Title:
IMPLEMENTING DUAL SPEED LEVEL SHIFTER WITH AUTOMATIC MODE CONTROL
20
Patent #:
NONE
Issue Dt:
Application #:
13602388
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
03/14/2013
Title:
MANUFACTURING A FILLING OF A GAP REGION
21
Patent #:
Issue Dt:
08/30/2016
Application #:
13602496
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
INTERCONNECT STRUCTURE INCLUDING A MODIFIED PHOTORESIST AS A PERMANENT INTERCONNECT DIELECTRIC AND METHOD OF FABRICATING SAME
22
Patent #:
NONE
Issue Dt:
Application #:
13602644
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
RAISED SOURCE/DRAIN FIELD EFFECT TRANSISTOR
23
Patent #:
Issue Dt:
09/02/2014
Application #:
13602777
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
01/02/2014
Title:
3-D STACKED MULTIPROCESSOR STRUCTURES AND METHODS TO ENABLE RELIABLE OPERATION OF PROCESSORS AT SPEEDS ABOVE SPECIFIED LIMITS
24
Patent #:
Issue Dt:
07/23/2013
Application #:
13602957
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
HOMOGENEOUS POROUS LOW DIELECTRIC CONSTANT MATERIALS
25
Patent #:
Issue Dt:
12/22/2015
Application #:
13603008
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT
26
Patent #:
NONE
Issue Dt:
Application #:
13603017
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
01/10/2013
Title:
INTERCONNECT STRUCTURE FABRICATED WITHOUT DRY PLASMA ETCH PROCESSING
27
Patent #:
Issue Dt:
08/12/2014
Application #:
13603051
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
SURFACE REPAIR STRUCTURE AND PROCESS FOR INTERCONNECT APPLICATIONS
28
Patent #:
Issue Dt:
06/04/2013
Application #:
13603086
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
01/03/2013
Title:
SOLID STATE KLYSTRON
29
Patent #:
Issue Dt:
12/24/2013
Application #:
13603110
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
SOLID STATE KLYSTRON
30
Patent #:
Issue Dt:
09/24/2013
Application #:
13603567
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
AVALANCHE IMPACT IONIZATION AMPLIFICATION DEVICES
31
Patent #:
NONE
Issue Dt:
Application #:
13603661
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
10/17/2013
Title:
Semiconductor Devices with Raised Source and Drain Regions
32
Patent #:
Issue Dt:
09/02/2014
Application #:
13603739
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
01/03/2013
Title:
SELF-ALIGNED III-V MOSFET DIFFUSION REGIONS AND SILICIDE-LIKE ALLOY CONTACT
33
Patent #:
Issue Dt:
12/30/2014
Application #:
13603869
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/04/2014
Title:
TONE INVERSION OF SELF-ASSEMBLED SELF-ALIGNED STRUCTURES
34
Patent #:
Issue Dt:
11/19/2013
Application #:
13603872
Filing Dt:
09/05/2012
Title:
RAISED ISOLATION STRUCTURE SELF-ALIGNED TO FIN STRUCTURES
35
Patent #:
Issue Dt:
10/15/2013
Application #:
13603879
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
ADDING SCALABILITY AND FAULT TOLERANCE TO GENERIC FINITE STATE MACHINE FRAMEWORKS FOR USE IN AUTOMATED INCIDENT MANAGEMENT OF CLOUD COMPUTING INFRASTRUCTURES
36
Patent #:
Issue Dt:
10/14/2014
Application #:
13603892
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
INTEGRATED CROSS-TESTER ANALYSIS AND REAL-TIME ADAPTIVE TEST
37
Patent #:
Issue Dt:
07/09/2013
Application #:
13603927
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
04/04/2013
Title:
HIGH THROUGHPUT EPITAXIAL LIFTOFF FOR RELEASING MULTIPLE SEMICONDUCTOR DEVICE LAYERS FROM A SINGLE BASE SUBSTRATE
38
Patent #:
Issue Dt:
06/16/2015
Application #:
13603944
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
01/03/2013
Title:
METHOD FOR CONTROLLED REMOVAL OF A SEMICONDUCTOR DEVICE LAYER FROM A BASE SUBSTRATE
39
Patent #:
NONE
Issue Dt:
Application #:
13604004
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
08/01/2013
Title:
SOI STRUCTURES INCLUDING A BURIED BORON NITRIDE DIELECTRIC
40
Patent #:
Issue Dt:
08/05/2014
Application #:
13604036
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
DEVICES AND METHODS TO OPTIMIZE MATERIALS AND PROPERTIES FOR REPLACEMENT METAL GATE STRUCTURES
41
Patent #:
Issue Dt:
11/18/2014
Application #:
13604090
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
ON-CHIP MEASUREMENT OF AC VARIABILITY IN INDIVIDUAL TRANSISTOR DEVICES
42
Patent #:
Issue Dt:
12/10/2013
Application #:
13604230
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
METHOD TO EVALUATE EFFECTIVENESS OF SUBSTRATE CLEANNESS AND QUANTITY OF PIN HOLES IN AN ANTIREFLECTIVE COATING OF A SOLAR CELL
43
Patent #:
NONE
Issue Dt:
Application #:
13604236
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
01/03/2013
Title:
MAGNETIC TUNNEL JUNCTION WITH IRON DUSTING LAYER BETWEEN FREE LAYER AND TUNNEL BARRIER
44
Patent #:
Issue Dt:
09/17/2013
Application #:
13604340
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
MULTI-GATE TRANSISTOR HAVING SIDEWALL CONTACTS
45
Patent #:
Issue Dt:
10/15/2013
Application #:
13604341
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
SILICON CARRIER OPTOELECTRONIC PACKAGING
46
Patent #:
Issue Dt:
05/26/2015
Application #:
13604363
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
12/27/2012
Title:
AXIOCENTRIC SCRUBBING LAND GRID ARRAY CONTACTS AND METHODS FOR FABRICATION
47
Patent #:
Issue Dt:
09/23/2014
Application #:
13604658
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
03/06/2014
Title:
BULK FINFET WITH CONTROLLED FIN HEIGHT AND HIGH-K LINER
48
Patent #:
Issue Dt:
06/16/2015
Application #:
13604660
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
03/06/2014
Title:
OVERLAY-TOLERANT VIA MASK AND REACTIVE ION ETCH (RIE) TECHNIQUE
49
Patent #:
Issue Dt:
01/07/2014
Application #:
13604666
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
12/27/2012
Title:
MULTI-ANODE SYSTEM FOR UNIFORM PLATING OF ALLOYS
50
Patent #:
Issue Dt:
07/09/2013
Application #:
13604671
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
01/03/2013
Title:
LATERAL EXTENDED DRAIN METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (LEDMOSFET) WITH TAPERED DIELECTRIC PLATES TO ACHIEVE A HIGH DRAIN-TO-BODY BREAKDOWN VOLTAGE, A METHOD OF FORMING THE TRANSISTOR AND A PROGRAM STORAGE DEVICE FOR DESIGNING THE TRANSISTOR
51
Patent #:
Issue Dt:
09/06/2016
Application #:
13604739
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
12/27/2012
Title:
Deposition On A Nanowire Using Atomic Layer Deposition
52
Patent #:
Issue Dt:
07/21/2015
Application #:
13604800
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SRAM LOCAL EVALUATION AND WRITE LOGIC FOR COLUMN SELECTION
53
Patent #:
Issue Dt:
11/05/2013
Application #:
13604814
Filing Dt:
09/06/2012
Title:
CIRCUIT DESIGN WITH GROWABLE CAPACITOR ARRAYS
54
Patent #:
Issue Dt:
12/30/2014
Application #:
13604820
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
12/27/2012
Title:
METHODS FOR CONTROLLING WAFER CURVATURE
55
Patent #:
Issue Dt:
12/23/2014
Application #:
13604878
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
03/06/2014
Title:
WIRE BOND SPLASH CONTAINMENT
56
Patent #:
NONE
Issue Dt:
Application #:
13604959
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
12/27/2012
Title:
LARGE-GRAIN, LOW-RESISTIVITY TUNGSTEN ON A CONDUCTIVE COMPOUND
57
Patent #:
Issue Dt:
12/31/2013
Application #:
13604963
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
08/01/2013
Title:
SEMICONDUCTOR SUBSTRATES USING BANDGAP MATERIAL BETWEEN III-V CHANNEL MATERIAL AND INSULATOR LAYER
58
Patent #:
Issue Dt:
10/28/2014
Application #:
13604986
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
12/27/2012
Title:
COMPREHENSIVE ANALYSIS OF QUEUE TIMES IN MICROELECTRONIC MANUFACTURING
59
Patent #:
Issue Dt:
01/27/2015
Application #:
13604995
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
03/07/2013
Title:
AMPLIFIERS USING GATED DIODES
60
Patent #:
NONE
Issue Dt:
Application #:
13605085
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
08/01/2013
Title:
Fin Structures with Damage-Free Sidewalls for Multi-Gate Mosfets
61
Patent #:
Issue Dt:
06/03/2014
Application #:
13605136
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
12/27/2012
Title:
FORMATION OF DIVIDERS BETWEEN GATE ENDS OF FIELD EFFECT TRANSISTOR DEVICES
62
Patent #:
Issue Dt:
06/03/2014
Application #:
13605144
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
01/24/2013
Title:
BORDERLESS CONTACTS IN SEMICONDUCTOR DEVICES
63
Patent #:
NONE
Issue Dt:
Application #:
13605168
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
03/06/2014
Title:
PRODUCT RELIABILITY ESTIMATION
64
Patent #:
Issue Dt:
10/15/2013
Application #:
13605253
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
10/03/2013
Title:
SOI LATERAL BIPOLAR JUNCTION TRANSISTOR HAVING A WIDE BAND GAP EMITTER CONTACT
65
Patent #:
Issue Dt:
11/26/2013
Application #:
13605363
Filing Dt:
09/06/2012
Publication #:
Pub Dt:
03/21/2013
Title:
MULTI-SPINDLE CHEMICAL MECHANICAL PLANARIZATION TOOL
66
Patent #:
Issue Dt:
10/07/2014
Application #:
13606055
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
12/27/2012
Title:
METHOD FOR DESIGNING OPTICAL LITHOGRAPHY MASKS FOR DIRECTED SELF-ASSEMBLY
67
Patent #:
NONE
Issue Dt:
Application #:
13606071
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
03/13/2014
Title:
PARTICLE DETECTION AND CLEANING SYSTEM
68
Patent #:
Issue Dt:
11/26/2013
Application #:
13606326
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
01/10/2013
Title:
ACCURATE DEPOSITION OF NANO-OBJECTS ON A SURFACE
69
Patent #:
Issue Dt:
10/15/2013
Application #:
13606365
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
07/11/2013
Title:
Nanowire Field Effect Transistors
70
Patent #:
Issue Dt:
10/22/2013
Application #:
13606382
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
03/21/2013
Title:
FIELD EFFECT TRANSISTOR DEVICE WITH RAISED ACTIVE REGIONS
71
Patent #:
Issue Dt:
06/02/2015
Application #:
13606448
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
03/13/2014
Title:
DEEP TRENCH CAPACITOR
72
Patent #:
NONE
Issue Dt:
Application #:
13606778
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
12/27/2012
Title:
MODULAR ARRAY OF FIXED-COUPLING QUANTUM SYSTEMS FOR QUANTUM INFORMATION PROCESSING
73
Patent #:
Issue Dt:
12/08/2015
Application #:
13606788
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
02/07/2013
Title:
SELF-ALIGNED FINE PITCH PERMANENT ON-CHIP INTERCONNECT STRUCTURES AND METHOD OF FABRICATION
74
Patent #:
Issue Dt:
01/14/2014
Application #:
13606816
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
12/27/2012
Title:
MOSFET WITH RECESSED CHANNEL FILM AND ABRUPT JUNCTIONS
75
Patent #:
Issue Dt:
03/15/2016
Application #:
13606873
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
02/07/2013
Title:
FINFET FIELD-EFFECT TRANSISTORS WITH ATOMIC LAYER DOPING
76
Patent #:
Issue Dt:
05/13/2014
Application #:
13606893
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
06/20/2013
Title:
SOI FINFET WITH RECESSED MERGED FINS AND LINER FOR ENHANCED STRESS COUPLING
77
Patent #:
Issue Dt:
01/06/2015
Application #:
13606904
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
12/27/2012
Title:
SELF-SEALED FLUIDIC CHANNELS FOR A NANOPORE ARRAY
78
Patent #:
Issue Dt:
05/26/2015
Application #:
13606916
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
02/28/2013
Title:
FORMATION OF METAL NANOSPHERES AND MICROSPHERES
79
Patent #:
Issue Dt:
03/18/2014
Application #:
13606940
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
03/13/2014
Title:
CLOCK FEATHERED SLEW RATE CONTROL SYSTEM
80
Patent #:
Issue Dt:
01/06/2015
Application #:
13607020
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
02/28/2013
Title:
PROGRAMMING THE BEHAVIOR OF INDIVIDUAL CHIPS OR STRATA IN A 3D STACK OF INTEGRATED CIRCUITS
81
Patent #:
Issue Dt:
06/18/2013
Application #:
13607089
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
02/28/2013
Title:
3D CHIP STACK SKEW REDUCTION WITH RESONANT CLOCK AND INDUCTIVE COUPLING
82
Patent #:
Issue Dt:
12/03/2013
Application #:
13607589
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
07/11/2013
Title:
CONTROLLING THRESHOLD VOLTAGE IN CARBON BASED FIELD EFFECT TRANSISTORS
83
Patent #:
Issue Dt:
10/15/2013
Application #:
13607672
Filing Dt:
09/08/2012
Title:
GERMANIUM LATERAL BIPOLAR JUNCTION TRANSISTOR
84
Patent #:
Issue Dt:
07/01/2014
Application #:
13607674
Filing Dt:
09/08/2012
Publication #:
Pub Dt:
01/03/2013
Title:
TEST PAD STRUCTURE FOR REUSE OF INTERCONNECT LEVEL MASKS
85
Patent #:
Issue Dt:
04/22/2014
Application #:
13607677
Filing Dt:
09/08/2012
Publication #:
Pub Dt:
12/27/2012
Title:
BORDERLESS INTERCONNECT LINE STRUCTURE SELF-ALIGNED TO UPPER AND LOWER LEVEL CONTACT VIAS
86
Patent #:
Issue Dt:
11/05/2013
Application #:
13607678
Filing Dt:
09/08/2012
Publication #:
Pub Dt:
10/17/2013
Title:
METHODOLOGIES FOR AUTOMATIC 3-D DEVICE STRUCTURE SYNTHESIS FROM CIRCUIT LAYOUTS FOR DEVICE SIMULATION
87
Patent #:
Issue Dt:
04/01/2014
Application #:
13607680
Filing Dt:
09/08/2012
Publication #:
Pub Dt:
12/27/2012
Title:
SEMICONDUCTOR CHIP STACKING FOR REDUNDANCY AND YIELD IMPROVEMENT
88
Patent #:
Issue Dt:
10/31/2017
Application #:
13607741
Filing Dt:
09/09/2012
Publication #:
Pub Dt:
12/27/2012
Title:
HIGH k GATE STACK ON III-V COMPOUND SEMICONDUCTORS
89
Patent #:
Issue Dt:
10/21/2014
Application #:
13607743
Filing Dt:
09/09/2012
Publication #:
Pub Dt:
04/25/2013
Title:
THIN SEMICONDUCTOR-ON-INSULATOR MOSFET WITH CO-INTEGRATED SILICON, SILICON GERMANIUM AND SILICON DOPED WITH CARBON CHANNELS
90
Patent #:
Issue Dt:
12/16/2014
Application #:
13607744
Filing Dt:
09/09/2012
Publication #:
Pub Dt:
12/27/2012
Title:
CAPPING COATING FOR 3D INTEGRATION APPLICATIONS
91
Patent #:
Issue Dt:
10/07/2014
Application #:
13607856
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
03/13/2014
Title:
SELF-ALIGNED CONTACTS
92
Patent #:
Issue Dt:
06/24/2014
Application #:
13607869
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
12/27/2012
Title:
BURIED METAL-SEMICONDUCTOR ALLOY LAYERS AND STRUCTURES AND METHODS FOR FABRICATION THEREOF
93
Patent #:
Issue Dt:
07/28/2015
Application #:
13607875
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
06/27/2013
Title:
THIN HETEREOSTRUCTURE CHANNEL DEVICE
94
Patent #:
Issue Dt:
12/31/2013
Application #:
13607877
Filing Dt:
09/10/2012
Title:
FIN BIPOLAR TRANSISTORS HAVING SELF-ALIGNED COLLECTOR AND EMITTER REGIONS
95
Patent #:
Issue Dt:
11/26/2013
Application #:
13608032
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
01/03/2013
Title:
METHOD AND SYSTEM FOR EVALUATING A MACHINE TOOL OPERATING CHARACTERISTICS
96
Patent #:
Issue Dt:
05/27/2014
Application #:
13608183
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
03/13/2014
Title:
ELECTRONIC ANTI-FUSE
97
Patent #:
Issue Dt:
08/12/2014
Application #:
13608211
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
03/13/2014
Title:
Semiconductor plural gate lengths
98
Patent #:
Issue Dt:
04/22/2014
Application #:
13608277
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
03/13/2014
Title:
HYBRID PHASE-LOCKED LOOP ARCHITECTURES
99
Patent #:
Issue Dt:
05/13/2014
Application #:
13608281
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
12/27/2012
Title:
MULTI-MODE MULTIPLEXING USING STAGED COUPLING AND QUASI-PHASE-MATCHING
100
Patent #:
Issue Dt:
07/23/2013
Application #:
13608314
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
01/03/2013
Title:
SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND STRUCTURE INCLUDING MULTIPLE ORDER RADIO FREQUENCY HARMONIC SUPRESSING REGION
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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