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Patent #:
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|
Issue Dt:
|
04/15/2003
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Application #:
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09708142
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Filing Dt:
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11/08/2000
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Title:
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METHOD AND SYSTEM FOR IMPROVING THE PERFORMANCE ON SOI MEMORY ARRAYS IN AN SRAM ARCHITECTURE SYSTEM
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Patent #:
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Issue Dt:
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01/10/2006
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Application #:
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09708494
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Filing Dt:
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11/09/2000
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Title:
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SYSTEM-ON-A-CHIP STRUCTURE HAVING A MULTIPLE CHANNEL BUS BRIDGE
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Patent #:
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Issue Dt:
|
09/17/2002
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Application #:
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09709091
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Filing Dt:
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11/08/2000
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Title:
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METHOD TO OVERCOME IMAGE SHORTENING BY USE OF SUB-RESOLUTION RETICLE FEATURES
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Patent #:
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|
Issue Dt:
|
03/26/2002
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Application #:
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09709092
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Filing Dt:
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11/08/2000
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Title:
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Method and apparatus for removing known good die
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Patent #:
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Issue Dt:
|
12/02/2003
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Application #:
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09711269
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Filing Dt:
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11/13/2000
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Title:
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METHOD AND APPARATUS FOR PERFORMING LASER CVD
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Patent #:
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Issue Dt:
|
05/04/2004
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Application #:
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09712391
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Filing Dt:
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11/14/2000
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Title:
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INCREASING AN ELECTRICAL RESISTANCE OF A RESISTOR BY OXIDATION OR NITRIDIZATION
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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09713830
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Filing Dt:
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11/15/2000
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Title:
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FET WITH T-SHAPED GATE
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Patent #:
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Issue Dt:
|
11/09/2004
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Application #:
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09714373
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Filing Dt:
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11/16/2000
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Title:
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COMPLIANT LAMINATE CONNECTOR
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|
Patent #:
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|
Issue Dt:
|
06/04/2002
|
Application #:
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09714504
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Filing Dt:
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11/16/2000
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Title:
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COPPER INTERCONNECTION STRUCTURE INCORPORATING A METAL SEED LAYER
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Patent #:
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Issue Dt:
|
03/30/2004
|
Application #:
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09715184
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Filing Dt:
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11/20/2000
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Title:
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POLISHING PADS WITH POLYMER FILLED FIBROUS WEB, AND METHODS FOR FABRICATING AND USING SAME
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Patent #:
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Issue Dt:
|
06/10/2003
|
Application #:
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09715559
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Filing Dt:
|
11/17/2000
|
Title:
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CHIP INTERCONNECT WIRING STRUCTURE WITH LOW DIELECTRIC CONSTANT INSULATOR AND METHODS FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
|
05/28/2002
|
Application #:
|
09716749
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Filing Dt:
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11/20/2000
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Title:
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TRENCH-DEFINED SILICON GERMANIUM ESD DIODE NETWORK
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Patent #:
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Issue Dt:
|
09/28/2004
|
Application #:
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09716915
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Filing Dt:
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11/20/2000
|
Title:
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METHOD AND SYSTEM FOR DETECTING A HARD FAILURE IN A MEMORY ARRAY
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|
Patent #:
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|
Issue Dt:
|
08/31/2004
|
Application #:
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09716916
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Filing Dt:
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11/20/2000
|
Title:
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FAULT TOLERANT MEMORY SYSTEM UTILIZING MEMORY ARRAYS WITH HARD ERROR DETECTION
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|
Patent #:
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|
Issue Dt:
|
10/16/2001
|
Application #:
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09717971
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Filing Dt:
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11/21/2000
|
Title:
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Novel CMOS device structures and method of making same
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|
Patent #:
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|
Issue Dt:
|
08/20/2002
|
Application #:
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09718010
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Filing Dt:
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11/21/2000
|
Title:
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INTERCONNECTION STRUCTURE AND METHOD FOR FABRICATING SAME
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|
Patent #:
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|
Issue Dt:
|
09/14/2004
|
Application #:
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09718850
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Filing Dt:
|
11/22/2000
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Title:
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LOGIC SOI STRUCTURE, PROCESS AND APPLICATION FOR VERTICAL BIPOLAR TRANSISTOR
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Patent #:
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|
Issue Dt:
|
07/10/2001
|
Application #:
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09725412
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Filing Dt:
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11/29/2000
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Title:
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Embedded vertical dram cells and dual workfunction logic gates
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|
Patent #:
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|
Issue Dt:
|
04/22/2003
|
Application #:
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09726697
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Filing Dt:
|
11/29/2000
|
Publication #:
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Pub Dt:
|
05/30/2002
| | | | |
Title:
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FLUX COMPOSITION AND SOLDERING METHOD FOR HIGH DENSITY ARRAYS
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Patent #:
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Issue Dt:
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11/26/2002
|
Application #:
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09727572
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Filing Dt:
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11/30/2000
|
Publication #:
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Pub Dt:
|
05/30/2002
| | | | |
Title:
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METHOD TO STABILIZE A CARBON ALIGNMENT LAYER FOR LIQUID CRYSTAL DISPLAYS
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Patent #:
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Issue Dt:
|
07/29/2008
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Application #:
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09727615
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Filing Dt:
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12/01/2000
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Publication #:
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Pub Dt:
|
10/31/2002
| | | | |
Title:
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POLYCRYSTALLINE CONDUCTING POLYMERS HAVING ADJUSTABLE MORPHOLOGY AND PROPERTIES
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Patent #:
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Issue Dt:
|
08/06/2002
|
Application #:
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09730673
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Filing Dt:
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12/06/2000
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Publication #:
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Pub Dt:
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06/06/2002
| | | | |
Title:
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DRAM CAM CELL WITH HIDDEN REFRESH
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Patent #:
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|
Issue Dt:
|
06/10/2003
|
Application #:
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09731147
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Filing Dt:
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12/05/2000
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Publication #:
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|
Pub Dt:
|
08/01/2002
| | | | |
Title:
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METHOD AND APPARATUS FOR INITIALIZING AN INTEGRATED CIRCUIT USING COMPRESSED DATA FROM A REMOTE FUSEBOX
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Patent #:
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|
Issue Dt:
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06/11/2002
|
Application #:
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09731616
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Filing Dt:
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12/07/2000
|
Title:
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ENHANCED INTERFACE THERMOELECTRIC COOLERS WITH ALL-METAL TIPS
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|
Patent #:
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Issue Dt:
|
01/29/2002
|
Application #:
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09731619
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Filing Dt:
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12/07/2000
|
Title:
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Low stress hermetic seal
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|
Patent #:
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Issue Dt:
|
08/05/2003
|
Application #:
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09731620
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Filing Dt:
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12/07/2000
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Publication #:
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|
Pub Dt:
|
06/13/2002
| | | | |
Title:
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SHALLOW TRENCH ISOLATION FOR THIN SILICON/SILICON-ON-INSULATOR SUBSTRATES BY UTILIZING POLYSILICON
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Patent #:
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|
Issue Dt:
|
05/07/2002
|
Application #:
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09731997
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Filing Dt:
|
12/07/2000
|
Title:
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THERMOELECTRIC COOLERS WITH ENHANCED STRUCTURED INTERFACES
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Patent #:
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Issue Dt:
|
01/25/2005
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Application #:
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09732266
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Filing Dt:
|
12/07/2000
|
Publication #:
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Pub Dt:
|
06/13/2002
| | | | |
Title:
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EFFICIENT ARRAY TRACING IN A LOGIC SIMULATOR MACHINE
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|
Patent #:
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|
Issue Dt:
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12/07/2004
|
Application #:
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09732272
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Filing Dt:
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12/07/2000
|
Publication #:
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|
Pub Dt:
|
06/13/2002
| | | | |
Title:
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METHOD AND SYSTEM FOR EFFICIENTLY OVERRIDING ARRAY NET VALUES IN A LOGIC SIMULATOR MACHINE
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|
Patent #:
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|
Issue Dt:
|
05/21/2002
|
Application #:
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09733188
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Filing Dt:
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12/09/2000
|
Publication #:
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|
Pub Dt:
|
05/10/2001
| | | | |
Title:
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METHOD AND MATERIALS FOR THROUGH-MASK ELECTROPLATING AND SELECTIVE BASE REMOVAL
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|
Patent #:
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|
Issue Dt:
|
12/17/2002
|
Application #:
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09733295
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Filing Dt:
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12/08/2000
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Publication #:
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|
Pub Dt:
|
08/15/2002
| | | | |
Title:
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METHOD AND APPARATUS FOR TESTING A WRITE FUNCTION OF A DUAL-PORT STATIC MEMORY CELL
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|
Patent #:
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|
Issue Dt:
|
01/06/2004
|
Application #:
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09733968
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Filing Dt:
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12/12/2000
|
Publication #:
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|
Pub Dt:
|
02/21/2002
| | | | |
Title:
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NANOPARTICLE STRUCTURES UTILIZING SYNTHETIC DNA LATTICES
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|
Patent #:
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|
Issue Dt:
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09/14/2004
|
Application #:
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09734225
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Filing Dt:
|
12/11/2000
|
Publication #:
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|
Pub Dt:
|
06/13/2002
| | | | |
Title:
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BACKSIDE INTEGRATED CIRCUIT DIE SURFACE FINISHING TECHNIQUE AND TOOL
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|
Patent #:
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Issue Dt:
|
07/30/2002
|
Application #:
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09734624
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Filing Dt:
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12/12/2000
|
Publication #:
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|
Pub Dt:
|
06/13/2002
| | | | |
Title:
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LATERAL POLYSILICON PIN DIODE AND METHOD FOR SO FABRICATING
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Patent #:
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Issue Dt:
|
09/30/2003
|
Application #:
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09734830
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Filing Dt:
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12/12/2000
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Publication #:
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Pub Dt:
|
08/15/2002
| | | | |
Title:
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ELECTROPLATING APPARATUS WITH VERTICAL ELECTRICAL CONTACT
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|
Patent #:
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Issue Dt:
|
07/09/2002
|
Application #:
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09735988
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Filing Dt:
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12/13/2000
|
Publication #:
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Pub Dt:
|
08/08/2002
| | | | |
Title:
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METHOD FOR FORMING A LINER IN A TRENCH
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Patent #:
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|
Issue Dt:
|
02/18/2003
|
Application #:
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09737012
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Filing Dt:
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12/14/2000
|
Publication #:
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Pub Dt:
|
08/15/2002
| | | | |
Title:
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METHOD FOR SUPPLY VOLTAGE DROP ANALYSIS DURING PLACEMENT PHASE OF CHIP DESIGN
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|
Patent #:
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Issue Dt:
|
02/26/2002
|
Application #:
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09737198
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Filing Dt:
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12/14/2000
|
Title:
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Increased polish removal rate of dielectric layers using fixed abrasive pads
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Patent #:
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Issue Dt:
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09/17/2002
|
Application #:
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09739935
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Filing Dt:
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12/18/2000
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Publication #:
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Pub Dt:
|
06/20/2002
| | | | |
Title:
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METHOD FOR FORMING A POROUS DIELECTRIC MATERIAL LAYER IN A SEMICONDUCTOR DEVICE AND DEVICE FORMED
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Patent #:
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Issue Dt:
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01/07/2003
|
Application #:
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09740089
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Filing Dt:
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12/18/2000
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Publication #:
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Pub Dt:
|
06/20/2002
| | | | |
Title:
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INTERCONNECTS WITH TI-CONTAINING LINERS
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Patent #:
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Issue Dt:
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08/27/2002
|
Application #:
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09740280
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Filing Dt:
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12/19/2000
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Publication #:
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Pub Dt:
|
11/29/2001
| | | | |
Title:
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NOVEL MCM -MLC TECHNOLOGY
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
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09740721
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Filing Dt:
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12/18/2000
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Publication #:
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Pub Dt:
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08/23/2001
| | | | |
Title:
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Low temperature thin film transistor fabrication
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Patent #:
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Issue Dt:
|
08/06/2002
|
Application #:
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09742976
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Filing Dt:
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12/20/2000
|
Publication #:
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Pub Dt:
|
08/23/2001
| | | | |
Title:
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MICROPROCESSOR HAVING AIR AS A DIELECTRIC AND ENCAPSULATED LINES
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Patent #:
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Issue Dt:
|
01/20/2004
|
Application #:
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09745047
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Filing Dt:
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12/20/2000
|
Title:
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CONTACT CAPPING LOCAL INTERCONNECT
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Patent #:
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Issue Dt:
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11/18/2003
|
Application #:
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09745273
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Filing Dt:
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12/20/2000
|
Publication #:
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Pub Dt:
|
11/08/2001
| | | | |
Title:
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DEVICE FOR CONTACTING AND/OR MODIFYING A SURFACE HAVING A CANTILEVER AND A METHOD FOR PRODUCTION OF SAID CANTILEVER
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Patent #:
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Issue Dt:
|
08/27/2002
|
Application #:
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09745361
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Filing Dt:
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12/21/2000
|
Title:
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METHOD OF FABRICATING A POLY-POLY CAPACITOR WITH A SIGE BICMOS INTEGRATION SCHEME
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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09748071
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Filing Dt:
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12/21/2000
|
Publication #:
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Pub Dt:
|
06/27/2002
| | | | |
Title:
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Substantially transparent aqueous base soluble polymer system for use in 157 nm resist applications
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Patent #:
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Issue Dt:
|
11/30/2004
|
Application #:
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09748256
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Filing Dt:
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12/27/2000
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Title:
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SEMICONDUCTOR DEVICE ON A COMBINATION BULK SILICON AND SILICON-ON-INSULATOR (SOI) SUBSTRATE
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Patent #:
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Issue Dt:
|
09/21/2004
|
Application #:
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09748965
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Filing Dt:
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12/27/2000
|
Publication #:
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Pub Dt:
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05/17/2001
| | | | |
Title:
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INTEGRATED COBALT SILICIDE PROCESS FOR SEMICONDUCTOR DEVICES
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|
Patent #:
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Issue Dt:
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05/13/2003
|
Application #:
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09749162
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Filing Dt:
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12/27/2000
|
Publication #:
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Pub Dt:
|
06/27/2002
| | | | |
Title:
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DISTRIBUTED CONNECTOR SYSTEM FOR WEARABLE COMPUTERS
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
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09750432
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Filing Dt:
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12/28/2000
|
Publication #:
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|
Pub Dt:
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01/17/2002
| | | | |
Title:
|
Data source interface log files
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|
Patent #:
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|
Issue Dt:
|
11/12/2013
|
Application #:
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09750475
|
Filing Dt:
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12/28/2000
|
Publication #:
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Pub Dt:
|
04/04/2002
| | | | |
Title:
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DATA SOURCE INTERFACE ENHANCED ERROR RECOVERY
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Patent #:
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Issue Dt:
|
02/03/2004
|
Application #:
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09750969
|
Filing Dt:
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12/28/2000
|
Publication #:
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|
Pub Dt:
|
08/22/2002
| | | | |
Title:
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SYSTEM AND METHOD FOR INSERTING LEAKAGE REDUCTION CONTROL IN LOGIC CIRCUITS
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|
Patent #:
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|
Issue Dt:
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08/15/2006
|
Application #:
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09751803
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Filing Dt:
|
12/29/2000
|
Publication #:
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Pub Dt:
|
09/05/2002
| | | | |
Title:
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SIGNAL OVERRIDE FOR SIMULATION MODELS
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|
Patent #:
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|
Issue Dt:
|
09/06/2005
|
Application #:
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09752254
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Filing Dt:
|
12/30/2000
|
Publication #:
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Pub Dt:
|
09/05/2002
| | | | |
Title:
|
HIERARCHICAL PROCESSING OF SIMULATION MODEL EVENTS
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|
Patent #:
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|
Issue Dt:
|
05/21/2002
|
Application #:
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09752571
|
Filing Dt:
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12/28/2000
|
Publication #:
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|
Pub Dt:
|
08/23/2001
| | | | |
Title:
|
PROCESS FOR FABRICATING SINGLE CRYSTAL RESONANT DEVICES THAT ARE COMPATIBLE WITH INTEGRATED CIRCUIT PROCESSING
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Patent #:
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|
Issue Dt:
|
03/25/2003
|
Application #:
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09752915
|
Filing Dt:
|
01/02/2001
|
Publication #:
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|
Pub Dt:
|
05/10/2001
| | | | |
Title:
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PROTECTION OF A PLATED THROUGH HOLE FROM CHEMICAL ATTACK
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Patent #:
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|
Issue Dt:
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09/17/2002
|
Application #:
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09753015
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Filing Dt:
|
01/02/2001
|
Publication #:
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Pub Dt:
|
09/20/2001
| | | | |
Title:
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COMPOSITE LAMINATE CIRCUIT STRUCTURE AND METHOD OF FORMING THE SAME
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Patent #:
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|
Issue Dt:
|
12/03/2002
|
Application #:
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09753284
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Filing Dt:
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01/02/2001
|
Publication #:
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|
Pub Dt:
|
07/04/2002
| | | | |
Title:
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SPIRAL INDUCTOR SEMICONDUCTING DEVICE WITH GROUNDING STRIPS AND CONDUCTING VIAS
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
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09753614
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Filing Dt:
|
01/04/2001
|
Publication #:
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|
Pub Dt:
|
05/31/2001
| | | | |
Title:
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Multli-spectral image compression with bounded loss
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Patent #:
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|
Issue Dt:
|
07/23/2002
|
Application #:
|
09753845
|
Filing Dt:
|
01/03/2001
|
Title:
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METHODOLOGY FOR ELECTRICALLY INDUCED SELECTIVE BREAKDOWN OF NANOTUBES
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Patent #:
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|
Issue Dt:
|
04/22/2003
|
Application #:
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09754910
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Filing Dt:
|
01/05/2001
|
Publication #:
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|
Pub Dt:
|
07/11/2002
| | | | |
Title:
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METHOD TO DETERMINE OPTICAL PROXIMITY CORRECTION AND ASSIST FEATURE RULES WHICH ACCOUNT FOR VARIATIONS IN MASK DIMENSIONS
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Patent #:
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Issue Dt:
|
12/14/2004
|
Application #:
|
09755164
|
Filing Dt:
|
01/08/2001
|
Publication #:
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|
Pub Dt:
|
07/11/2002
| | | | |
Title:
|
ALUMINUM NITRIDE AND ALUMINUM OXIDE/ALUMINUM NITRIDE HETEROSTRUCTURE GATE DIELECTRIC STACK BASED FIELD EFFECT TRANSISTORS AND METHOD FOR FORMING SAME
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Patent #:
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|
Issue Dt:
|
08/06/2002
|
Application #:
|
09755899
|
Filing Dt:
|
01/04/2001
|
Publication #:
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|
Pub Dt:
|
08/08/2002
| | | | |
Title:
|
METHOD FOR FORMING INTERCONNECTS ON SEMICONDUCTOR SUBSTRATES AND STRUCTURES FORMED
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|
|
Patent #:
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|
Issue Dt:
|
08/19/2003
|
Application #:
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09757071
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Filing Dt:
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01/08/2001
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
Title:
|
GREENSHEET CARRIERS AND PROCESSING THEREOF
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|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09757107
|
Filing Dt:
|
01/08/2001
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
Title:
|
LINEAR VOLTAGE CONTROLLED OSCILLATOR TRANSCONDUCTOR WITH GAIN COMPENSATION
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
09757154
|
Filing Dt:
|
01/09/2001
|
Publication #:
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|
Pub Dt:
|
11/15/2001
| | | | |
Title:
|
BEOL decoupling capacitor
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|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
09757159
|
Filing Dt:
|
01/09/2001
|
Publication #:
|
|
Pub Dt:
|
01/17/2002
| | | | |
Title:
|
METHOD FOR BONDING HEAT SINKS TO OVERMOLDS AND DEVICE FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
09757185
|
Filing Dt:
|
01/09/2001
|
Publication #:
|
|
Pub Dt:
|
05/17/2001
| | | | |
Title:
|
METHOD FOR BONDING HEAT SINKS TO OVERMOLDS AND DEVICE FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09757267
|
Filing Dt:
|
01/09/2001
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
Title:
|
PROGRAMMABLE LATCH DEVICE WITH INTEGRATED PROGRAMMABLE ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
09757317
|
Filing Dt:
|
01/09/2001
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
Title:
|
GROUND-PLANE DEVICE WITH BACK OXIDE TOPOGRAPHY
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|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
09757965
|
Filing Dt:
|
01/10/2001
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
Title:
|
FULLY-DEPLETED-COLLECTOR SILICON-ON-INSULATOR (SOI) BIPOLAR TRANSISTOR USEFUL ALONE OR IN SOI BICMOS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2002
|
Application #:
|
09758989
|
Filing Dt:
|
01/12/2001
|
Title:
|
Wafer cleaning apparatus
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
09759013
|
Filing Dt:
|
01/11/2001
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
Title:
|
PROCESS WINDOW BASED OPTICAL PROXIMITY CORRECTION OF LITHOGRAPHIC IMAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
09759101
|
Filing Dt:
|
01/12/2001
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
Title:
|
FIB/RIE METHOD FOR IN-LINE CIRCUIT MODIFICATION OF MICROELECTRONIC CHIPS CONTAINING ORGANIC DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09759258
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
04/25/2002
| | | | |
Title:
|
THIN FILM METAL BARRIER FOR ELECTRICAL INTERCONNECTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09760245
|
Filing Dt:
|
01/12/2001
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCORPORATING ELEMENTS FORMED OF REFRACTORY METAL-SILICON-NITROGEN AND METHOD FOR FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2003
|
Application #:
|
09760621
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
MOS DEVICE HAVING A PASSIVATED SEMICONDUCTOR-DIELECTRIC INTERFACE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09760884
|
Filing Dt:
|
01/17/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
Tungsten encapsulated copper interconnections using electroplating
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09760955
|
Filing Dt:
|
01/16/2001
|
Title:
|
BOND PAD STRUCTURE AND METHOD FOR REDUCED DOWNWARD FORCE WIREBONDING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09761123
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
APPARATUS AND METHOD FOR FORMING A BATTERY IN AN INTERGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
|
Application #:
|
09761124
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
COMPLIANT LAYER FOR ENCAPSULATED CLOUMNS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2003
|
Application #:
|
09761464
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
METHOD FOR ADDING DECOUPLING CAPACITANCE DURING INTEGRATED CIRCUIT DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2002
|
Application #:
|
09761616
|
Filing Dt:
|
01/16/2001
|
Title:
|
Process for reworking circuit boards
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09764048
|
Filing Dt:
|
01/17/2001
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
Title:
|
ADJUSTING FILLET GEOMETRY TO COUPLE A HEAT SPREADER TO A CHIP CARRIER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09764674
|
Filing Dt:
|
01/18/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
METHOD OF FORMING A SHALLOW TRENCH ISOLATION USING NON-CONFORMAL DIELECTRIC MATERIAL AND PLANARIZATRION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09764824
|
Filing Dt:
|
01/17/2001
|
Title:
|
LOW BITLINE CAPACITANCE STRUCTURE AND METHOD OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
09764833
|
Filing Dt:
|
01/17/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
STRUCTURE AND METHOD OF FORMING BITLINE CONTACTS FOR A VERTICAL DRAM ARRAY USING A LINE BITLINE CONTACT MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
09764834
|
Filing Dt:
|
01/17/2001
|
Title:
|
PRODUCTION OF METAL INSULATOR METAL (MIM) STRUCTURES USING ANODIZING PROCESS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09765026
|
Filing Dt:
|
01/17/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
Stress testing for semiconductor devices
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2002
|
Application #:
|
09765035
|
Filing Dt:
|
01/17/2001
|
Title:
|
INTEGRATED FUSE LATCH AND SHIFT REGISTER FOR EFFICIENT PROGRAMMING AND FUSE READOUT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
09765148
|
Filing Dt:
|
01/17/2001
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
Title:
|
FOCUS CONTROL SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09766005
|
Filing Dt:
|
01/18/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR LITHOGRAPHICALLY PRINTING TIGHTLY NESTED AND ISOLATED DEVICE FEATURES USING MULTIPLE MASK EXPOSURES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09766799
|
Filing Dt:
|
01/22/2001
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
Title:
|
REFRESH CONTROL CIRCUIT FOR LOW-POWER SRAM APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2002
|
Application #:
|
09767218
|
Filing Dt:
|
01/22/2001
|
Title:
|
TRI-STATE DYNAMIC BODY CHARGE MODULATION FOR SENSING DEVICES IN SOI RAM APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2002
|
Application #:
|
09768112
|
Filing Dt:
|
01/23/2001
|
Publication #:
|
|
Pub Dt:
|
05/31/2001
| | | | |
Title:
|
Rolling ball connector
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
09768122
|
Filing Dt:
|
01/23/2001
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
Title:
|
METHOD FOR GUARANTEEING A MINIMUM DATA STROBE VALID WINDOW AND A MINIMUM DATA VALID WINDOW FOR DDR MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2001
|
Application #:
|
09768493
|
Filing Dt:
|
01/24/2001
|
Publication #:
|
|
Pub Dt:
|
07/19/2001
| | | | |
Title:
|
Silicon-germanium BiCMOS on SOI
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09768833
|
Filing Dt:
|
01/24/2001
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
Title:
|
APPARATUS AND METHOD FOR WAFER CLEANING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09769170
|
Filing Dt:
|
01/25/2001
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
Title:
|
TRANSFERABLE DEVICE-CONTAINING LAYER FOR SILICON-ON-INSULATOR APPLICATIONS
|
|