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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
04/12/2005
Application #:
10185818
Filing Dt:
06/27/2002
Title:
METHOD FOR DETECTING CMP ENDPOINT IN ACIDIC SLURRIES
2
Patent #:
Issue Dt:
05/03/2005
Application #:
10186814
Filing Dt:
07/01/2002
Publication #:
Pub Dt:
01/01/2004
Title:
METAL SPACER IN SINGLE AND DUAL DAMASCENE PROCESSING
3
Patent #:
Issue Dt:
08/24/2004
Application #:
10187572
Filing Dt:
07/01/2002
Publication #:
Pub Dt:
01/01/2004
Title:
METHOD FOR FABRICATING A NITRIDED SILICON-OXIDE GATE DIELECTRIC
4
Patent #:
Issue Dt:
02/06/2007
Application #:
10188686
Filing Dt:
07/03/2002
Publication #:
Pub Dt:
11/28/2002
Title:
ULTRA THIN, SINGLE PHASE, DIFFUSION BARRIER FOR METAL CONDUCTORS
5
Patent #:
Issue Dt:
08/10/2004
Application #:
10190405
Filing Dt:
07/03/2002
Publication #:
Pub Dt:
11/14/2002
Title:
METHOD AND STRUCTURES FOR DUAL DEPTH OXYGEN LAYERS IN SILICON-ON-INSULATOR PROCESSES
6
Patent #:
Issue Dt:
05/27/2003
Application #:
10191015
Filing Dt:
07/08/2002
Publication #:
Pub Dt:
11/21/2002
Title:
METHOD FOR FORMING INTERCONNECTS ON SEMICONDUCTOR SUBSTRATES AND STRUCTURES FORMED
7
Patent #:
Issue Dt:
05/17/2005
Application #:
10191061
Filing Dt:
07/10/2002
Publication #:
Pub Dt:
11/28/2002
Title:
THERMOPLASTIC ADHESIVE PREFORM FOR HEAT SINK ATTACHMENT
8
Patent #:
Issue Dt:
04/12/2005
Application #:
10191212
Filing Dt:
07/09/2002
Publication #:
Pub Dt:
01/15/2004
Title:
METHOD TO DETECT SYSTEMATIC DEFECTS IN VLSI MANUFACTURING
9
Patent #:
Issue Dt:
02/24/2004
Application #:
10192386
Filing Dt:
07/09/2002
Publication #:
Pub Dt:
12/05/2002
Title:
EFFECTIVE CHANNEL LENGTH CONTROL USING ION IMPLANT FEED FORWARD
10
Patent #:
NONE
Issue Dt:
Application #:
10195170
Filing Dt:
07/11/2002
Publication #:
Pub Dt:
01/15/2004
Title:
Unified simulation system and method for selectively including one or more cores in an integrated circuit simulation model
11
Patent #:
Issue Dt:
03/20/2007
Application #:
10195178
Filing Dt:
07/15/2002
Publication #:
Pub Dt:
02/13/2003
Title:
INCREASED DAMPING OF MAGNETIZATION IN MAGNETIC MATERIALS
12
Patent #:
Issue Dt:
01/11/2005
Application #:
10196611
Filing Dt:
07/16/2002
Publication #:
Pub Dt:
01/22/2004
Title:
USE OF HYDROGEN IMPLANTATION TO IMPROVE MATERIAL PROPERTIES OF SILICON-GERMANIUM-ON-INSULATOR MATERIAL MADE BY THERMAL DIFFUSION
13
Patent #:
Issue Dt:
11/02/2004
Application #:
10196670
Filing Dt:
07/16/2002
Publication #:
Pub Dt:
01/22/2004
Title:
METHOD FOR CREATING STANDARD VHDL TEST ENVIRONMENTS
14
Patent #:
Issue Dt:
03/06/2007
Application #:
10196702
Filing Dt:
07/15/2002
Publication #:
Pub Dt:
01/23/2003
Title:
SIMULATION MONITORS BASED ON TEMPORAL FORMULAS
15
Patent #:
Issue Dt:
09/21/2004
Application #:
10197005
Filing Dt:
07/16/2002
Publication #:
Pub Dt:
01/22/2004
Title:
METHOD AND APPARATUS FOR ACCURATE, MICRO-CONTACT PRINTING
16
Patent #:
Issue Dt:
09/06/2005
Application #:
10197661
Filing Dt:
07/17/2002
Publication #:
Pub Dt:
01/22/2004
Title:
ELECTRONIC DEVICE SUBSTRATE ASSEMBLY WITH MULTILAYER IMPERMEABLE BARRIER AND METHOD OF MAKING
17
Patent #:
Issue Dt:
07/20/2004
Application #:
10199287
Filing Dt:
07/18/2002
Publication #:
Pub Dt:
01/22/2004
Title:
SEMICONDUCTOR WAFER INCLUDING A LOW DIELECTRIC CONSTANT THERMOSETTING POLYMER FILM AND METHOD OF MAKING SAME
18
Patent #:
Issue Dt:
07/19/2005
Application #:
10199788
Filing Dt:
07/19/2002
Publication #:
Pub Dt:
01/22/2004
Title:
METHOD AND APPARATUS OF LOCAL WORD-LINE REDUNDANCY IN CAM
19
Patent #:
Issue Dt:
09/14/2004
Application #:
10200479
Filing Dt:
07/19/2002
Publication #:
Pub Dt:
01/22/2004
Title:
INTERPOSER CAPACITOR BUILT ON SILICON WAFER AND JOINED TO A CERAMIC SUBSTRATE
20
Patent #:
Issue Dt:
08/31/2004
Application #:
10200822
Filing Dt:
07/22/2002
Publication #:
Pub Dt:
01/22/2004
Title:
CONTROL OF BURIED OXIDE IN SIMOX
21
Patent #:
Issue Dt:
05/06/2008
Application #:
10202069
Filing Dt:
07/23/2002
Publication #:
Pub Dt:
12/19/2002
Title:
PROBE STRUCTURE HAVING A PLURALITY OF DISCRETE INSULATED PROBE TIPS PROJECTING FROM A SUPPORT SURFACE, APPARATUS FOR USE THEREOF AND METHODS OF FABRICATION THEREOF
22
Patent #:
Issue Dt:
01/25/2005
Application #:
10202134
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
01/29/2004
Title:
SACRIFICIAL METAL SPACER DAMASCENE PROCESS
23
Patent #:
Issue Dt:
07/18/2006
Application #:
10202301
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
01/29/2004
Title:
SYSTEM AND METHOD FOR SPATIAL, TEMPORAL, ENERGY-RESOLVING DETECTION OF SINGLE PHOTONS
24
Patent #:
Issue Dt:
12/28/2004
Application #:
10202329
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
01/29/2004
Title:
SOI WAFERS WITH 30-100 A BURIED OXIDE (BOX) CREATED BY WAFER BONDING USING 30-100 A THIN OXIDE AS BONDING LAYER
25
Patent #:
Issue Dt:
10/18/2005
Application #:
10202726
Filing Dt:
07/25/2002
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD FOR ENGINEERING CHANGE LAND GRID ARRAY STRUCTURE
26
Patent #:
Issue Dt:
08/31/2004
Application #:
10205102
Filing Dt:
07/25/2002
Publication #:
Pub Dt:
12/05/2002
Title:
METHOD AND STRUCTURE FOR REPAIRING OR MODIFYING SURFACE CONNECTIONS ON CIRCUIT BOARDS
27
Patent #:
Issue Dt:
11/16/2004
Application #:
10205136
Filing Dt:
07/25/2002
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD OF MAKING A CIRCUITIZED SUBSTRATE AND THE RESULTANT CIRCUITIZED SUBSTRATE
28
Patent #:
Issue Dt:
09/28/2004
Application #:
10205143
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
11/28/2002
Title:
METHOD FOR MAKING MULTIPLE THRESHOLD VOLTAGE FET USING MULTIPLE WORK-FUNCTION GATE MATERIALS
29
Patent #:
Issue Dt:
12/09/2003
Application #:
10205278
Filing Dt:
07/24/2002
Title:
LOW DIELECTRIC CONSTANT POLYMER AND MONOMERS USED IN THEIR FORMATION
30
Patent #:
Issue Dt:
12/16/2003
Application #:
10205528
Filing Dt:
07/25/2002
Publication #:
Pub Dt:
05/01/2003
Title:
ACTIVE WELL SCHEMES FOR SOI TECHNOLOGY
31
Patent #:
Issue Dt:
05/25/2004
Application #:
10207352
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
ENHANCED T-GATE STRUCTURE FOR MODULATION DOPED FIELD EFFECT TRANSISTORS
32
Patent #:
Issue Dt:
07/27/2004
Application #:
10207366
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
MULTIPLE SUBARRAY DRAM HAVING A SINGLE SHARED SENSE AMPLIFIER
33
Patent #:
Issue Dt:
05/25/2004
Application #:
10207509
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/02/2003
Title:
APPARATUS FOR CLEANING FILTERS
34
Patent #:
Issue Dt:
01/25/2005
Application #:
10209144
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
02/05/2004
Title:
METHOD AND APPARATUS FOR DETECTING DEVICES THAT CAN LATCHUP
35
Patent #:
Issue Dt:
12/14/2004
Application #:
10210173
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
03/27/2003
Title:
METHOD FOR FORMING A POROUS DIELECTRIC MATERIAL LAYER IN A SEMICONDUCTOR DEVICE AND DEVICE FORMED
36
Patent #:
Issue Dt:
12/09/2003
Application #:
10210631
Filing Dt:
07/30/2002
Title:
LOW IMPEDANCE POWER DISTRIBUTION STRUCTURE FOR A SEMICONDUCTOR CHIP PACKAGE
37
Patent #:
Issue Dt:
06/15/2004
Application #:
10210632
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
02/05/2004
Title:
METHOD OF FABRICATING A PATTERNED SOI EMBEDDED DRAM/EDRAM HAVING A VERTICAL DEVICE CELL AND DEVICE FORMED THEREBY
38
Patent #:
Issue Dt:
10/12/2004
Application #:
10212938
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
02/05/2004
Title:
METHOD FOR BLOCKING IMPLANTS FROM THE GATE OF AN ELECTRONIC DEVICE VIA PLANARIZING FILMS
39
Patent #:
Issue Dt:
11/11/2003
Application #:
10213646
Filing Dt:
08/06/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD AND STRUCTURE FOR PRODUCING Z-AXIS INTERCONNECTION ASSEMBLY OF PRINTED WIRING BOARD ELEMENTS
40
Patent #:
Issue Dt:
09/07/2004
Application #:
10213882
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHODOLOGY AND APPARATUS USING REAL-TIME OPTICAL SIGNAL FOR WAFER-LEVEL DEVICE DIELECTRICAL RELIABILITY STUDIES
41
Patent #:
Issue Dt:
11/30/2004
Application #:
10214510
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
TRIPLE OXIDE FILL FOR TRENCH ISOLATION
42
Patent #:
Issue Dt:
11/08/2005
Application #:
10214951
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
DISCRETE NANO-TEXTURED STRUCTURES IN BIOMOLECULAR ARRAYS, AND METHOD OF USE
43
Patent #:
Issue Dt:
10/05/2004
Application #:
10215121
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
SEMICONDUCTOR DEVICE HAVING AMORPHOUS BARRIER LAYER FOR COPPER METALLURGY
44
Patent #:
Issue Dt:
06/24/2003
Application #:
10217233
Filing Dt:
08/09/2002
Title:
INTEGRATED CIRCUIT PACKAGING WITH TAPERED STRIPLINES OF CONSTANT IMPEDANCE
45
Patent #:
Issue Dt:
10/19/2004
Application #:
10217360
Filing Dt:
08/09/2002
Publication #:
Pub Dt:
02/12/2004
Title:
MASK CLAMPING DEVICE
46
Patent #:
Issue Dt:
05/17/2005
Application #:
10217674
Filing Dt:
08/12/2002
Publication #:
Pub Dt:
01/09/2003
Title:
HIGH PERFORMANCE DENSE WIRE FOR PRINTED CIRCUIT BOARD
47
Patent #:
Issue Dt:
01/20/2004
Application #:
10217822
Filing Dt:
08/12/2002
Title:
MULTI-STEP TRANSMISSION LINE FOR MULTILAYER PACKAGING
48
Patent #:
Issue Dt:
09/09/2003
Application #:
10218292
Filing Dt:
08/14/2002
Title:
INTERCONNECT STRUCTURES CONTAINING STRESS ADJUSTMENT CAP LAYER
49
Patent #:
Issue Dt:
06/03/2003
Application #:
10218789
Filing Dt:
08/14/2002
Publication #:
Pub Dt:
02/20/2003
Title:
MULTI-PLATE CAPACITOR STRUCTURE
50
Patent #:
Issue Dt:
12/14/2004
Application #:
10225860
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
01/02/2003
Title:
STRESS-RELIEVING HEATSINK STRUCTURE AND METHOD OF ATTACHMENT TO AN ELECTRONIC PACKAGE
51
Patent #:
Issue Dt:
04/27/2004
Application #:
10227404
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
STRUCTURE AND METHOD OF FABRICATING EMBEDDED DRAM HAVING A VERTICAL DEVICE ARRAY AND A BORDERED BITLINE CONTACT
52
Patent #:
Issue Dt:
11/23/2004
Application #:
10227926
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
EVANESCENT WAVE TUNNELING OPTICAL SWITCH AND NETWORK
53
Patent #:
Issue Dt:
01/16/2007
Application #:
10227995
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
CONCURRENT FIN-FET AND THICK-BODY DEVICE FABRICATION
54
Patent #:
Issue Dt:
05/18/2004
Application #:
10228142
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
DIRECT READ OF DRAM CELL USING HIGH TRANSFER RATIO
55
Patent #:
Issue Dt:
01/30/2007
Application #:
10235007
Filing Dt:
09/03/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND APPARATUS FOR REMOVING KNOWN GOOD DIE
56
Patent #:
Issue Dt:
06/08/2004
Application #:
10235008
Filing Dt:
09/03/2002
Publication #:
Pub Dt:
03/04/2004
Title:
LOW STRAIN CHIP REMOVAL APPARATUS
57
Patent #:
Issue Dt:
11/02/2004
Application #:
10235147
Filing Dt:
09/05/2002
Publication #:
Pub Dt:
03/11/2004
Title:
METHOD TO CONTROL DEVICE THRESHOLD OF SOI MOSFET'S
58
Patent #:
Issue Dt:
12/16/2003
Application #:
10235169
Filing Dt:
09/05/2002
Title:
POLYSILICON BACK-GATED SOI MOSFET FOR DYNAMIC THRESHOLD VOLTAGE CONTROL
59
Patent #:
Issue Dt:
11/23/2004
Application #:
10235435
Filing Dt:
09/04/2002
Publication #:
Pub Dt:
03/04/2004
Title:
REDUNDANT CONFIGURABLE VCSEL LASER ARRAY OPTICAL LIGHT SOURCE
60
Patent #:
Issue Dt:
04/13/2004
Application #:
10238746
Filing Dt:
09/10/2002
Publication #:
Pub Dt:
01/16/2003
Title:
METHOD OF FABRICATING INTEGRATED COIL INDUCTORS FOR IC DEVICES
61
Patent #:
NONE
Issue Dt:
Application #:
10241137
Filing Dt:
09/11/2002
Publication #:
Pub Dt:
03/11/2004
Title:
Mehod for forming a tunable deep-ultraviolet dielectric antireflection layer for image transfer processing
62
Patent #:
Issue Dt:
08/03/2004
Application #:
10241937
Filing Dt:
09/11/2002
Publication #:
Pub Dt:
03/11/2004
Title:
LOW SILICON-OUTGASSING RESIST FOR BILAYER LITHOGRAPHY
63
Patent #:
Issue Dt:
09/13/2005
Application #:
10241979
Filing Dt:
09/11/2002
Publication #:
Pub Dt:
03/20/2003
Title:
DATA PROCESSING SYSTEM AND DATA PROCESSING METHOD
64
Patent #:
Issue Dt:
02/27/2007
Application #:
10241994
Filing Dt:
09/11/2002
Publication #:
Pub Dt:
03/11/2004
Title:
ELECTRONIC PACKAGE WITH THERMALLY-ENHANCED LID
65
Patent #:
Issue Dt:
07/27/2004
Application #:
10242235
Filing Dt:
09/12/2002
Publication #:
Pub Dt:
03/18/2004
Title:
METHOD AND SYSTEM FOR POWER NODE CURRENT WAVEFORM MODELING
66
Patent #:
Issue Dt:
06/24/2003
Application #:
10245461
Filing Dt:
09/17/2002
Publication #:
Pub Dt:
03/20/2003
Title:
USER CONFIGURABLE MULTIVARIATE TIME SERIES REDUCTION TOOL CONTROL METHOD
67
Patent #:
Issue Dt:
12/23/2003
Application #:
10246110
Filing Dt:
09/18/2002
Publication #:
Pub Dt:
01/23/2003
Title:
HIGH-DIELECTRIC CONSTANT INSULATORS FOR FEOL CAPACITORS
68
Patent #:
Issue Dt:
11/11/2003
Application #:
10246136
Filing Dt:
09/18/2002
Publication #:
Pub Dt:
01/30/2003
Title:
ON CHIP ALPHA-PARTICLE DETECTOR
69
Patent #:
Issue Dt:
07/13/2004
Application #:
10246147
Filing Dt:
09/17/2002
Publication #:
Pub Dt:
03/18/2004
Title:
METHOD TO OBTAIN HIGH DENSITY SIGNAL WIRES WITH LOW RESISTANCE IN AN ELECTRONIC PACKAGE
70
Patent #:
Issue Dt:
03/23/2004
Application #:
10246252
Filing Dt:
09/18/2002
Publication #:
Pub Dt:
01/23/2003
Title:
OXYNITRIDE SHALLOW TRENCH ISOLATION AND METHOD OF FORMATION
71
Patent #:
Issue Dt:
09/23/2003
Application #:
10247415
Filing Dt:
09/19/2002
Publication #:
Pub Dt:
08/28/2003
Title:
SYSTEM FOR PROGRAMMING FUSE STRUCTURE BY ELECTROMIGRATION OF SILICIDE ENHANCED BY CREATING TEMPERATURE GRADIENT
72
Patent #:
Issue Dt:
09/28/2004
Application #:
10248019
Filing Dt:
12/11/2002
Title:
SUBLITHOGRAPHIC PATTERNING USING MICROTRENCHING
73
Patent #:
NONE
Issue Dt:
Application #:
10248300
Filing Dt:
01/07/2003
Publication #:
Pub Dt:
07/08/2004
Title:
Reflective mask structure and method of formation
74
Patent #:
Issue Dt:
01/10/2006
Application #:
10248302
Filing Dt:
01/07/2003
Publication #:
Pub Dt:
07/08/2004
Title:
SIGNAL BALANCING BETWEEN VOLTAGE DOMAINS
75
Patent #:
Issue Dt:
07/24/2007
Application #:
10248303
Filing Dt:
01/07/2003
Publication #:
Pub Dt:
07/08/2004
Title:
A METHOD AND APPARATUS FOR DYNAMICALLY ALLOCATING PROCESSORS
76
Patent #:
NONE
Issue Dt:
Application #:
10248352
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
07/15/2004
Title:
METHOD AND APPARATUS FOR COMPACT SCAN TESTING
77
Patent #:
Issue Dt:
01/06/2004
Application #:
10248452
Filing Dt:
01/21/2003
Title:
SINGLE AND MULTILEVEL REWORK
78
Patent #:
NONE
Issue Dt:
Application #:
10248658
Filing Dt:
02/05/2003
Publication #:
Pub Dt:
10/23/2003
Title:
A DUAL STACKED METAL-INSULATOR-METAL (MIM) CAPACITOR
79
Patent #:
Issue Dt:
08/02/2005
Application #:
10248696
Filing Dt:
02/10/2003
Publication #:
Pub Dt:
08/12/2004
Title:
POWER SWITCH CIRCUIT SIZING TECHNIQUE
80
Patent #:
Issue Dt:
08/17/2004
Application #:
10248815
Filing Dt:
02/21/2003
Publication #:
Pub Dt:
08/26/2004
Title:
METHOD OF OPTICAL PROXIMITY CORRECTION WITH SUB-RESOLUTION ASSISTS
81
Patent #:
Issue Dt:
10/12/2004
Application #:
10248819
Filing Dt:
02/21/2003
Publication #:
Pub Dt:
08/26/2004
Title:
CMOS PERFORMANCE ENHANCEMENT USING LOCALIZED VOIDS AND EXTENDED DEFECTS
82
Patent #:
Issue Dt:
02/27/2007
Application #:
10248838
Filing Dt:
02/24/2003
Publication #:
Pub Dt:
08/26/2004
Title:
MACHINE CODE BUILDER DERIVED POWER CONSUMPTION REDUCTION
83
Patent #:
Issue Dt:
11/27/2007
Application #:
10248853
Filing Dt:
02/25/2003
Publication #:
Pub Dt:
02/19/2004
Title:
DEVICE MODELING FOR PROXIMITY EFFECTS
84
Patent #:
Issue Dt:
10/12/2004
Application #:
10249184
Filing Dt:
03/20/2003
Publication #:
Pub Dt:
07/17/2003
Title:
PROCESS FOR PASSIVATING THE SEMICONDUCTOR-DIELECTRIC INTERFACE OF A MOS DEVICE AND MOS DEVICE FORMED THEREBY
85
Patent #:
Issue Dt:
11/30/2004
Application #:
10249273
Filing Dt:
03/27/2003
Publication #:
Pub Dt:
09/30/2004
Title:
SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY DEVICE HAVING MEMORY COMMAND CANCEL FUNCTION
86
Patent #:
Issue Dt:
01/31/2006
Application #:
10249291
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
HIGH SPEED CLOCK DIVIDER WITH SYNCHRONOUS PHASE START-UP OVER PHYSICALLY DISTRIBUTED SPACE
87
Patent #:
NONE
Issue Dt:
Application #:
10249295
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
CMOS DEVICE INTEGRATION FOR LOW EXTERNAL RESISTANCE
88
Patent #:
Issue Dt:
09/14/2004
Application #:
10249296
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
PRESERVING TEOS HARD MASK USING COR FOR RAISED SOURCE-DRAIN INCLUDING REMOVABLE/DISPOSABLE SPACER
89
Patent #:
Issue Dt:
11/30/2004
Application #:
10249305
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
A METHOD OF SELECTIVE PLATING ON A SUBSTRATE
90
Patent #:
Issue Dt:
05/04/2004
Application #:
10249311
Filing Dt:
03/31/2003
Title:
TRI-STATE DELAY BOOST
91
Patent #:
Issue Dt:
01/20/2009
Application #:
10249331
Filing Dt:
04/01/2003
Publication #:
Pub Dt:
10/07/2004
Title:
METHOD FOR PERFORMING A COMMAND CANCEL FUNCTION IN A DRAM
92
Patent #:
Issue Dt:
06/08/2004
Application #:
10249347
Filing Dt:
04/02/2003
Title:
GAIN CELL STRUCTURE WITH DEEP TRENCH CAPACITOR
93
Patent #:
Issue Dt:
01/03/2006
Application #:
10249382
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
10/07/2004
Title:
WEDGEBOND PADS HAVING A NONPLANAR SURFACE STRUCTURE
94
Patent #:
Issue Dt:
06/21/2005
Application #:
10249406
Filing Dt:
04/07/2003
Publication #:
Pub Dt:
10/07/2004
Title:
METHOD OF CREATING DEEP TRENCH CAPACITOR USING A P+ METAL ELECTRODE
95
Patent #:
Issue Dt:
05/31/2005
Application #:
10249429
Filing Dt:
04/08/2003
Publication #:
Pub Dt:
10/14/2004
Title:
FAST FIRING FLATTENING METHOD AND APPARATUS FOR SINTERED MULTILAYER CERAMIC ELECTRONIC SUBSTRATES
96
Patent #:
Issue Dt:
03/28/2006
Application #:
10249509
Filing Dt:
04/15/2003
Publication #:
Pub Dt:
10/21/2004
Title:
METHOD OF VERIFYING THE PLACEMENT OF SUB-RESOLUTION ASSIST FEATURES IN A PHOTOMASK LAYOUT
97
Patent #:
Issue Dt:
05/10/2005
Application #:
10249545
Filing Dt:
04/17/2003
Publication #:
Pub Dt:
10/21/2004
Title:
REFERENCE CURRENT GENERATION SYSTEM AND METHOD
98
Patent #:
Issue Dt:
09/06/2005
Application #:
10249550
Filing Dt:
04/17/2003
Publication #:
Pub Dt:
06/03/2004
Title:
PREVENTION OF TA2O5 MIM CAP SHORTING IN THE BEOL ANNEAL CYCLES
99
Patent #:
Issue Dt:
08/24/2004
Application #:
10249563
Filing Dt:
04/18/2003
Title:
BICMOS INTEGRATION SCHEME WITH RAISED EXTRINSIC BASE
100
Patent #:
Issue Dt:
09/05/2006
Application #:
10249568
Filing Dt:
04/19/2003
Publication #:
Pub Dt:
10/21/2004
Title:
WIRELESS COMMUNICATION SYSTEM WITHIN A SYSTEM ON A CHIP
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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