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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
03/15/2005
Application #:
10348541
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
09/11/2003
Title:
SCANNING HEAT FLOW PROBE
2
Patent #:
Issue Dt:
03/30/2004
Application #:
10351919
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
08/07/2003
Title:
MICRO-STRUCTURES AND METHODS FOR THEIR MANUFACTURE
3
Patent #:
NONE
Issue Dt:
Application #:
10352628
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
01/22/2004
Title:
Porous low-dielectric constant materials for use in electronic devices
4
Patent #:
Issue Dt:
03/23/2004
Application #:
10353119
Filing Dt:
01/28/2003
Publication #:
Pub Dt:
06/19/2003
Title:
SAVING CONTENT ADDRESSABLE MEMORY POWER THROUGH CONDITIONAL COMPARISONS
5
Patent #:
Issue Dt:
03/22/2005
Application #:
10353900
Filing Dt:
01/28/2003
Title:
INTEGRATED LITHOGRAPHIC PRINT AND DETECTION MODEL FOR OPTICAL CD
6
Patent #:
Issue Dt:
12/04/2007
Application #:
10357534
Filing Dt:
02/03/2003
Publication #:
Pub Dt:
08/14/2003
Title:
SCALABLE LINK-LEVEL FLOW-CONTROL FOR A SWITCHING DEVICE
7
Patent #:
Issue Dt:
07/12/2005
Application #:
10358431
Filing Dt:
02/04/2003
Publication #:
Pub Dt:
08/05/2004
Title:
ELECTRONIC PACKAGE REPAIR PROCESS
8
Patent #:
Issue Dt:
09/27/2005
Application #:
10361228
Filing Dt:
02/10/2003
Publication #:
Pub Dt:
06/26/2003
Title:
SELF-ALIGNED CONTACT AREAS FOR SIDEWALL IMAGE TRANSFER FORMED CONDUCTORS
9
Patent #:
Issue Dt:
05/17/2005
Application #:
10361659
Filing Dt:
02/10/2003
Publication #:
Pub Dt:
06/26/2003
Title:
METHOD OF MAKING AN INTERPOSER SUB-ASSEMBLY IN A PRINTED WIRING BOARD
10
Patent #:
Issue Dt:
05/25/2004
Application #:
10366149
Filing Dt:
02/13/2003
Publication #:
Pub Dt:
08/14/2003
Title:
CARBON-GRADED LAYER FOR IMPROVED ADHESION OF LOW-K DIELECTRICS TO SILICON SUBSTRATES
11
Patent #:
Issue Dt:
06/23/2009
Application #:
10366439
Filing Dt:
02/13/2003
Publication #:
Pub Dt:
08/19/2004
Title:
METHOD AND SYSTEM FOR MODELING LOGICAL CIRCUIT BLOCKS INCLUDING TRANSISTOR GATE CAPACITANCE LOADING EFFECTS
12
Patent #:
Issue Dt:
08/08/2006
Application #:
10366780
Filing Dt:
02/13/2003
Publication #:
Pub Dt:
08/07/2003
Title:
NITROGEN-CONTAINING POLYMERS AS POROGENS IN THE PREPARATION OF HIGHLY POROUS, LOW DIELECTRIC CONSTANT MATERIALS
13
Patent #:
Issue Dt:
08/03/2004
Application #:
10369778
Filing Dt:
02/19/2003
Publication #:
Pub Dt:
07/03/2003
Title:
METHOD FOR BONDING HEAT SINKS TO OVERMOLDS AND DEVICE FORMED THEREBY
14
Patent #:
Issue Dt:
11/02/2004
Application #:
10371270
Filing Dt:
02/21/2003
Publication #:
Pub Dt:
08/14/2003
Title:
DEFECT-FREE DIELECTRIC COATINGS AND PREPARATION THEREOF USING POLYMERIC NITROGENOUS POROGENS
15
Patent #:
Issue Dt:
09/21/2004
Application #:
10374395
Filing Dt:
02/26/2003
Publication #:
Pub Dt:
08/14/2003
Title:
SEMICONDUCTOR DEVICE INCORPORATING ELEMENTS FORMED OF REFRACTORY METAL-SILICON-NITROGEN AND METHOD FOR FABRICATION
16
Patent #:
NONE
Issue Dt:
Application #:
10374866
Filing Dt:
02/25/2003
Publication #:
Pub Dt:
08/26/2004
Title:
Shallow trench isolation structure for strained Si on SiGe
17
Patent #:
NONE
Issue Dt:
Application #:
10375333
Filing Dt:
02/27/2003
Publication #:
Pub Dt:
08/28/2003
Title:
Electrically conductive filled through holes
18
Patent #:
NONE
Issue Dt:
Application #:
10375608
Filing Dt:
02/27/2003
Publication #:
Pub Dt:
08/28/2003
Title:
Anti-spacer structure for improved gate activation
19
Patent #:
Issue Dt:
03/20/2007
Application #:
10377359
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
METHOD, APPARATUS AND PROGRAM STORAGE DEVICE FOR PROVIDING DATA PATH OPTIMIZATION
20
Patent #:
Issue Dt:
11/09/2004
Application #:
10377388
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
MULTIPLE GATE MOSFET STRUCTURE WITH STRAINED SI FIN BODY
21
Patent #:
Issue Dt:
11/08/2005
Application #:
10378579
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
PITCH-BASED SUBRESOLUTION ASSIST FEATURE DESIGN
22
Patent #:
Issue Dt:
12/16/2003
Application #:
10382736
Filing Dt:
03/05/2003
Publication #:
Pub Dt:
09/04/2003
Title:
DAMASCENE CAPACITOR HAVING A RECESSED PLATE
23
Patent #:
Issue Dt:
06/01/2004
Application #:
10382894
Filing Dt:
03/06/2003
Publication #:
Pub Dt:
08/14/2003
Title:
HIGH DIELECTRIC CONSTANT MATERIALS FORMING COMPONENTS OF DRAM SUCH AS DEEP-TRENCH CAPACITORS AND GATE DIELECTRIC (INSULATORS) FOR SUPPORT CIRCUITS
24
Patent #:
NONE
Issue Dt:
Application #:
10383857
Filing Dt:
03/06/2003
Publication #:
Pub Dt:
09/09/2004
Title:
Method, system, and product for determining loop inductance of an entire integrated circuit package
25
Patent #:
Issue Dt:
05/15/2007
Application #:
10384002
Filing Dt:
03/07/2003
Publication #:
Pub Dt:
08/21/2003
Title:
FLIP FERAM CELL AND METHOD TO FORM SAME
26
Patent #:
Issue Dt:
02/21/2006
Application #:
10388538
Filing Dt:
03/17/2003
Publication #:
Pub Dt:
09/23/2004
Title:
TUNABLE THIN FILM OPTICAL DEVICES AND FABRICATION METHODS FOR TUNABLE THIN FILM OPTICAL DEVICES
27
Patent #:
Issue Dt:
10/30/2007
Application #:
10390801
Filing Dt:
03/18/2003
Publication #:
Pub Dt:
12/15/2005
Title:
ULTRA LOW K (ULK) SICOH FILM AND METHOD
28
Patent #:
Issue Dt:
08/08/2006
Application #:
10392617
Filing Dt:
03/20/2003
Publication #:
Pub Dt:
09/23/2004
Title:
ELECTRONIC PACKAGE WITH OPTIMIZED CIRCUITIZATION PATTERN
29
Patent #:
Issue Dt:
01/23/2007
Application #:
10392977
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
09/23/2004
Title:
METHOD OF PREPARING A CONJUGATED MOLECULAR ASSEMBLY
30
Patent #:
Issue Dt:
11/07/2006
Application #:
10392983
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
09/23/2004
Title:
ELECTRONIC DEVICE INCLUDING A SELF-ASSEMBLED MONOLAYER, AND A METHOD OF FABRICATING THE SAME
31
Patent #:
Issue Dt:
08/23/2005
Application #:
10395944
Filing Dt:
03/24/2003
Publication #:
Pub Dt:
09/25/2003
Title:
METHOD OF FABRICATING PRINTED CIRCUIT BOARD WITH MIXED METALLURGY PADS
32
Patent #:
Issue Dt:
12/14/2004
Application #:
10396274
Filing Dt:
03/25/2003
Publication #:
Pub Dt:
10/02/2003
Title:
LOW-K INTERCONNECT STRUCTURE COMPRISED OF A MULTILAYER OF SPIN-ON POROUS DIELECTRICS
33
Patent #:
Issue Dt:
10/31/2006
Application #:
10401564
Filing Dt:
03/31/2003
Publication #:
Pub Dt:
09/30/2004
Title:
THERMAL MEMORY CELL AND MEMORY DEVICE INCLUDING THE THERMAL MEMORY CELL
34
Patent #:
Issue Dt:
04/27/2004
Application #:
10403239
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
10/30/2003
Title:
CERAMIC STRUCTURE USING A SUPPORT SHEET
35
Patent #:
Issue Dt:
04/19/2005
Application #:
10403626
Filing Dt:
03/31/2003
Publication #:
Pub Dt:
10/30/2003
Title:
MACRO DESIGN TECHNIQUES TO ACCOMMODATE CHIP LEVEL WIRING AND CIRCUIT PLACEMENT ACROSS THE MACRO
36
Patent #:
Issue Dt:
01/11/2005
Application #:
10406888
Filing Dt:
04/04/2003
Publication #:
Pub Dt:
10/07/2004
Title:
METHOD OF REDUCING PITCH ON SEMICONDUCTOR WAFER
37
Patent #:
NONE
Issue Dt:
Application #:
10408200
Filing Dt:
04/04/2003
Publication #:
Pub Dt:
03/24/2005
Title:
High density integrated circuit apparatus, test probe and methods of use thereof
38
Patent #:
Issue Dt:
09/18/2007
Application #:
10408339
Filing Dt:
04/07/2003
Publication #:
Pub Dt:
10/07/2004
Title:
ADHESION LAYER FOR PT ON SIO2
39
Patent #:
Issue Dt:
05/18/2004
Application #:
10408570
Filing Dt:
04/07/2003
Publication #:
Pub Dt:
09/11/2003
Title:
NONOPARTICLES FORMED WITH RIGID CONNECTOR COMPOUNDS
40
Patent #:
Issue Dt:
11/24/2009
Application #:
10408813
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
VOLUME WARPING FOR ADAPTIVE ISOSURFACE EXTRACTION
41
Patent #:
Issue Dt:
12/23/2003
Application #:
10409739
Filing Dt:
04/09/2003
Publication #:
Pub Dt:
11/13/2003
Title:
METHOD OF FORMING AN APPARATUS TO REDUCE THERMAL FATIGUE STRESS ON FLIP CHIP SOLDER CONNECTIONS
42
Patent #:
Issue Dt:
08/30/2005
Application #:
10409778
Filing Dt:
04/08/2003
Publication #:
Pub Dt:
09/11/2003
Title:
INCREASED CAPACITANCE TRENCH CAPACITOR
43
Patent #:
Issue Dt:
10/10/2006
Application #:
10411136
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/14/2004
Title:
SERVO SYSTEM FOR A TWO-DIMENSIONAL MICRO-ELECTROMECHANICAL SYSTEM (MEMS)-BASED SCANNER AND METHOD THEREFOR
44
Patent #:
Issue Dt:
07/13/2004
Application #:
10411727
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/16/2003
Title:
DAMASCENE DOUBLE-GATE FET
45
Patent #:
Issue Dt:
09/14/2004
Application #:
10411906
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/30/2003
Title:
GREENSHEET CARRIERS AND PROCESSING THEREOF
46
Patent #:
Issue Dt:
01/20/2004
Application #:
10413087
Filing Dt:
04/14/2003
Publication #:
Pub Dt:
11/06/2003
Title:
DUAL LAYER ETCH STOP BARRIER
47
Patent #:
Issue Dt:
07/04/2006
Application #:
10413614
Filing Dt:
04/14/2003
Publication #:
Pub Dt:
10/14/2004
Title:
ABIST ADDRESS GENERATION
48
Patent #:
Issue Dt:
06/01/2004
Application #:
10414538
Filing Dt:
04/15/2003
Title:
PRINTED WIRING BOARD THICKNESS CONTROL FOR COMPRESSION CONNECTORS USED IN ELECTRONIC PACKAGING
49
Patent #:
Issue Dt:
12/06/2005
Application #:
10419888
Filing Dt:
04/22/2003
Publication #:
Pub Dt:
11/27/2003
Title:
Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned CoSi2 on raised source drain Si/SiGe device
50
Patent #:
Issue Dt:
11/16/2004
Application #:
10420063
Filing Dt:
04/21/2003
Publication #:
Pub Dt:
02/12/2004
Title:
SCANNING HEAT FLOW PROBE
51
Patent #:
Issue Dt:
05/25/2004
Application #:
10421272
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
10/09/2003
Title:
PRINTED WIRING BOARD
52
Patent #:
Issue Dt:
02/03/2009
Application #:
10421306
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
10/28/2004
Title:
NONLITHOGRAPHIC METHOD TO PRODUCE MASKS BY SELECTIVE REACTION, ARTICLES PRODUCED, AND COMPOSITION FOR SAME
53
Patent #:
NONE
Issue Dt:
Application #:
10421355
Filing Dt:
04/24/2003
Publication #:
Pub Dt:
05/06/2004
Title:
Nonlithographic method to produce masks by selective reaction, articles produced, and composition for same
54
Patent #:
Issue Dt:
09/26/2006
Application #:
10421394
Filing Dt:
04/22/2003
Publication #:
Pub Dt:
10/28/2004
Title:
PATTERNED SUBSTRATE WITH HYDROPHILIC/HYDROPHOBIC CONTRAST, AND METHOD OF USE
55
Patent #:
Issue Dt:
02/24/2004
Application #:
10421963
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
10/23/2003
Title:
METHOD AND APPARATUS FOR ADJUSTING CONTROL CIRCUIT PULL-UP MARGIN FOR CONTENT ADDRESSABLE MEMORY (CAM)
56
Patent #:
Issue Dt:
09/28/2004
Application #:
10421969
Filing Dt:
04/23/2003
Publication #:
Pub Dt:
11/13/2003
Title:
METHOD FOR FORMING A RETROGRADE IMPLANT
57
Patent #:
Issue Dt:
03/07/2006
Application #:
10422665
Filing Dt:
04/24/2003
Publication #:
Pub Dt:
10/23/2003
Title:
SOI DEVICE WITH REDUCED JUNCTION CAPACITANCE
58
Patent #:
Issue Dt:
01/31/2006
Application #:
10422794
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
10/30/2003
Title:
PRODUCTION OF METAL INSULATOR METAL (MIM) STRUCTURES USING ANODIZING PROCESS
59
Patent #:
Issue Dt:
12/19/2006
Application #:
10424673
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
10/28/2004
Title:
FLUORINATED VINYL ETHERS, COPOLYMERS THEREOF, AND USE IN LITHOGRAPHIC PHOTORESIST COMPOSITIONS
60
Patent #:
Issue Dt:
02/03/2004
Application #:
10424840
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
10/23/2003
Title:
GROOVED POLISHING PADS AND METHODS OF USE
61
Patent #:
Issue Dt:
11/02/2004
Application #:
10425270
Filing Dt:
04/29/2003
Publication #:
Pub Dt:
10/30/2003
Title:
EPITAXIAL BASE BIPOLAR TRANSISTOR WITH RAISED EXTRINSIC BASE
62
Patent #:
NONE
Issue Dt:
Application #:
10425398
Filing Dt:
04/28/2003
Publication #:
Pub Dt:
10/28/2004
Title:
Embeddable method and apparatus for functional pattern testing of repeatable program instruction-driven logic circuits via signal signature generation
63
Patent #:
Issue Dt:
09/28/2004
Application #:
10426336
Filing Dt:
04/30/2003
Publication #:
Pub Dt:
10/30/2003
Title:
VERTICAL THERMAL NITRIDE MASK (ANTI-COLLAR) AND PROCESSING THEREOF
64
Patent #:
Issue Dt:
03/23/2004
Application #:
10426337
Filing Dt:
04/30/2003
Publication #:
Pub Dt:
10/30/2003
Title:
RELAXED SIGE LAYERS ON SI OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALING
65
Patent #:
NONE
Issue Dt:
Application #:
10428220
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
10/30/2003
Title:
Nitrogen-rich barrier layer and structures formed
66
Patent #:
Issue Dt:
11/02/2004
Application #:
10428705
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
01/15/2004
Title:
SELF-ALIGNED DOG-BONE STRUCTURE FOR FINFET APPLICATIONS AND METHODS TO FABRICATE THE SAME
67
Patent #:
NONE
Issue Dt:
Application #:
10428903
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
10/09/2003
Title:
Nitrogen-rich barrier layer and structures formed
68
Patent #:
Issue Dt:
12/28/2004
Application #:
10428960
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
11/04/2004
Title:
OPTICAL ASSEMBLIES FOR TRANSMITTING AND MANIPULATING OPTICAL BEAMS
69
Patent #:
Issue Dt:
09/21/2004
Application #:
10430148
Filing Dt:
05/06/2003
Publication #:
Pub Dt:
10/23/2003
Title:
PRIORITY COLORING FOR VLSI DESIGNS
70
Patent #:
Issue Dt:
02/03/2004
Application #:
10430671
Filing Dt:
05/06/2003
Publication #:
Pub Dt:
10/30/2003
Title:
HIGH RELIABILITY CONTENT-ADDRESSABLE MEMORY USING SHADOW CONTENT-ADDRESSABLE MEMORY
71
Patent #:
Issue Dt:
09/20/2005
Application #:
10430989
Filing Dt:
05/06/2003
Publication #:
Pub Dt:
10/23/2003
Title:
POROUS POWER AND GROUND PLANES FOR REDUCED PCB DELAMINATION AND BETTER RELIABILITY
72
Patent #:
Issue Dt:
10/19/2004
Application #:
10431177
Filing Dt:
05/08/2003
Publication #:
Pub Dt:
09/18/2003
Title:
BALL GRID ARRAY MODULE
73
Patent #:
Issue Dt:
09/28/2004
Application #:
10434999
Filing Dt:
05/09/2003
Publication #:
Pub Dt:
07/01/2004
Title:
METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES
74
Patent #:
Issue Dt:
02/21/2006
Application #:
10435824
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
METHOD OF ACHIEVING TIMING CLOSURE IN DIGITAL INTEGRATED CIRCUITS BY OPTIMIZING INDIVIDUAL MACROS
75
Patent #:
Issue Dt:
01/02/2007
Application #:
10435842
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
BUILT-IN SELF TEST SYSTEM AND METHOD
76
Patent #:
NONE
Issue Dt:
Application #:
10435973
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
Method for verification of hardware designs with multiple asynchronous frequency domains
77
Patent #:
Issue Dt:
03/07/2006
Application #:
10436213
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
METHOD OF OPTIMIZING AND ANALYZING SELECTED PORTIONS OF A DIGITAL INTEGRATED CIRCUIT
78
Patent #:
Issue Dt:
09/07/2004
Application #:
10436229
Filing Dt:
05/12/2003
Title:
HIGH PERFORMANCE DUAL-STAGE SENSE AMPLIFIER CIRCUIT
79
Patent #:
Issue Dt:
03/15/2005
Application #:
10436432
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
11/18/2004
Title:
COUPLED BODY CONTACTS FOR SOI DIFFERENTIAL CIRCUITS
80
Patent #:
Issue Dt:
11/09/2004
Application #:
10437208
Filing Dt:
05/13/2003
Publication #:
Pub Dt:
10/23/2003
Title:
UNIQUE FEATURE DESIGN ENABLING STRUCTURAL INTEGRITY FOR ADVANCED LOW K SEMICONDUCTOR CHIPS
81
Patent #:
NONE
Issue Dt:
Application #:
10437370
Filing Dt:
05/13/2003
Publication #:
Pub Dt:
10/23/2003
Title:
Structure and method to preserve STI during etching
82
Patent #:
Issue Dt:
03/25/2008
Application #:
10438947
Filing Dt:
05/15/2003
Publication #:
Pub Dt:
10/23/2003
Title:
WAFER SCALE THIN FILM PACKAGE
83
Patent #:
Issue Dt:
12/13/2005
Application #:
10439724
Filing Dt:
05/16/2003
Publication #:
Pub Dt:
11/18/2004
Title:
METHOD AND APPARATUS FOR MEASURING FLATNESS AND/OR RELATIVE ANGLE BETWEEN TOP AND BOTTOM SURFACES OF A CHIP
84
Patent #:
Issue Dt:
01/06/2004
Application #:
10444226
Filing Dt:
05/23/2003
Title:
COLUMN REDUNDANCY SYSTEM AND METHOD FOR A MICRO-CELL EMBEDDED DRAM (E-DRAM) ARCHITECTURE
85
Patent #:
Issue Dt:
11/09/2004
Application #:
10446297
Filing Dt:
05/28/2003
Publication #:
Pub Dt:
12/02/2004
Title:
MAGNETIC RANDOM ACCESS MEMORY USING MEMORY CELLS WITH ROTATED MAGNETIC STORAGE ELEMENTS
86
Patent #:
Issue Dt:
04/19/2005
Application #:
10447018
Filing Dt:
05/28/2003
Publication #:
Pub Dt:
12/02/2004
Title:
METHODS AND APPARATUS FOR PROVIDING AN ANTIFUSE FUNCTION
87
Patent #:
Issue Dt:
11/08/2005
Application #:
10447579
Filing Dt:
05/29/2003
Publication #:
Pub Dt:
12/18/2003
Title:
HIGH MOBILITY TRANSISTORS IN SOI AND METHOD FOR FORMING
88
Patent #:
Issue Dt:
11/09/2004
Application #:
10447646
Filing Dt:
05/29/2003
Publication #:
Pub Dt:
10/23/2003
Title:
DAMASCENE RESISTOR AND METHOD FOR MEASURING THE WIDTH OF SAME
89
Patent #:
Issue Dt:
09/14/2004
Application #:
10448723
Filing Dt:
05/30/2003
Title:
SRAM CELL WITH BOOTSTRAPPED POWER LINE
90
Patent #:
Issue Dt:
07/13/2010
Application #:
10448724
Filing Dt:
05/30/2003
Publication #:
Pub Dt:
12/02/2004
Title:
ESTABLISHING RELATIONSHIPS BETWEEN COMPONENTS IN SIMULATION SYSTEMS
91
Patent #:
Issue Dt:
05/10/2005
Application #:
10448729
Filing Dt:
05/30/2003
Publication #:
Pub Dt:
10/30/2003
Title:
DUAL GATE LOGIC DEVICE
92
Patent #:
Issue Dt:
11/09/2004
Application #:
10448776
Filing Dt:
05/29/2003
Publication #:
Pub Dt:
12/02/2004
Title:
BI-DIRECTIONAL READ WRITE DATA STRUCTURE AND METHOD FOR MEMORY
93
Patent #:
Issue Dt:
02/15/2005
Application #:
10448947
Filing Dt:
05/30/2003
Publication #:
Pub Dt:
12/02/2004
Title:
FORMATION OF SILICON-GERMANIUM-ON-INSULATOR (SGOI) BY AN INTEGRAL HIGH TEMPERATURE SIMOX-GE INTERDIFFUSION ANNEAL
94
Patent #:
Issue Dt:
05/23/2006
Application #:
10448948
Filing Dt:
05/30/2003
Publication #:
Pub Dt:
12/02/2004
Title:
HIGH-QUALITY SGOI BY OXIDATION NEAR THE ALLOY MELTING TEMPERATURE
95
Patent #:
Issue Dt:
04/11/2006
Application #:
10448954
Filing Dt:
05/30/2003
Publication #:
Pub Dt:
12/02/2004
Title:
SIGE LATTICE ENGINEERING USING A COMBINATION OF OXIDATION, THINNING AND EPITAXIAL REGROWTH
96
Patent #:
Issue Dt:
11/27/2007
Application #:
10449181
Filing Dt:
05/29/2003
Publication #:
Pub Dt:
02/01/2007
Title:
NEGATIVE RESISTS BASED ON A ACID-CATALYZED ELIMINATION OF POLAR MOLECULES
97
Patent #:
Issue Dt:
04/05/2005
Application #:
10455601
Filing Dt:
06/05/2003
Publication #:
Pub Dt:
12/09/2004
Title:
DECODE PATH GATED LOW ACTIVE POWER SRAM
98
Patent #:
Issue Dt:
11/02/2004
Application #:
10455696
Filing Dt:
06/05/2003
Publication #:
Pub Dt:
12/11/2003
Title:
DATA CODING FOR DATA STORAGE SYSTEMS
99
Patent #:
Issue Dt:
11/07/2006
Application #:
10456749
Filing Dt:
06/09/2003
Publication #:
Pub Dt:
12/09/2004
Title:
ORGANIC FIELD-EFFECT TRANSISTOR AND METHOD OF MAKING SAME BASED ON POLYMERIZABLE SELF-ASSEMBLED MONOLAYERS
100
Patent #:
Issue Dt:
02/01/2011
Application #:
10458112
Filing Dt:
06/10/2003
Publication #:
Pub Dt:
12/16/2004
Title:
MAGNETIC MATERIALS HAVING SUPERPARAMAGNETIC PARTICLES
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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