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Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 27 of 148
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148
1
Patent #:
6898132
Issue Dt:
05/24/2005
Application #:
10458147
Filing Dt:
06/10/2003
Publication #:
US20040252538
Pub Dt:
12/16/2004
Title:
SYSTEM AND METHOD FOR WRITING TO A MAGNETIC SHIFT REGISTER
2
Patent #:
6834005
Issue Dt:
12/21/2004
Application #:
10458554
Filing Dt:
06/10/2003
Publication #:
US20040252539
Pub Dt:
12/16/2004
Title:
SHIFTABLE MAGNETIC SHIFT REGISTER AND METHOD OF USING THE SAME
3
Patent #:
6790744
Issue Dt:
09/14/2004
Application #:
10459974
Filing Dt:
06/12/2003
Publication #:
US20040000333
Pub Dt:
01/01/2004
Title:
MONOLITHICALLY INTEGRATED SOLID-STATE SIGE THERMOELECTRIC ENERGY CONVERTER FOR HIGH SPEED AND LOW POWER CIRCUITS
4
Patent #:
6696343
Issue Dt:
02/24/2004
Application #:
10459978
Filing Dt:
06/12/2003
Title:
MICRO-ELECTROMECHANICAL VARACTOR WITH ENHANCED TUNING RANGE
5
Patent #:
6815282
Issue Dt:
11/09/2004
Application #:
10460717
Filing Dt:
06/12/2003
Publication #:
US20030218198
Pub Dt:
11/27/2003
Title:
SILICON ON INSULATOR FIELD EFFECT TRANSISTOR HAVING SHARED BODY CONTACT
6
Patent #:
7052621
Issue Dt:
05/30/2006
Application #:
10461090
Filing Dt:
06/13/2003
Publication #:
US20040251234
Pub Dt:
12/16/2004
Title:
BILAYERED METAL HARDMASKS FOR USE IN DUAL DAMASCENE ETCH SCHEMES
7
Patent #:
6841831
Issue Dt:
01/11/2005
Application #:
10461821
Filing Dt:
06/13/2003
Publication #:
US20030211681
Pub Dt:
11/13/2003
Title:
FULLY-DEPLETED SOI MOSFETS WITH LOW SOURCE AND DRAIN RESISTANCE AND MINIMAL OVERLAP CAPACITANCE USING A RECESSED CHANNEL DAMASCENE GATE PROCESS
8
Patent #:
6927414
Issue Dt:
08/09/2005
Application #:
10462933
Filing Dt:
06/17/2003
Publication #:
US20040256614
Pub Dt:
12/23/2004
Title:
HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF
9
Patent #:
7205604
Issue Dt:
04/17/2007
Application #:
10463038
Filing Dt:
06/17/2003
Publication #:
US20040157353
Pub Dt:
08/12/2004
Title:
ULTRA SCALABLE HIGH SPEED HETEROJUNCTION VERTICAL N-CHANNEL MISFETS AND METHODS THEREOF
10
Patent #:
6943407
Issue Dt:
09/13/2005
Application #:
10463039
Filing Dt:
06/17/2003
Publication #:
US20040256639
Pub Dt:
12/23/2004
Title:
LOW LEAKAGE HETEROJUNCTION VERTICAL TRANSISTORS AND HIGH PERFORMANCE DEVICES THEREOF
11
Patent #:
6727135
Issue Dt:
04/27/2004
Application #:
10464339
Filing Dt:
06/18/2003
Publication #:
US20030209765
Pub Dt:
11/13/2003
Title:
ALL-IN-ONE DISPOSABLE/PERMANENT SPACER ELEVATED SOURCE/DRAIN, SELF-ALIGNED SILICIDE CMOS
12
Patent #:
6767779
Issue Dt:
07/27/2004
Application #:
10464400
Filing Dt:
06/19/2003
Publication #:
US20030213997
Pub Dt:
11/20/2003
Title:
ASYMMETRICAL MOSFET LAYOUT FOR HIGH CURRENTS AND HIGH SPEED OPERATION
13
Patent #:
7045851
Issue Dt:
05/16/2006
Application #:
10465797
Filing Dt:
06/20/2003
Publication #:
US20040256662
Pub Dt:
12/23/2004
Title:
NONVOLATILE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD OF FORMING SAME
14
Patent #:
7315594
Issue Dt:
01/01/2008
Application #:
10484608
Filing Dt:
01/20/2004
Publication #:
US20040208270
Pub Dt:
10/21/2004
Title:
CLOCK DATA RECOVERING SYSTEM WITH EXTERNAL EARLY/LATE INPUT
15
Patent #:
NONE
Issue Dt:
01/01/2008
Application #:
10484608
Filing Dt:
01/20/2004
Publication #:
US20040208270
Pub Dt:
10/21/2004
PCT #:
IB0202829
Title:
CLOCK DATA RECOVERING SYSTEM WITH EXTERNAL EARLY/LATE INPUT
16
Patent #:
7235464
Issue Dt:
06/26/2007
Application #:
10485419
Filing Dt:
02/02/2005
Publication #:
US20050124092
Pub Dt:
06/09/2005
Title:
PATTERNING METHOD
17
Patent #:
NONE
Issue Dt:
06/26/2007
Application #:
10485419
Filing Dt:
02/02/2005
Publication #:
US20050124092
Pub Dt:
06/09/2005
PCT #:
IB0302278
Title:
PATTERNING METHOD
18
Patent #:
6995391
Issue Dt:
02/07/2006
Application #:
10499538
Filing Dt:
06/21/2004
Publication #:
US20050045873
Pub Dt:
03/03/2005
Title:
ELECTRODE STRUCTURE FOR ELECTRONIC AND OPTO-ELECTRONIC DEVICES
19
Patent #:
NONE
Issue Dt:
02/07/2006
Application #:
10499538
Filing Dt:
06/21/2004
Publication #:
US20050045873
Pub Dt:
03/03/2005
PCT #:
IB0204975
Title:
ELECTRODE STRUCTURE FOR ELECTRONIC AND OPTO-ELECTRONIC DEVICES
20
Patent #:
7256670
Issue Dt:
08/14/2007
Application #:
10523310
Filing Dt:
01/27/2005
Publication #:
US20060017533
Pub Dt:
01/26/2006
Title:
DIAPHRAGM ACTIVATED MICRO-ELECTROMECHANICAL SWITCH
21
Patent #:
NONE
Issue Dt:
08/14/2007
Application #:
10523310
Filing Dt:
01/27/2005
Publication #:
US20060017533
Pub Dt:
01/26/2006
PCT #:
US0227115
Title:
DIAPHRAGM ACTIVATED MICRO-ELECTROMECHANICAL SWITCH
22
Patent #:
7479014
Issue Dt:
01/20/2009
Application #:
10531494
Filing Dt:
04/15/2005
Publication #:
US20060003648
Pub Dt:
01/05/2006
Title:
LAND GRID ARRAY FABRICATION USING ELASTOMER CORE AND CONDUCTING METAL SHELL OR MESH
23
Patent #:
NONE
Issue Dt:
01/20/2009
Application #:
10531494
Filing Dt:
04/15/2005
Publication #:
US20060003648
Pub Dt:
01/05/2006
PCT #:
US0314830
Title:
LAND GRID ARRAY FABRICATION USING ELASTOMER CORE AND CONDUCTING METAL SHELL OR MESH
24
Patent #:
7388259
Issue Dt:
06/17/2008
Application #:
10536483
Filing Dt:
05/24/2005
Publication #:
US20060057787
Pub Dt:
03/16/2006
Title:
STRAINED FINFET CMOS DEVICE STRUCTURES
25
Patent #:
NONE
Issue Dt:
06/17/2008
Application #:
10536483
Filing Dt:
05/24/2005
Publication #:
US20060057787
Pub Dt:
03/16/2006
PCT #:
US0237931
Title:
STRAINED FINFET CMOS DEVICE STRUCTURES
26
Patent #:
7329111
Issue Dt:
02/12/2008
Application #:
10537238
Filing Dt:
05/31/2005
Publication #:
US20060093697
Pub Dt:
05/04/2006
Title:
METHOD AND DEVICE FOR FLOWING A LIQUID ON A SURFACE
27
Patent #:
NONE
Issue Dt:
02/12/2008
Application #:
10537238
Filing Dt:
05/31/2005
Publication #:
US20060093697
Pub Dt:
05/04/2006
PCT #:
IB0305350
Title:
METHOD AND DEVICE FOR FLOWING A LIQUID ON A SURFACE
28
Patent #:
7314700
Issue Dt:
01/01/2008
Application #:
10537259
Filing Dt:
05/31/2005
Publication #:
US20060127800
Pub Dt:
06/15/2006
Title:
HIGH SENSITIVITY RESIST COMPOSITIONS FOR ELECTRON-BASED LITHOGRAPHY
29
Patent #:
NONE
Issue Dt:
01/01/2008
Application #:
10537259
Filing Dt:
05/31/2005
Publication #:
US20060127800
Pub Dt:
06/15/2006
PCT #:
US0239048
Title:
HIGH SENSITIVITY RESIST COMPOSITIONS FOR ELECTRON-BASED LITHOGRAPHY
30
Patent #:
7491272
Issue Dt:
02/17/2009
Application #:
10537536
Filing Dt:
11/01/2005
Publication #:
US20060127579
Pub Dt:
06/15/2006
Title:
CONFINEMENT OF LIQUIDS ON SURFACES
31
Patent #:
NONE
Issue Dt:
02/17/2009
Application #:
10537536
Filing Dt:
11/01/2005
Publication #:
US20060127579
Pub Dt:
06/15/2006
PCT #:
IB0305128
Title:
CONFINEMENT OF LIQUIDS ON SURFACES
32
Patent #:
7087499
Issue Dt:
08/08/2006
Application #:
10539333
Filing Dt:
06/15/2005
Publication #:
US20060128071
Pub Dt:
06/15/2006
Title:
INTEGRATED ANTIFUSE STRUCTURE FOR FINFET AND CMOS DEVICES
33
Patent #:
NONE
Issue Dt:
08/08/2006
Application #:
10539333
Filing Dt:
06/15/2005
Publication #:
US20060128071
Pub Dt:
06/15/2006
PCT #:
US0241182
Title:
INTEGRATED ANTIFUSE STRUCTURE FOR FINFET AND CMOS DEVICES
34
Patent #:
7378710
Issue Dt:
05/27/2008
Application #:
10539335
Filing Dt:
06/15/2005
Publication #:
US20060068531
Pub Dt:
03/30/2006
Title:
FINFET SRAM CELL USING INVERTED FINFET THIN FILM TRANSISTORS
35
Patent #:
NONE
Issue Dt:
05/27/2008
Application #:
10539335
Filing Dt:
06/15/2005
Publication #:
US20060068531
Pub Dt:
03/30/2006
PCT #:
US0240868
Title:
FINFET SRAM CELL USING INVERTED FINFET THIN FILM TRANSISTORS
36
Patent #:
7872897
Issue Dt:
01/18/2011
Application #:
10552971
Filing Dt:
10/18/2006
Publication #:
US20070242548
Pub Dt:
10/18/2007
Title:
PROGRAMMABLE SEMICONDUCTOR DEVICE
37
Patent #:
NONE
Issue Dt:
01/18/2011
Application #:
10552971
Filing Dt:
10/18/2006
Publication #:
US20070242548
Pub Dt:
10/18/2007
PCT #:
US0313392
Title:
PROGRAMMABLE SEMICONDUCTOR DEVICE
38
Patent #:
7808257
Issue Dt:
10/05/2010
Application #:
10595541
Filing Dt:
04/27/2006
Publication #:
US20070108984
Pub Dt:
05/17/2007
Title:
IONIZATION TEST FOR ELECTRICAL VERIFICATION
39
Patent #:
NONE
Issue Dt:
10/05/2010
Application #:
10595541
Filing Dt:
04/27/2006
Publication #:
US20070108984
Pub Dt:
05/17/2007
PCT #:
US0336093
Title:
IONIZATION TEST FOR ELECTRICAL VERIFICATION
40
Patent #:
7708856
Issue Dt:
05/04/2010
Application #:
10595550
Filing Dt:
04/27/2006
Publication #:
US20070065647
Pub Dt:
03/22/2007
Title:
HOT PRESSING CERAMIC DISTORTION CONTROL
41
Patent #:
NONE
Issue Dt:
05/04/2010
Application #:
10595550
Filing Dt:
04/27/2006
Publication #:
US20070065647
Pub Dt:
03/22/2007
PCT #:
US0338517
Title:
HOT PRESSING CERAMIC DISTORTION CONTROL
42
Patent #:
7932549
Issue Dt:
04/26/2011
Application #:
10596022
Filing Dt:
05/25/2006
Publication #:
US20090014767
Pub Dt:
01/15/2009
Title:
CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS
43
Patent #:
NONE
Issue Dt:
04/26/2011
Application #:
10596022
Filing Dt:
05/25/2006
Publication #:
US20090014767
Pub Dt:
01/15/2009
PCT #:
US0340295
Title:
CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS
44
Patent #:
7352025
Issue Dt:
04/01/2008
Application #:
10596029
Filing Dt:
05/25/2006
Publication #:
US20070085134
Pub Dt:
04/19/2007
Title:
SEMICONDUCTOR MEMORY DEVICE WITH INCREASED NODE CAPACITANCE
45
Patent #:
NONE
Issue Dt:
04/01/2008
Application #:
10596029
Filing Dt:
05/25/2006
Publication #:
US20070085134
Pub Dt:
04/19/2007
PCT #:
US0339026
Title:
SEMICONDUCTOR MEMORY DEVICE WITH INCREASED NODE CAPACITANCE
46
Patent #:
7737014
Issue Dt:
06/15/2010
Application #:
10596249
Filing Dt:
06/06/2006
Publication #:
US20070093030
Pub Dt:
04/26/2007
Title:
REDUCTION OF BORON DIFFUSIVITY IN PFETS
47
Patent #:
NONE
Issue Dt:
06/15/2010
Application #:
10596249
Filing Dt:
06/06/2006
Publication #:
US20070093030
Pub Dt:
04/26/2007
PCT #:
US0339025
Title:
REDUCTION OF BORON DIFFUSIVITY IN PFETS
48
Patent #:
7935613
Issue Dt:
05/03/2011
Application #:
10596569
Filing Dt:
06/16/2006
Publication #:
US20100013044
Pub Dt:
01/21/2010
Title:
THREE-DIMENSIONAL SILICON ON OXIDE DEVICE ISOLATION
49
Patent #:
NONE
Issue Dt:
05/03/2011
Application #:
10596569
Filing Dt:
06/16/2006
Publication #:
US20100013044
Pub Dt:
01/21/2010
PCT #:
US0340079
Title:
THREE-DIMENSIONAL SILICON ON OXIDE DEVICE ISOLATION
50
Patent #:
7701015
Issue Dt:
04/20/2010
Application #:
10596573
Filing Dt:
10/14/2008
Publication #:
US20090039522
Pub Dt:
02/12/2009
Title:
BIPOLAR AND CMOS INTEGRATION WITH REDUCED CONTACT HEIGHT
51
Patent #:
NONE
Issue Dt:
04/20/2010
Application #:
10596573
Filing Dt:
10/14/2008
Publication #:
US20090039522
Pub Dt:
02/12/2009
PCT #:
US0340003
Title:
BIPOLAR AND CMOS INTEGRATION WITH REDUCED CONTACT HEIGHT
52
Patent #:
NONE
Issue Dt:
Application #:
10597038
Filing Dt:
07/07/2006
Publication #:
US20090026587
Pub Dt:
01/29/2009
Title:
GRADIENT DEPOSITION OF LOW-K CVD MATERIALS
53
Patent #:
NONE
Issue Dt:
Application #:
10597038
Filing Dt:
07/07/2006
Publication #:
US20090026587
Pub Dt:
01/29/2009
PCT #:
US2004000908
Title:
GRADIENT DEPOSITION OF LOW-K CVD MATERIALS
54
Patent #:
7550370
Issue Dt:
06/23/2009
Application #:
10597066
Filing Dt:
07/10/2006
Publication #:
US20070128840
Pub Dt:
06/07/2007
Title:
METHOD OF FORMING THIN SGOI WAFERS WITH HIGH RELAXATION AND LOW STACKING FAULT DEFECT DENSITY
55
Patent #:
NONE
Issue Dt:
06/23/2009
Application #:
10597066
Filing Dt:
07/10/2006
Publication #:
US20070128840
Pub Dt:
06/07/2007
PCT #:
US2004001555
Title:
METHOD OF FORMING THIN SGOI WAFERS WITH HIGH RELAXATION AND LOW STACKING FAULT DEFECT DENSITY
56
Patent #:
7683428
Issue Dt:
03/23/2010
Application #:
10597288
Filing Dt:
07/19/2006
Publication #:
US20090200604
Pub Dt:
08/13/2009
Title:
VERTICAL FIN-FET MOS DEVICES
57
Patent #:
NONE
Issue Dt:
03/23/2010
Application #:
10597288
Filing Dt:
07/19/2006
Publication #:
US20090200604
Pub Dt:
08/13/2009
PCT #:
US2004001721
Title:
VERTICAL FIN-FET MOS DEVICES
58
Patent #:
7504299
Issue Dt:
03/17/2009
Application #:
10597432
Filing Dt:
07/25/2006
Publication #:
US20080246069
Pub Dt:
10/09/2008
Title:
FOLDED NODE TRENCH CAPACITOR
59
Patent #:
NONE
Issue Dt:
03/17/2009
Application #:
10597432
Filing Dt:
07/25/2006
Publication #:
US20080246069
Pub Dt:
10/09/2008
PCT #:
US2004002648
Title:
FOLDED NODE TRENCH CAPACITOR
60
Patent #:
7960095
Issue Dt:
06/14/2011
Application #:
10597904
Filing Dt:
08/11/2006
Publication #:
US20080227030
Pub Dt:
09/18/2008
Title:
USE OF MIXED BASES TO ENHANCE PATTERNED RESIST PROFILES ON CHROME OR SENSITIVE SUBSTRATES
61
Patent #:
NONE
Issue Dt:
06/14/2011
Application #:
10597904
Filing Dt:
08/11/2006
Publication #:
US20080227030
Pub Dt:
09/18/2008
PCT #:
US2004004144
Title:
USE OF MIXED BASES TO ENHANCE PATTERNED RESIST PROFILES ON CHROME OR SENSITIVE SUBSTRATES
62
Patent #:
7148559
Issue Dt:
12/12/2006
Application #:
10604003
Filing Dt:
06/20/2003
Publication #:
US20050001290
Pub Dt:
01/06/2005
Title:
SUBSTRATE ENGINEERING FOR OPTIMUM CMOS DEVICE PERFORMANCE
63
Patent #:
6780736
Issue Dt:
08/24/2004
Application #:
10604009
Filing Dt:
06/20/2003
Title:
METHOD FOR IMAGE REVERSAL OF IMPLANT RESIST USING A SINGLE PHOTOLITHOGRAPHY EXPOSURE AND STRUCTURES FORMED THEREBY
64
Patent #:
7352815
Issue Dt:
04/01/2008
Application #:
10604025
Filing Dt:
06/23/2003
Publication #:
US20040258166
Pub Dt:
12/23/2004
Title:
DATA TRANSCEIVER AND METHOD FOR EQUALIZING THE DATA EYE OF A DIFFERENTIAL INPUT DATA SIGNAL
65
Patent #:
6958540
Issue Dt:
10/25/2005
Application #:
10604026
Filing Dt:
06/23/2003
Publication #:
US20040262764
Pub Dt:
12/30/2004
Title:
DUAL DAMASCENE INTERCONNECT STRUCTURES HAVING DIFFERENT MATERIALS FOR LINE AND VIA CONDUCTORS
66
Patent #:
6931337
Issue Dt:
08/16/2005
Application #:
10604051
Filing Dt:
06/24/2003
Publication #:
US20040267471
Pub Dt:
12/30/2004
Title:
LITHOGRAPHY TOOL IMAGE QUALITY EVALUATING AND CORRECTING
67
Patent #:
7030031
Issue Dt:
04/18/2006
Application #:
10604056
Filing Dt:
06/24/2003
Publication #:
US20040266201
Pub Dt:
12/30/2004
Title:
METHOD FOR FORMING DAMASCENE STRUCTURE UTILIZING PLANARIZING MATERIAL COUPLED WITH DIFFUSION BARRIER MATERIAL
68
Patent #:
7350160
Issue Dt:
03/25/2008
Application #:
10604059
Filing Dt:
06/24/2003
Publication #:
US20040268284
Pub Dt:
12/30/2004
Title:
METHOD OF DISPLAYING A GUARD RING WITHIN AN INTEGRATED CIRCUIT
69
Patent #:
7289658
Issue Dt:
10/30/2007
Application #:
10604063
Filing Dt:
06/24/2003
Publication #:
US20040268290
Pub Dt:
12/30/2004
Title:
REMOVAL OF RELATIVELY UNIMPORTANT SHAPES FROM A SET OF SHAPES
70
Patent #:
7080344
Issue Dt:
07/18/2006
Application #:
10604071
Filing Dt:
06/25/2003
Publication #:
US20040268288
Pub Dt:
12/30/2004
Title:
CODING OF FPGA AND STANDARD CELL LOGIC IN A TILING STRUCTURE
71
Patent #:
6894326
Issue Dt:
05/17/2005
Application #:
10604077
Filing Dt:
06/25/2003
Publication #:
US20040262698
Pub Dt:
12/30/2004
Title:
HIGH-DENSITY FINFET INTEGRATION SCHEME
72
Patent #:
6818906
Issue Dt:
11/16/2004
Application #:
10604079
Filing Dt:
06/25/2003
Title:
ELECTRON BEAM POSITION REFERENCE SYSTEM
73
Patent #:
6969648
Issue Dt:
11/29/2005
Application #:
10604081
Filing Dt:
06/25/2003
Publication #:
US20050009268
Pub Dt:
01/13/2005
Title:
METHOD FOR FORMING BURIED PLATE OF TRENCH CAPACITOR
74
Patent #:
6992354
Issue Dt:
01/31/2006
Application #:
10604086
Filing Dt:
06/25/2003
Publication #:
US20040262688
Pub Dt:
12/30/2004
Title:
FINFET HAVING SUPPRESSED PARASITIC DEVICE CHARACTERISTICS
75
Patent #:
6882230
Issue Dt:
04/19/2005
Application #:
10604095
Filing Dt:
06/26/2003
Publication #:
US20040263259
Pub Dt:
12/30/2004
Title:
SYSTEM AND METHOD FOR CONTROL PARAMETER RE-CENTERING IN A CONTROLLED PHASE LOCK LOOP SYSTEM
76
Patent #:
6911383
Issue Dt:
06/28/2005
Application #:
10604097
Filing Dt:
06/26/2003
Publication #:
US20040266076
Pub Dt:
12/30/2004
Title:
HYBRID PLANAR AND FINFET CMOS DEVICES
77
Patent #:
6936522
Issue Dt:
08/30/2005
Application #:
10604102
Filing Dt:
06/26/2003
Publication #:
US20040262695
Pub Dt:
12/30/2004
Title:
SELECTIVE SILICON-ON-INSULATOR ISOLATION STRUCTURE AND METHOD
78
Patent #:
7087506
Issue Dt:
08/08/2006
Application #:
10604116
Filing Dt:
06/26/2003
Publication #:
US20050009305
Pub Dt:
01/13/2005
Title:
METHOD OF FORMING FREESTANDING SEMICONDUCTOR LAYER
79
Patent #:
7278083
Issue Dt:
10/02/2007
Application #:
10604141
Filing Dt:
06/27/2003
Publication #:
US20040268202
Pub Dt:
12/30/2004
Title:
METHOD AND SYSTEM FOR OPTIMIZED INSTRUCTION FETCH TO PROTECT AGAINST SOFT AND HARD ERRORS
80
Patent #:
NONE
Issue Dt:
Application #:
10604146
Filing Dt:
06/27/2003
Publication #:
US20040266129
Pub Dt:
12/30/2004
Title:
METHOD OF FORMING SILICON-ON-INSULATOR WAFERS HAVING PROCESS RESISTANT APPLICATIONS
81
Patent #:
7068564
Issue Dt:
06/27/2006
Application #:
10604168
Filing Dt:
06/29/2003
Publication #:
US20040264289
Pub Dt:
12/30/2004
Title:
TIMER LOCKOUT CIRCUIT FOR SYNCHRONOUS APPLICATIONS
82
Patent #:
6897674
Issue Dt:
05/24/2005
Application #:
10604186
Filing Dt:
06/30/2003
Publication #:
US20040263199
Pub Dt:
12/30/2004
Title:
ADAPTIVE INTEGRATED CIRCUIT BASED ON TRANSISTOR CURRENT MEASUREMENTS
83
Patent #:
7279746
Issue Dt:
10/09/2007
Application #:
10604190
Filing Dt:
06/30/2003
Publication #:
US20040262784
Pub Dt:
12/30/2004
Title:
HIGH PERFORMANCE CMOS DEVICE STRUCTURES AND METHOD OF MANUFACTURE
84
Patent #:
6955737
Issue Dt:
10/18/2005
Application #:
10604191
Filing Dt:
06/30/2003
Publication #:
US20040265537
Pub Dt:
12/30/2004
Title:
SUPPORTED GREENSHEET STRUCTURE AND METHOD IN MLC PROCESSING
85
Patent #:
6849858
Issue Dt:
02/01/2005
Application #:
10604202
Filing Dt:
07/01/2003
Publication #:
US20050001177
Pub Dt:
01/06/2005
Title:
APPARATUS AND METHOD FOR FORMING ALIGNMENT LAYERS
86
Patent #:
6995376
Issue Dt:
02/07/2006
Application #:
10604204
Filing Dt:
07/01/2003
Publication #:
US20050001171
Pub Dt:
01/06/2005
Title:
SILICON-ON-INSULATOR LATCH-UP PULSE-RADIATION DETECTOR
87
Patent #:
7065602
Issue Dt:
06/20/2006
Application #:
10604205
Filing Dt:
07/01/2003
Publication #:
US20050001280
Pub Dt:
01/06/2005
Title:
CIRCUIT AND METHOD FOR PIPELINED INSERTION
88
Patent #:
6943405
Issue Dt:
09/13/2005
Application #:
10604206
Filing Dt:
07/01/2003
Publication #:
US20050001273
Pub Dt:
01/06/2005
Title:
INTEGRATED CIRCUIT HAVING PAIRS OF PARALLEL COMPLEMENTARY FINFETS
89
Patent #:
6960820
Issue Dt:
11/01/2005
Application #:
10604212
Filing Dt:
07/01/2003
Publication #:
US20050012180
Pub Dt:
01/20/2005
Title:
BIPOLAR TRANSISTOR SELF-ALIGNMENT WITH RAISED EXTRINSIC BASE EXTENSION AND METHODS OF FORMING SAME
90
Patent #:
7045011
Issue Dt:
05/16/2006
Application #:
10604257
Filing Dt:
07/07/2003
Publication #:
US20050005843
Pub Dt:
01/13/2005
Title:
DUAL-LAYER COMPLIANT POLYMERIC NOZZLE
91
Patent #:
7131074
Issue Dt:
10/31/2006
Application #:
10604277
Filing Dt:
07/08/2003
Publication #:
US20050010887
Pub Dt:
01/13/2005
Title:
NESTED VOLTAGE ISLAND ARCHITECTURE
92
Patent #:
7202764
Issue Dt:
04/10/2007
Application #:
10604278
Filing Dt:
07/08/2003
Publication #:
US20050007217
Pub Dt:
01/13/2005
Title:
NOBLE METAL CONTACTS FOR MICRO-ELECTROMECHANICAL SWITCHES
93
Patent #:
7192874
Issue Dt:
03/20/2007
Application #:
10604367
Filing Dt:
07/15/2003
Publication #:
US20050014369
Pub Dt:
01/20/2005
Title:
METHOD FOR REDUCING FOREIGN MATERIAL CONCENTRATIONS IN ETCH CHAMBERS
94
Patent #:
6993741
Issue Dt:
01/31/2006
Application #:
10604373
Filing Dt:
07/15/2003
Publication #:
US20050014074
Pub Dt:
01/20/2005
Title:
GENERATING MASK PATTERNS FOR ALTERNATING PHASE-SHIFT MASK LITHOGRAPHY
95
Patent #:
6954387
Issue Dt:
10/11/2005
Application #:
10604375
Filing Dt:
07/15/2003
Publication #:
US20050013185
Pub Dt:
01/20/2005
Title:
DYNAMIC RANDOM ACCESS MEMORY WITH SMART REFRESH SCHEDULER
96
Patent #:
6812105
Issue Dt:
11/02/2004
Application #:
10604382
Filing Dt:
07/16/2003
Title:
ULTRA-THIN CHANNEL DEVICE WITH RAISED SOURCE AND DRAIN AND SOLID SOURCE EXTENSION DOPING
97
Patent #:
7113749
Issue Dt:
09/26/2006
Application #:
10604419
Filing Dt:
07/18/2003
Publication #:
US20050013355
Pub Dt:
01/20/2005
Title:
SYSTEM AND METHOD FOR MEASURING A HIGH SPEED SIGNAL
98
Patent #:
NONE
Issue Dt:
Application #:
10604486
Filing Dt:
07/25/2003
Publication #:
US20050016952
Pub Dt:
01/27/2005
Title:
SYSTEM AND METHOD OF ALTERING A VERY SMALL SURFACE AREA BY MULTIPLE CHANNEL PROBE
99
Patent #:
NONE
Issue Dt:
Application #:
10604487
Filing Dt:
07/25/2003
Publication #:
US20050016954
Pub Dt:
01/27/2005
Title:
SYSTEM AND METHODS OF ALTERING A VERY SMALL SURFACE AREA
100
Patent #:
NONE
Issue Dt:
Application #:
10604517
Filing Dt:
07/28/2003
Publication #:
US20050026397
Pub Dt:
02/03/2005
Title:
CRACK STOP FOR LOW K DIELECTRICS
Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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